EP3659248A1 - Schéma de commutation pour compensateurs synchrones statiques utilisant des convertisseurs en pont en h en cascade - Google Patents

Schéma de commutation pour compensateurs synchrones statiques utilisant des convertisseurs en pont en h en cascade

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Publication number
EP3659248A1
EP3659248A1 EP17751178.9A EP17751178A EP3659248A1 EP 3659248 A1 EP3659248 A1 EP 3659248A1 EP 17751178 A EP17751178 A EP 17751178A EP 3659248 A1 EP3659248 A1 EP 3659248A1
Authority
EP
European Patent Office
Prior art keywords
voltage
converter
bridge cells
bridge
cells
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP17751178.9A
Other languages
German (de)
English (en)
Inventor
Patrick S. FLANNERY
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
American Superconductor Corp
Original Assignee
American Superconductor Corp
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Filing date
Publication date
Application filed by American Superconductor Corp filed Critical American Superconductor Corp
Publication of EP3659248A1 publication Critical patent/EP3659248A1/fr
Withdrawn legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483—Converters with outputs that each can have more than two voltages levels
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J3/00—Circuit arrangements for ac mains or ac distribution networks
    • H02J3/18—Arrangements for adjusting, eliminating or compensating reactive power in networks
    • H02J3/1821—Arrangements for adjusting, eliminating or compensating reactive power in networks using shunt compensators
    • H02J3/1835—Arrangements for adjusting, eliminating or compensating reactive power in networks using shunt compensators with stepless control
    • H02J3/1842—Arrangements for adjusting, eliminating or compensating reactive power in networks using shunt compensators with stepless control wherein at least one reactive element is actively controlled by a bridge converter, e.g. active filters
    • H02J3/1857—Arrangements for adjusting, eliminating or compensating reactive power in networks using shunt compensators with stepless control wherein at least one reactive element is actively controlled by a bridge converter, e.g. active filters wherein such bridge converter is a multilevel converter
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483—Converters with outputs that each can have more than two voltages levels
    • H02M7/4833—Capacitor voltage balancing
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483—Converters with outputs that each can have more than two voltages levels
    • H02M7/4835—Converters with outputs that each can have more than two voltages levels comprising two or more cells, each including a switchable capacitor, the capacitors having a nominal charge voltage which corresponds to a given fraction of the input voltage, and the capacitors being selectively connected in series to determine the instantaneous output voltage

Definitions

  • the present invention generally relates to static synchronous compensators and more particularly to a switching scheme for low power loss static synchronous compensators using cascaded H-Bridge converters.
  • Static synchronous compensators are power electronic converter systems used for controlling reactive current flow to/from an electric power system.
  • a typical STATCOM is made from a three-phase voltage source inverter with all three legs (also referred to herein as poles or phases) of the inverter connected to the same DC bus. This allows transient power flowing into/out of a given phase to be cancelled out by the power flow out of/into the other two phases, which occurs naturally in STATCOM applications.
  • the DC bus voltage does not significantly deviate during normal STATCOM operation.
  • the maximum value of the DC bus voltage is limited by the voltage rating of the devices comprising the voltage source inverter. This maximum DC bus voltage then imposes a limit on the AC voltage that can appear between phase legs. Unfortunately, this AC voltage is often too low to directly connect to an electric power system so the use of a step-up transformer is often required to enable operation at higher voltages.
  • CHB STATCOM uses a multi-level converter called a cascaded H-Bridge converter (CHB) which enables operation at higher voltages and often eliminates the need for a step-up transformer. This is beneficial since the step-up transformer can be inefficient and lossy.
  • CHB STATCOMs are natively single phase; the H-Bridge converters are not connected to the same DC bus.
  • Vdc identical voltages
  • the total converter voltage of a given pole can take any integer multiple of Vdc between -N ce iis x Vdc and +N ce iis x Vdc, where N ce iis is the number of CHB H-Bridge cells.
  • the total converter voltage is used to control the pole current, which flows through all individual H-Bridge cells in a given leg, since they are connected in series.
  • Another advantage of CHB STATCOMs is that they more easily create a high fidelity (low harmonic) AC voltage waveform from the lower voltage rated cells in series by virtue of their smaller voltage step size.
  • the converter can continue to operate even with a failed cell through bypassing (shorting out) the level with the failed cell.
  • the CHB STATCOMs are switched or modulated according to various conditions
  • Typical modulation schemes include staircase modulation, phase shifted modulation, and level shifted modulation.
  • Each of these modulation schemes has benefits as well as disadvantages in relation to four key performance criteria. These criteria are: 1) minimizing the number of switching events to reduce power loss, (2) balancing the isolated capacitor voltages of the CHB cells to keep each cell voltage within safe operating levels, (3) producing a high fidelity AC voltage waveform to minimize the passive filter components on the AC side of the converter, and (4) allowing for even distribution of losses among the CHB cells to prevent accelerated wear out of an individual cell.
  • the invention features a static synchronous compensator with at least one converter pole for producing a first phase of an AC voltage waveform having a fundamental cycle.
  • the first phase of the AC voltage waveform including alternating converter pole charging regions and converter pole discharging regions in each fundamental cycle.
  • the at least one converter pole including a plurality of cascaded H-bridge cells, each of said plurality of cascaded H-bridge cells having a DC voltage source and a plurality of switches.
  • the plurality of switches of each H-bridge cell are capable of being switched to produce a plurality of switching states.
  • controller configured to control the switching states of the plurality of switches of each of the cascaded H-bridge cells based on the voltages of DC voltage sources of the H-bridge cells and on whether the AC waveform is in the converter pole charging region or the converter pole discharging region.
  • the controller may be configured to control the switching states of the plurality of switches of each of the cascaded H-bridge cells each control period of the fundamental cycle to produce a commanded converter voltage, each control period being a fraction of the fundamental cycle.
  • the plurality of switching states of the plurality of switches may comprise active switching states or passive switching states, and wherein the active switching states may be either positive active switching states or negative active switching states.
  • the controller may be configured to receive each current control period the commanded converter voltage and a current of the at least one converter pole and to determine there from whether the first phase of the AC voltage waveform is in the converter pole charging region or the converter pole discharging region in the current control period of the fundamental cycle.
  • the controller may be configured to receive each current control period the voltage of the DC voltage sources of each H-bridge cell and a list of the H-bridge cells which were in the active state in the control period just prior to the current control period.
  • the controller may be configured in the current control period to determine from the list of the H-bridge cells which were in the active state in the control period just prior to the current control period if the voltage of any of the DC voltage sources of the H-bridge cells in the active state exceeds a threshold voltage level. If the threshold voltage level is exceeded transition such H-bridge cell to the passive state, and for the remaining H-bridge cells maintain for the current control period the switching state of the control period just prior to the current control period.
  • the controller may be configured to determine if the sum of the voltages of the H-bridge cells in the active state is less than the magnitude of the commanded converter voltage and if it is then transition the H- bridge cells from the passive state to the active state in order from lowest voltage level to highest voltage level until the sum of the voltages of the H-bridge cells in the active state is not less than the magnitude of the commanded converter voltage.
  • the controller may be configured to determine if the sum of the voltages of the H-bridge cells in the active state is more than the magnitude of the commanded converter voltage and if it is then transition the H-bridge cells from the active state to the passive state in order from highest voltage level to lowest voltage level until the sum of the voltages of the H-bridge cells in the active state is not more than the magnitude of the commanded converter voltage. And, the controller may be configured to generate a list of active H-bridge cells for the current control period.
  • the controller may be configured in the current control period to determine from the list of the H-bridge cells which were in the active state in the control period just prior to the current control period if the voltage of any of the DC voltage sources of the H-bridge cells in the active state is less than a threshold voltage level and if the voltage level is less than the threshold voltage level transition such H-bridge cell to the passive state, and for the remaining H-bridge cells maintain for the current control period the switching state of the control period just prior to the current control period.
  • the controller may be configured to determine if the sum of the voltages of the H-bridge cells in the active state is less than the magnitude of the commanded converter voltage and if it is then transition the H- bridge cells from the passive state to the active state in order from highest voltage level to lowest voltage level until the sum of the voltages of the H-bridge cells in the active state is not less than the magnitude of the commanded converter voltage.
  • the controller may be configured to determine if the sum of the voltages of the H-bridge cells in the active state is more than the magnitude of the commanded converter voltage and if it is then transition the H-bridge cells from the active state to the passive state in order from lowest voltage level to highest voltage level until the sum of the voltages of the H-bridge cells in the active state is not more than the magnitude of the commanded converter voltage. And, the controller may be configured to generate the list of active H-bridge cells for the current control period.
  • the controller may be configured to control the switching states of the plurality of switches according to the list of active H-bridge cells generated for the current control period.
  • the controller may further be configured to modulate, during the control period, one of the H- bridge cells using pulse width modulation (PWM), the modulated cell being the PWM cell.
  • PWM pulse width modulation
  • the controller may be configured to select the PWM cell based on a count of fundamental cycles of the AC voltage waveform which have been produced and on a segment of the fundamental cycle during which the PWM cell was last modulated.
  • the controller may be configured to compare the magnitude of the commanded converter voltage to the sum the voltages of the list of active H-bridge cells generated for the current control period and modulate the PWM cell with a duty cycle to produce a PWM cell voltage substantially equal to the voltage difference between the magnitude of the commanded converter voltage and the sum the voltages of the list of active H- bridge cells generated for the current control period.
  • the controller being configured to determine if the sum of the voltages of the H-bridge cells in the active state is less than the magnitude of the commanded converter voltage may include adding a cell voltage of the PWM cell.
  • the plurality of cascaded H-bridge cells comprises any integer number of H-bridge cells.
  • the second converter pole may include a plurality of cascaded H-bridge cells, each of said plurality of cascaded H-bridge cells having a DC voltage source and a plurality of switches; wherein the plurality of switches of each H-bridge cell are capable of being switched to produce a plurality of switching states.
  • the controller may be configured to control the switching states of the plurality of switches of each of the cascaded H-bridge cells based on the voltages of DC voltage sources of the H-bridge cells and on whether the second phase of the AC waveform is in the converter pole charging region or the converter pole discharging region.
  • There may be a third converter pole for producing a third phase of an AC voltage waveform having a fundamental cycle, the third phase of the AC voltage waveform including alternating converter pole charging regions and converter pole discharging regions in each fundamental cycle.
  • the third converter pole may include a plurality of cascaded H-bridge cells, each of said plurality of cascaded H-bridge cells having a DC voltage source and a plurality of switches; wherein the plurality of switches of each H-bridge cell are capable of being switched to produce a plurality of switching states.
  • the controller may be configured to control the switching states of the plurality of switches of each of the cascaded H-bridge cells based on the voltages of DC voltage sources of the H-bridge cells and on whether the third phase of the AC waveform is in the converter pole charging region or the converter pole discharging region.
  • the controller may be further configured to modulate, during the control period, one of the H-bridge cells in each of the first, second, and third converter poles using pulse width modulation (PWM), the modulated cells being the PWM cells.
  • the controller may be further configured to modulate, during the control period, one of the H-bridge cells in two converter poles of the first, second and third converter poles using pulse width modulation (PWM), the modulated cells being the PWM cells; and wherein the two converter poles of the first, second and third converter poles having PWM cells are changed periodically.
  • the first, second and third converter poles may be connected in a WYE point floating topology.
  • the invention features a static synchronous compensator including at least one converter pole for producing a first phase of an AC voltage waveform having a fundamental cycle.
  • the first phase of the AC voltage waveform including alternating converter pole charging regions and converter pole discharging regions in each fundamental cycle.
  • the at least one converter pole including a plurality of cascaded H-bridge cells, each of said plurality of cascaded H-bridge cells having a DC voltage source and a plurality of switches.
  • the plurality of switches of each H-bridge cell are capable of being switched to produce a plurality of switching states.
  • controller configured to control the switching states of the plurality of switches of each of the cascaded H-bridge cells every control period of the fundamental cycle to produce a commanded converter voltage, wherein each control period is a fraction of the fundamental cycle.
  • the controller being configured to maintain for the current control period the switching state of each of the cascaded H-bridge cells of the control period just prior to the current control period unless a predetermined condition is determined based on the voltages of the DC voltage sources of the H-bridge cells and on whether the AC waveform is in the converter pole charging region or the converter pole discharging region.
  • the plurality of cascaded H-bridge cells may comprise any integer number of H-bridge cells.
  • An object of this invention is to provide a low power loss CHB STATCOM utilizing a simple switching scheme that achieves good performance in the four key performance criteria.
  • FIG. 1 is a schematic diagram of a three phase cascaded H-bridge STATCOM according to an aspect of this invention
  • FIG. 2 is a schematic diagram of a single cell of cascaded H-bridge STATCOM of Fig. 1;
  • FIG. 3 depicts the switching states of the single cell of a cascaded H-bridge STATCOM of Fig. 2;
  • FIG. 4 depicts the output waveform of one phase of a cascaded H-bridge STATCOM using staircase modulation
  • FIG. 5 depicts the output waveform of one phase of a cascaded H-bridge STATCOM using phase shifted carrier modulation
  • FIG. 6 depicts the output waveform of one phase of a cascaded H-bridge STATCOM using level shifted carrier modulation
  • FIG. 7 depicts the output voltage, current and power waveforms of one phase of a cascaded H- bridge STATCOM according to an aspect of this invention
  • FIG. 8a depicts the control algorithm implemented by the controller of one phase of the cascaded H-bridge STATCOM of Fig. 1;
  • FIG. 8b depicts certain alternate steps of the control algorithm of Fig. 8a
  • FIG. 9 depicts cycle number count of the fundamental AC voltage period and the cycle segment count of each period
  • FIG. 10a depicts the simulation results for a four-cell cascaded H-bridge STATCOM circuit according to this invention using a PWM cell;
  • FIG. 10b depicts the simulation results for a four-cell cascaded H-bridge STATCOM circuit according to this invention without using a PWM cell
  • FIG. 11a depicts the output voltage waveform, output current waveform, the cell switch functions, and DC voltages across each cell of the four cell H-bridge according to this invention using a PWM cell
  • FIG. 10b depicts the simulation results for a four-cell cascaded H-bridge STATCOM circuit according to this invention without using a PWM cell
  • FIG. 11a depicts the output voltage waveform, output current waveform, the cell switch functions, and DC voltages across each cell of the four cell H-bridge according to this invention using a PWM cell
  • FIG. 1 lb depicts the output voltage waveform, output current waveform, the cell switch functions, and DC voltages across each cell of the four cell H-bridge according to this invention without using a PWM cell.
  • the general purpose of the invention is to provide a low power loss CHB STATCOM which utilizes a switching scheme that achieves good performance with regard to four key performance criteria; namely, minimizing the number of switching events, balancing capacitor voltages of the CHB cells, producing a high fidelity AC voltage waveform, and allowing for even distribution of losses among the CHB cells.
  • a three phase CHB STATCOM 10 is shown in Fig. 1 to include three converter legs or phases 12 (Phase A), 14 (Phase B), and 16 (Phase C), which are operated under the control of controller 18, which may be a digital signal processor operating a digital control system typically sampled in the range of 500 Hz to 3 kHz.
  • controller 18 which may be a digital signal processor operating a digital control system typically sampled in the range of 500 Hz to 3 kHz.
  • Each leg/phase includes N cascaded H-bridge converter cells, such as cells 20, 22, and 24 of leg/phase 12, connected in series to form Phase A output 30.
  • Phase A output 30 is connected to phase A of power grid 40 through filter inductor 42.
  • Converter legs or phases 14 (Phase B) and 16 (Phase C) each include N cascaded H- bridge cells (not shown) which form Phase B output 32 and Phase C output 34. Phases B and C are also connected to their respective phases of power grid 40.
  • the outputs of converter legs or phases 12, 14 and 16 typically pass through filters 42, 44, and 46, respectively, to reduce harmonic content.
  • the three phases of power grid 40 are shown to be connected to a load 50 which is representative of the aggregate of all individual loads connected to power grid 40.
  • each H-bridge cell of a converter phase/leg of CHB STATCOM 10 identical capacitors having the same nominal voltage, Vdc, are used.
  • each cascaded converter cell (20, 22, and 24) has an identical capacitor (21, 23, and 25), each with a bus voltage of Vdc.
  • the total instantaneous converter leg/phase voltage V p can be an integer multiple of Vdc between -N ce iis x Vdc and +N ce iis x Vdc. .
  • the total converter leg/phase voltage (Vp) is used to control the leg/phase current (Ip), which flows through all individual H-Bridge cells in a given leg.
  • Each converter cell 20, 22, and 24 also includes a plurality of switches 26, 27, and 28 connected in the H-bridge configuration and switched using controller 18 to produce a desired waveform on output 30. Maintaining a balanced dc voltage across the individual H-Bridge cell capacitors 21 , 23, and 25 is one of the requirements of a switching or modulation strategy for a CHB STATCOM. Ideally the leg/phase current is 90 degrees leading or lagging the inverter leg/phase voltage, but in practice a small part of the current is in phase with the voltage to make up for losses in the converter leg/phase.
  • a single H-Bridge cell e.g. H-Bridge cell 20, is shown in more detail in Fig. 2 to include capacitor 21 and a plurality of switches 24.
  • the switches comprise four IGBT transistor/diode pairs 60, 62, 64, and 66 connected in an H bridge configuration.
  • IGBT transistor/diode pairs 60 and 64 are connected in series across capacitor voltage Vdc with IGBT transistor/diode pair 60 being connected at its first end to +Vdc and IGBT transistor/diode pair 64 being connected at its first end to -Vdc.
  • the second ends of IGBT transistor/diode pairs 60 and 64 being connected to each other and to the positive terminal of H-Bridge cell 20, +VH.
  • IGBT transistor/diode pairs 62 and 66 are connected in series across capacitor voltage Vdc with IGBT transistor/diode pair 62 being connected at its first end to +Vdc and IGBT transistor/diode pair 66 being connected at its first end to -Vdc.
  • the second ends of IGBT transistor/diode pairs 62 and 66 being connected to each other and to the negative terminal of H-Bridge cell 20, -VH.
  • the H-Bridge cell 20, Fig. 2 has four valid
  • IGBT transistor/diode pairs 60 and 66 are switched on and IGBT transistor/diode pairs 62 and 64 are switched off.
  • IGBT transistor/diode pairs 62, and 64 are switched on and IGBT transistor/diode pairs 60 and 66 are switched off.
  • IGBT transistor/diode pairs 60 and 62 are switched on and IGBT transistor/diode pairs 64 and 66 are switched off.
  • IGBT transistor/diode pairs 64 and 66 are switched on and IGBT transistor/diode pairs 60 and 62 are switched off.
  • Other combinations of IGBT switch states beyond these four are valid during cell test or bypass.
  • States 1 and 2 are "active" states and add either positive or negative capacitor voltage (+Vdc or -Vdc) to the total converter voltage.
  • Controller 18 of CHB STATCOM 10 as depicted in Fig. 1 above coordinates the operation of all of the H-bridge cells of converter legs 12, 14, and 16 using a particular switching scheme or strategy to produce a desired output waveform.
  • Several known switching strategies are described below with regard to Figs. 4-6.
  • Output waveform 80, Vp, Fig. 4, represents one phase produced by CFIB
  • STATCOM 10 such as output 30, Fig. 1.
  • the mirror image happens for negative required inverter voltages (-100% duty).
  • V p voltage waveform
  • this modulation scheme due to limited switching of cells, does not allow for balancing of cell voltages within a 50/60 Hz cycle. It is possible to re-order the sequence of addition/removal of cells on a half (or quarter) cycle basis, or reorder them across multiple line cycles, but this still results in significant DC bus movement.
  • this switching algorithm requires very large (and costly) DC capacitors to make it feasible for use in a STATCOM.
  • the AC harmonic quality is not particularly good, necessitating a large and costly filter inductor, L, or harmonic filter.
  • Phase Shifted Modulation is a carrier-based switching strategy.
  • Carrier strategies compare the desired total CHB STATCOM voltage, V p , C md, with a set of high frequency triangle "carrier" waveforms (1 carrier waveform per cell). The result of this comparison process is a discrete output, ⁇ +1, 0, -1 ⁇ , that determines which of the 4 switch states a given cell will take during the next carrier period. This is also known as Pulse Width Modulation, PWM.
  • the carrier frequency is typically much higher than the fundamental frequency (50, 60 Hz), commonly 10 to 40 times higher (e.g. fcamer ⁇ 600 kHz to 2 kHz).
  • An example of phase shifted carrier switching frequency (600 Hz carrier) is shown in Fig.
  • phase shifted carrier modulation is more even "sampling" from each of the cells of the CHB, thereby producing an even charging and discharging of the DC bus voltage across all of the cells.
  • component and timing variation from cell to cell necessitate an auxiliary control loop to maintain equal DC bus voltages. This even sampling also naturally balances the losses across cells, preventing uneven heating and wear-out of the IGBT/diodes.
  • Level Shifted Modulation is another carrier-based switching strategy. Similar to the phase shifted carrier modulation above, each of the carriers is vertically offset (e.g. "level") before comparison with the required pole voltage to produce the ⁇ +1, 0, -1 ⁇ discrete output for each cell. In some ways this third strategy is a hybrid of staircase and phase shifted modulation. An illustration of the mechanics of the level shifted carrier strategy is shown by waveform 100, Fig. 6, using a level shifted carrier switching frequency of 600 Hz. The cell voltage waveforms are shown as 102, 104, and 106.
  • the level shifted carrier modulation provides a voltage, V p , with good fidelity to the commanded sine wave, so the AC filter inductor size can be small.
  • V p the cumulative number of switching events per fundamental cycle is not as high as phase shifted carrier, leading to better overall losses.
  • the switching strategy according to an aspect of this invention is based on several principals of operation which are described below. For simplicity, the description below is limited to a single leg/phase converter of CHB STATCOM 10, since the operation of the other legs/phases is the same other than the phase of the output waveforms.
  • H-bridge cells are
  • one cell may be designated as "PWM cell” and the duty cycle (+/- % ON time) will be determined to make up the difference from the commanded voltage, V p , cm d, and the sum of all "active" H-bridge voltages. This will insure high AC harmonic voltage quality. Since the "PWM cell” will necessarily switch one or more times in a given control period, the switching losses will be higher. Therefore, the role of "PWM cell” is rotated amongst all of the CHB H-bridge cells so as to encourage even total losses across cells.
  • switching algorithm 150, Fig. 8a, according to this invention is implemented in controller 18, Fig. 1, and executed at a regular control period, typically on the order of 500 Hz to 3 kHz. The steps described below occur once per control period.
  • the commanded inverter voltage, V p , C md from the regulator (not shown) of CHB STATCOM 10 is sampled at 152.
  • the pole current 154, I p , and all H-Bridge cell DC bus voltages 156, Vdc, are sampled.
  • the cycle number 158 integer, from 1 to N ce iis
  • the cycle segment number 160 integer, 1 to Nceiis
  • the cycle segment is a count up from 1 to N ce iis for every equal fraction of a fundamental period of the AC waveform, V ac .
  • the pole current 154, I p is multiplied by the commanded inverter voltage 152, V p , cm d , producing the instantaneous power and the polarity (sign) of V p , cm d x Ip is calculated at 164 to determine at 166 if the inverter is "charging” or “discharging”.
  • the magnitude and sign, respectively of the commanded inverter voltage 152, V p , cmd are determined for use in steps 190, 192, 202, as described below.
  • the DC bus voltages from 156 are sorted from minimum to maximum value and stored at 170 with corresponding cell numbers.
  • the list of active and passive cells are "carried-over" from the previous control period.
  • the PWM cell, NPWM is determined at 182, using the cycle number 158 and cycle segment 160.
  • the calculation of the PWM cell, NPWM is as follows:
  • NPWM Jfiod (Cycle_Segment + Cycle_Number, 4) + 1, where mod is the modulus function. It should be noted that other methods of selecting the PWM cell may used. For example, a random number generator for generating numbers between 1 and Ncells could be used to vary the PWM cell and evenly spread switching losses among the cells.
  • the cell designated to be the "PWM cell” is removed from list of available “active” and “passive” cells and the list of remaining active cells is provided for use in steps 190 and 192.
  • the PWM cell is used later in 204, 206 and 208, augmenting the CHB phase leg voltage produced from 190 and 192, in order to precisely achieve the commanded V p , cm d.
  • the 360 degree fundamental AC voltage period is divided into N ce ii equal time segments.
  • Each cell performs PWM operation once per fundamental period of the AC waveform V ac (once per time segment or 1/N ce ii'th of the 360 cycle) on average over a large number of fundamental AC waveform periods.
  • each cell's segment of PWM rotates position within the period across subsequent fundamental periods. This insures that each cell PWMs during both high and low current amplitude parts of the fundamental current waveform.
  • Alternative approaches can be used to select "PWM cell" so as to guarantee loss balancing.
  • steps 190 and 192 are described as follows when the PWM cell is implemented. If the inverter is in a "charging" region, then at steps 190a-c the following occurs:
  • step 200 the output of step 190 or 192 is used to establish the "new" list of active cells for the current period, which list is then provided to 202.
  • the state of the of each of the active non-PWM cells cells ⁇ e.g. +1 or -1 for "state 1" or “state 2" ⁇ for the current period is set.
  • the duty cycle of the PWM cell must be determined.
  • the sum of the voltages of the active cells is obtained and the sign of the commanded voltage is applied at step 205 to the sum of the voltages of the active cells from step 204.
  • the commanded voltage, V p , cm d and the sum of the active cell voltages are input to step 206 where the duty cycle of the "PWM cell", dpwM, is calculated as follows:
  • the calculated duty cycle is input to PWM cell modulator 208 to modulate the PWM cell for the current period.
  • alternate methods of calculating the duty cycle of the "PWM cell” may be used.
  • the polarity of the PWM cell is the same as the polarity of the commanded inverter pole voltage. It may, however, be implemented using either polarity.
  • the PWM cell duty cycle polarity could be either positive or negative, with corresponding adjustments in the number of active cells depending on the polarity used.
  • steps 190b,c and 192b,c must be modified to remove the use of the PWM cell in the process.
  • the modified steps are set forth in Fig. 8b.
  • Output voltage waveform 220 can be produced with the above algorithm with the CUB cells being switched in a limited manner, while maintaining balanced DC bus voltages across the 4 cells.
  • the CUB inverter ac voltage waveform 220 has low harmonic content. This is evident by the small ripple current in the output pole current (waveform 230) using a relatively small inductor value.
  • the cell switch waveforms 240 show the low number of switching events in each cell per fundamental period and the alternating of PWM among the 4 cells, producing balanced losses across cells.
  • the DC bus voltages are depicted by waveforms 250. CUB inverter losses are much smaller than can be achieved with similar ac and dc bus properties with the conventional switching strategies.
  • FIG. 10b An illustration of simulation results for the above algorithm operating with a 4-cell CHB STATCOM circuit without using a PWM cell is shown in Fig. 10b.
  • Output waveform 220a, output pole current 230a, cell switch waveforms 240a, and DC bus voltages 250a are depicted.
  • Figs. 8a,b switching of the individual cells, the output voltage and current waveforms, as well as the DC voltages on the individual cells are depicted in Figs. 11a (with PWM cell) and 1 lb (without PWM cell).
  • the time scale is compressed so that the cell switching operation can be observed control period by control period
  • output voltage waveform 300 In Fig. 11a, output voltage waveform 300, output current waveform 302, the cell switch functions 304, and DC voltages 306 across each cell of the four cell H-bridge are depicted.
  • the output waveform 300 In the first five control periods 310, the output waveform 300 is in the converter pole discharging region. In the first control period 312, cell 1 is inactive, cells
  • the controller transitions to the fourth control period 318, it determines that the commanded voltage needs to be further reduced. Therefore, an additional cell must be transitioned to the inactive state to join cell 1. Since cell 4 is the only remaining cell it has the highest active voltage, Vdc, in an active state other than the PWM cell, cell 2, it is transitioned to the inactive state along with cells 1 and 3 and cell 2 continues to be the PWM cell. This process continues according to the algorithm described above with respect to Figs. 8a,b. Of note is the transition of the PWM cell between control period 7 and 8, where cell 3 becomes the PMW cell and cell 2 becomes inactive
  • the invention is equally applicable to alternate three-phase connections, including three phase WYE connected CHB STATCOMs, where the WYE point is tied to ground, and "DELTA" connected CHB STATCOMs, where the CHB legs are connected Line-to-Line (e.g one side of the first CHB phase is connected to grid phase "A" and the other side to grid phase "B", the second CHB phase is connected to grid phases B and C, and the third CHB phase is connected to grid phases C and A).
  • Applicable single phase topologies include phase to ground and phase to phase connected topologies.
  • SVM space vector modulation
  • the set of 3 commanded line-neutral voltages are augmented so as to extract more usable AC voltage from the converter for the DC bus voltage. This allows one to run the DC buses at a lower voltage for the same AC voltage.
  • Space vector modulation may similarly be implemented in the CHB STATCOM according to this invention. Further, this approach may be extended to discontinuous modulation, wherein for the three phase floating WYE topology, only two of the three converter poles would utilize a "PWM cell" at a given time and the third converter pole would not have a PWM cell.
  • the commanded line to line voltages would be maintained by adjusting accordingly the commanded voltages to the two converter poles that use PWM cell.
  • the phase which has no PWM cell would be rotated periodically amongst the three converter poles to spread out the loss benefit.
  • H-bridge converter cells comprised of other types of power electronics switches including, but not limited to, MOSFETs, Insulated Gate

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  • Engineering & Computer Science (AREA)
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Abstract

Cette invention concerne compensateur synchrone statique, comprenant au moins un pôle de convertisseur pour produire une première phase d'une forme d'onde de tension alternative ayant un cycle fondamental. La première phase de la forme d'onde de tension alternative comprend des régions alternées de charge et de décharge de pôle de convertisseur dans chaque cycle fondamental. Le(s) pôles de convertisseur comprennent une pluralité de cellules en pont en H en cascade, dont chacune comprend une source de tension continue et une pluralité de commutateurs. Les commutateurs peuvent être commutés de sorte à produire une pluralité d'états de commutation. Un dispositif de commande est configuré pour commander les états de commutation de la pluralité de commutateurs de chacune des cellules en pont en H en cascade sur la base des tensions de sources de tension en courant continu des cellules en pont en H et si la forme d'onde en CA est dans la région de charge de pôle de convertisseur ou la région de décharge de pôle de convertisseur.
EP17751178.9A 2017-07-27 2017-07-27 Schéma de commutation pour compensateurs synchrones statiques utilisant des convertisseurs en pont en h en cascade Withdrawn EP3659248A1 (fr)

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CN110597085B (zh) * 2019-08-20 2023-06-20 西安航天动力技术研究所 一种静止串联补偿器的仿真模型及分布式集群仿真系统
WO2022017617A1 (fr) * 2020-07-24 2022-01-27 Siemens Aktiengesellschaft Convertisseur et son procédé de fonctionnement
CN112311005B (zh) * 2020-09-29 2022-10-04 广西大学 一种单相多电平级联h桥变流器的装置及控制方法
DE102022109261B4 (de) 2022-04-14 2023-11-16 Dr. Ing. H.C. F. Porsche Aktiengesellschaft Verfahren zur Kompensation von Modulationsabweichungen bei einem modularen Multilevelkonverter

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