EP3376717A1 - Verbindungsentdeckungsverfahren und -vorrichtung - Google Patents

Verbindungsentdeckungsverfahren und -vorrichtung Download PDF

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Publication number
EP3376717A1
EP3376717A1 EP17765860.6A EP17765860A EP3376717A1 EP 3376717 A1 EP3376717 A1 EP 3376717A1 EP 17765860 A EP17765860 A EP 17765860A EP 3376717 A1 EP3376717 A1 EP 3376717A1
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EP
European Patent Office
Prior art keywords
plane device
forwarding plane
message
port
topology
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Granted
Application number
EP17765860.6A
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English (en)
French (fr)
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EP3376717B1 (de
EP3376717A4 (de
Inventor
Xinggui WU
Jiao Wang
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Huawei Technologies Co Ltd
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Huawei Technologies Co Ltd
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Publication of EP3376717A1 publication Critical patent/EP3376717A1/de
Publication of EP3376717A4 publication Critical patent/EP3376717A4/de
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00—Routing or path finding of packets in data switching networks
    • H04L45/02—Topology update or discovery
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L41/00—Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
    • H04L41/34—Signalling channels for network management communication
    • H04L41/344—Out-of-band transfers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00—Routing or path finding of packets in data switching networks
    • H04L45/26—Route discovery packet
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00—Routing or path finding of packets in data switching networks
    • H04L45/38—Flow based routing
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00—Routing or path finding of packets in data switching networks
    • H04L45/54—Organization of routing tables
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00—Routing or path finding of packets in data switching networks
    • H04L45/64—Routing or path finding of packets in data switching networks using an overlay routing layer
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/35—Switches specially adapted for specific applications
    • H04L49/355—Application aware switches, e.g. for HTTP
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/70—Virtual switches
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L41/00—Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
    • H04L41/12—Discovery or management of network topologies
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L41/00—Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
    • H04L41/34—Signalling channels for network management communication
    • H04L41/342—Signalling channels for network management communication between virtual entities, e.g. orchestrators, SDN or NFV entities
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00—Traffic control in data switching networks
    • H04L47/10—Flow control; Congestion control
    • H04L47/32—Flow control; Congestion control by discarding or delaying data units, e.g. packets or frames

Definitions

  • This application relates to the field of computer networks, and more specifically, to a link discovery method and an apparatus.
  • a controller regularly sends a packet_out request to a switch.
  • Each request corresponds to one port of the switch and instructs the switch to send an LLDP packet at the port.
  • the controller transmits, in each period, N*P packet_out request packets for link discovery.
  • N*P may reach an order of magnitude of tens of millions. Transmission of such a large quantity of packets in each period brings heavy load to a control channel, and also increases processing overheads on a control plane.
  • This application provides a link discovery method and an apparatus, to greatly reduce packets sent from a control plane device to a forwarding plane device and reduce processing overheads on a control plane.
  • a link discovery method including: sending, by a control plane device, a first message to a plurality of forwarding plane devices in a network to which the control plane device belongs, where the first message is used to instruct each forwarding plane device receiving the first message to send a topology discovery packet at all available ports of the forwarding plane device; receiving, by the control plane device, second messages respectively sent by the plurality of forwarding plane devices, where each of the second messages is generated, according to a first topology discovery packet received at a second port, by a second forwarding plane device sending the second message, the first topology discovery packet is a topology discovery packet sent by a first forwarding plane device in the plurality of forwarding plane devices at a first port, the first topology discovery packet carries identification information of the first forwarding plane device and identification information of the first port, and the second message carries the identification information of the first forwarding plane device, the identification information of the first port, identification information of the second forwarding plane device, and identification information of the second port; and
  • a specific implementation is: the first message carries a topology discovery packet sending period, and the first message is used to instruct the plurality of forwarding plane devices to use the topology discovery packet sending period as a sending period of the topology sending packet.
  • a specific implementation is: the first message is periodically sent by the control plane device.
  • the method before the control plane device sends the first message to the plurality of forwarding plane devices, the method further includes: sending, by the control plane device, a first flow entry to the plurality of forwarding plane devices, where the first flow entry is used to instruct the plurality of forwarding plane devices to forward a received topology discovery packet to the control plane device, where no timeout time is set for the first flow entry; or a first timeout time that is set for the first flow entry is greater than a preset threshold.
  • the method further includes: sending, by the control plane device, a second flow entry to the second forwarding plane device according to the first topology connection, where the second flow entry is used to instruct the second forwarding plane device to discard the first topology discovery packet, and a second timeout time related to a time at which the first topology connection becomes invalid is set for the second flow entry; receiving, by the control plane device, a third message sent by the second forwarding plane device, where the third message is generated by the second forwarding plane device after the second flow entry times out and no matching packet is obtained, and the third message is used to indicate that the second flow entry times out, is invalid, or is deleted; and determining, by the control plane device according to the third message, that the first topology connection is invalid, and deleting the first topology connection.
  • a control plane device configured to perform the method according to the first aspect or any possible implementation of the first aspect.
  • control plane device may include units configured to perform the method according to the first aspect or any possible implementation of the first aspect.
  • another control plane device including a memory and a processor.
  • the memory is configured to store an instruction.
  • the processor is configured to execute the instruction stored in the memory. The execution of the instruction stored in the memory causes the processor to perform the method according to the first aspect or any possible implementation of the first aspect.
  • a computer-readable storage medium configured to store a computer program.
  • the computer program includes an instruction used to perform the method according to the first aspect or any possible implementation of the first aspect.
  • a link discovery method includes: receiving, by a first forwarding plane device, a first message sent by a control plane device in a network to which the first forwarding plane device belongs, where the first message is used to instruct the first forwarding plane device to send a topology discovery packet at all available ports of the first forwarding plane device; and sending, by the first forwarding plane device, the topology discovery packet at each of all the available ports of the first forwarding plane device, where a first topology discovery packet sent at a first port carries identification information of the first forwarding plane device and identification information of the first port, a second forwarding plane device receiving the first topology discovery packet at a second port can send a second message to the control plane device according to the first topology discovery packet, and the second message carries the identification information of the first forwarding plane device, the identification information of the first port, identification information of the second forwarding plane device, and identification information of the second port.
  • a forwarding plane device configured to perform the method according to the fifth aspect.
  • the forwarding plane device may include units configured to perform the method according to the fifth aspect or any possible implementation of the fifth aspect.
  • another forwarding plane device including a memory and a processor.
  • the memory is configured to store an instruction.
  • the processor is configured to execute the instruction stored in the memory. The execution of the instruction stored in the memory causes the processor to perform the method according to the fifth aspect or any possible implementation of the fifth aspect.
  • a computer-readable storage medium configured to store a computer program.
  • the computer program includes an instruction used to perform the method according to the fifth aspect or any possible implementation of the fifth aspect.
  • a link discovery method includes: receiving, by a second forwarding plane device, a first flow entry sent by a control plane device, where the first flow entry instructs the second forwarding plane device to forward a received topology discovery packet to the control plane device; receiving, by the second forwarding plane device, the topology discovery packet at all available ports of the second forwarding plane device; sending, by the second forwarding plane device, a second message to the control plane device, where the second messages is generated by the second forwarding plane device according to a first topology discovery packet received at a second port, the first topology discovery packet is a topology discovery packet sent by a first forwarding plane device in the plurality of forwarding plane devices at a first port, the first topology discovery packet carries identification information of the first forwarding plane device and identification information of the first port, the second message carries the identification information of the first forwarding plane device, the identification information of the first port, identification information of the second forwarding plane device, and identification information of the second port, and the second message
  • a specific implementation is: if the second flow entry times out, is invalid, or is deleted, resetting, by the second forwarding plane device, the first flow entry to an effective state.
  • a forwarding plane device configured to perform the method according to the ninth aspect or any possible implementation of the ninth aspect.
  • the forwarding plane device may include units configured to perform the method according to the ninth aspect or any possible implementation of the ninth aspect.
  • another forwarding plane device including a memory and a processor.
  • the memory is configured to store an instruction.
  • the processor is configured to execute the instruction stored in the memory. The execution of the instruction stored in the memory causes the processor to perform the method according to the ninth aspect or any possible implementation of the ninth aspect.
  • a computer-readable storage medium configured to store a computer program.
  • the computer program includes an instruction used to perform the method according to the ninth aspect or any possible implementation of the ninth aspect.
  • the control plane device sends an instruction message to a forwarding plane device, to instruct the forwarding plane device to send a topology discovery packet at each port of the forwarding plane device; receives a message that is forwarded by another forwarding plane device and that carries identifiers of a receive end forwarding plane device, a receive end port, a transmit end forwarding plane, and a transmit end port; and further discovers a topology connection between the forwarding plane devices, so that packets sent from the control plane device to the forwarding plane device can be greatly reduced, thereby reducing processing overheads on a control plane.
  • Software-defined networking a technology of separating a control plane function and a forwarding plane function of a network device in which the control plane function and the forwarding plane function are integrated, unifying, in a logically centralized mode, the control plane function of the network device on a network controller, and globally managing and controlling the network device reserving the forwarding plane function and some control channel functions.
  • a control plane and a forwarding plane are separated, the forwarding plane reserves a basic packet forwarding capability, and a forwarding policy is generated by the control plane and is delivered to the forwarding plane.
  • the control plane After establishing a connection to the forwarding plane, the control plane discovers a connection between switch ports on the forwarding plane by using a link discovery technology, and then generates a topology instance of a network according to switch information and information about the connection between the switch ports.
  • Link discovery technology refers in particular to a link discovery technology applied to SDN in this application, and is a technology used by a control plane in the SDN to discover a connection relationship between switch ports on a forwarding plane.
  • FIG. 1 is a flowchart of a link discovery method according to this application.
  • the method in FIG. 1 is performed by a control plane device.
  • the control plane device in this application may be a network controller in SDN or the like.
  • the control plane device may further obtain identifiers of a plurality of forwarding plane devices in a network to which the control plane device belongs, identification information of a port of each forwarding plane device, and the like.
  • the control plane device is a network controller and the forwarding plane device is a switch
  • the network controller may obtain identification information of the switch by sending a features_request request, and obtain port information of the switch by sending a multipart_request request.
  • the control plane device may further send a first flow entry to the plurality of forwarding plane devices in the network to which the control plane device belongs, to instruct the forwarding plane devices to forward a received topology discovery packet to the control plane device.
  • the control plane device sends a first message to a plurality of forwarding plane devices in a network to which the control plane device belongs.
  • the first message is used to instruct each forwarding plane device receiving the first message to send a topology discovery packet at all available ports of the forwarding plane device.
  • the topology discovery packet may be an LLDP packet or the like.
  • the first message carries a topology discovery packet sending period, and the first message is used to instruct the first forwarding plane device to use the topology discovery packet sending period as a sending period of the first topology sending packet.
  • the network controller may instruct, by using a set_config message with an extended function, the switch to periodically send the LLDP packet at all the available ports.
  • a field may be newly added to a parameter in the set_config message to specify the sending period.
  • the first message is periodically sent by the control plane device.
  • the first message is sent by the control plane device in an event-triggered manner.
  • the control plane device receives second messages respectively sent by the plurality of forwarding plane devices.
  • Each of the second messages is generated, according to a first topology discovery packet received at a second port, by a second forwarding plane device sending the second message
  • the first topology discovery packet is a topology discovery packet sent by a first forwarding plane device in the plurality of forwarding plane devices at a first port
  • the first topology discovery packet carries identification information of the first forwarding plane device and identification information of the first port
  • the second message carries the identification information of the first forwarding plane device, the identification information of the first port, identification information of the second forwarding plane device, and identification information of the second port.
  • the identification information of the first forwarding plane device and the identification information of the first port that are carried in the second message may exist in the second message in a form of a topology discovery packet, that is, the second message may carry the first topology discovery packet. That is, the second message carries the first topology discovery packet, the identification information of the second forwarding plane device, and the identification information of the second port.
  • the second message may alternatively carry, in another manner, the identification information of the first forwarding plane device, the identification information of the first port, the identification information of the second forwarding plane device, and the identification information of the second port.
  • the first forwarding plane device sends the first topology discovery packet at the first port, if a connection (or a link) from the first forwarding plane device to the second forwarding plane device exists, there is certainly a port on the second forwarding plane device to receive the first topology discovery packet.
  • the second forwarding plane device may generate the second message according to the first topology discovery packet and send the second message to the control plane device.
  • the control plane device determines topology connections between the plurality of forwarding plane devices according to the second messages sent by the plurality of forwarding plane devices.
  • a first topology connection determined according to each of the second messages is a topology connection from the first port of the first forwarding plane device to the second port of the second forwarding plane device.
  • the control plane device may determine the topology connection from the first port of the first forwarding plane device to the second port of the second forwarding plane device according to the identification information of the first forwarding plane device, the identification information of the first port, the identification information of the second forwarding plane device, and the identification information of the second port that are carried in the second message.
  • a second topology discovery packet sent by the second forwarding plane device at the second port certainly can reach the first port of the first forwarding plane device.
  • the control plane device further receives another second message sent by the first forwarding plane device, so as to determine a topology connection from the second port of the second forwarding plane device to the first port of the first forwarding plane device.
  • the control plane device sends an instruction message to a forwarding plane device, to instruct the forwarding plane device to send a topology discovery packet at each port of the forwarding plane device; receives a message that is forwarded by another forwarding plane device and that carries identifiers of a receive end forwarding plane device, a receive end port, a transmit end forwarding plane, and a transmit end port; and further discovers a topology connection between the forwarding plane devices, so that packets sent from the control plane device to the forwarding plane device can be greatly reduced, thereby reducing processing overheads on a control plane.
  • the method may further include step 101.
  • the control plane device sends a first flow entry to the plurality of forwarding plane devices.
  • the first flow entry is used to instruct the plurality of forwarding plane devices to forward a received topology discovery packet to the control plane device.
  • no timeout time is set for the first flow entry. It should be understood that if no timeout time is set for the first flow entry, it means that the first flow entry does not become invalid due to a life period.
  • a first timeout time that is set for the first flow entry is greater than a preset threshold. It should be understood that when the first timeout time is set to a relatively large value, in a relatively long period (the first timeout time), the first flow entry does not become invalid due to a life period.
  • the method may further include step 140 to step 160.
  • the control plane device sends a second flow entry to the second forwarding plane device according to the first topology connection.
  • the second flow entry is used to instruct the second forwarding plane device to discard the first topology discovery packet, and a second timeout time related to a time at which the first topology connection becomes invalid is set for the second flow entry.
  • the control plane device receives a third message sent by the second forwarding plane device.
  • the third message is generated by the second forwarding plane device after the second flow entry times out and no matching packet is obtained.
  • the third message is used to indicate that the second flow entry times out, is invalid, or is deleted.
  • the control plane device determines, according to the third message, that the first topology connection is invalid, and deletes the first topology connection.
  • the second forwarding plane device is instructed to discard the first topology discovery packet, so that the second message is prevented from being forwarded to the control plane device in each period according to the topology discovery packet when the first topology connection is effective, and sending of a message indicating that the first topology connection is invalid is triggered only after the first topology connection becomes invalid. Therefore, after a connection has been discovered, a quantity of packets sent by a forwarding plane device to the control plane device due to invalidity of the discovered connection is greatly reduced, occupied control channel bandwidth is reduced, and processing overheads of the control plane device are reduced.
  • FIG. 2 is an interaction flowchart of link discovery and invalidity according to this application.
  • a control plane device is a network controller, that is, a controller shown in FIG. 2 .
  • a forwarding plane device is a switch, that is, a switch 1 and a switch 2 shown in FIG. 2 .
  • a method in this application is applied after a connection is established between a control plane device and a forwarding plane device in SDN.
  • the controller obtains identification information of the switch and identification information of a switch port.
  • a connection request for establishing the connection may be actively initiated by the controller to the switch, or may be actively initiated by the switch.
  • the controller may send a request message to all switches to request to obtain identification information of the switches and switch ports.
  • the controller may request to obtain the identification information of the switches by sending a features_request request, and request to obtain the identification information of the switch ports by sending a multipart_request request.
  • the controller sends a first flow entry.
  • the controller sends the first flow entry to all the switches to instruct the switches to forward a received LLDP packet to the controller.
  • no timeout time may be set for the flow entry, or a relatively long timeout time is set for the flow entry.
  • the controller may send the first flow entry in a plurality of message formats.
  • the controller may send the first flow entry by using a flow_mod message.
  • the controller sends a link discovery instruction.
  • the link discovery instruction in step 203 is the first message in step 110 in the embodiment shown in FIG. 1 .
  • the controller sends the link discovery instruction to all the switches to instruct the switches to send a topology discovery packet such as an LLDP packet at all the ports of the switches.
  • the controller may periodically send the link discovery instruction to all the switches.
  • the link discovery instruction further carries a sending period to instruct the switches to send the LLDP packet in the sending period.
  • the controller may send the link discovery instruction to all the switches according to results of triggering by some events.
  • the controller may send the link discovery instruction by using a set_config message or the like. Particularly, when the link discovery instruction further carries the sending period, the controller may add a field to the set_config message with an extended function to record the sending period.
  • the switch 1 sends an LLDP packet carrying identification information of a first port.
  • the LLDP packet in step 204 is the first topology discovery packet in step 120 in the embodiment shown in FIG. 1 .
  • the switch 1 may send the LLDP packet at all ports of the switch 1.
  • the LLDP packet sent at each port carries identification information of the port and identification information of the switch 1.
  • the switch 1 sends the LLDP packet at the first port, and the LLDP packet may carry the identification information of the first port and the identification information of the switch 1.
  • the switch 2 sends a packet_in message carrying the LLDP packet and identification information of a second port.
  • the packet_in message in step 205 is the second message in step 120 in the embodiment shown in FIG. 1 .
  • the switch 2 may encapsulate the LLDP packet in the packet_in message according to an instruction of the first flow entry, write the identification information of the second port into the packet_in message, and then send the packet_in message to the controller.
  • the packet_in message sent by the switch 2 carries the identification information, for example, a source Media Access Control (Media Access Control, MAC) address, of the switch 2 to indicate a source device sending the packet_in message.
  • MAC Media Access Control
  • the switch 2 may send, by using a message in another format, the LLDP packet, the identification information of the second port, and the identification information of the switch 2. This is not limited herein in this application.
  • the controller discovers a first topology connection from the first port to the second port.
  • the controller After receiving the packet_in message, the controller obtains the identification information of the switch 1 and the identification information of the first port according to the LLDP packet encapsulated in the packet_in message, and obtains the identification information of the second port that is written into the packet_in message.
  • the controller may further obtain the identification information, such as the MAC address, of the switch 2 according to a sending source of the switch 2, and further determine the switch 2.
  • the identification information such as the MAC address
  • the controller may determine the first topology connection from the first port of the switch 1 to the second port of the switch 2 according to the packet_in message sent by the switch 2.
  • the controller may determine, according to packet_in messages sent by all the switches in a network to which the controller belongs, topology connections between all the switches in the network to which the controller belongs, to implement a discovery process of a topology structure of the entire network.
  • the controller sends a second flow entry.
  • the controller may send the second flow entry to the switch 2 according to the first topology connection, set, for the second flow entry, a timeout time related to a time at which the first topology connection becomes invalid, and instruct the switch 2 not to forward the LLDP packet to the controller any longer when the switch 2 subsequently receives the LLDP packet at the second port.
  • controller further stores a mapping relationship between a cookie field in the second flow entry and a corresponding connection (the first topology connection).
  • the switch 2 makes the first flow entry invalid.
  • the switch 2 After receiving the second flow entry, the switch 2 temporarily makes the first flow entry invalid because a processing priority of the second flow entry is higher than that of the first flow entry.
  • the switch 2 discards the LLDP packet sent from the first port to the second port and deletes the second flow entry.
  • the switch 2 After the switch 2 receives again, at the second port, the LLDP packet sent by the switch 1, the LLDP packet is preferentially matched with the second flow entry and is discarded, and is not forwarded to the controller again.
  • the switch 2 may delete the second flow entry. Alternatively, the switch 2 may set the second flow entry to an invalid state or a timeout state.
  • the switch 2 sends a flow entry deletion instruction.
  • the switch 2 may send the flow entry deletion instruction, to notify the controller that the second flow entry has timed out, has been deleted, or has become invalid.
  • the switch 2 may send a flow_removed message to the controller.
  • the controller deletes the first topology connection.
  • the controller may learn, according to the flow_removed message, that the connection is invalid, obtain the invalid connection according to the returned cookie field in the flow_removed message, and delete the invalid connection.
  • the switch 2 makes the first flow entry effective again.
  • the switch 2 may resend the received LLDP packet to the controller after the connection becomes effective, so that the controller discovers the first topology connection.
  • FIG. 3 is a flowchart of another link discovery method according to this application.
  • the method in FIG. 3 is performed by a first forwarding plane device.
  • the first forwarding plane device may be a switch or the like.
  • the first forwarding plane device receives a first message sent by a control plane device in a network to which the first forwarding plane device belongs.
  • the first message is used to instruct the first forwarding plane device to send a topology discovery packet at all available ports of the first forwarding plane device.
  • the first forwarding plane device sends a topology discovery packet at each of all available ports of the first forwarding plane device.
  • a first topology discovery packet sent at a first port carries identification information of the first forwarding plane device and identification information of the first port.
  • a second forwarding plane device receiving the first topology discovery packet at a second port can send a second message to the control plane device according to the first topology discovery packet.
  • the second message carries the identification information of the first forwarding plane device, the identification information of the first port, identification information of the second forwarding plane device, and identification information of the second port.
  • the first forwarding plane device sends the topology discovery packet at all the available ports of the first forwarding plane device according to the second message of the control plane device, so that packets sent from the control plane device to a forwarding plane device can be reduced, thereby reducing processing overheads on a control plane.
  • FIG. 4 is a flowchart of another link discovery method according to this application.
  • the method in FIG. 4 is performed by a second forwarding plane device.
  • the second forwarding plane device may be a switch or the like.
  • the second forwarding plane device receives a first flow entry sent by a control plane device.
  • the first flow entry instructs the second forwarding plane device to forward a received topology discovery packet to the control plane device.
  • the second forwarding plane device receives a topology discovery packet at all available ports of the second forwarding plane device.
  • the second forwarding plane device sends a second message to the control plane device.
  • the second message is generated by the second forwarding plane device according to a first topology discovery packet received at a second port.
  • the first topology discovery packet is a topology discovery packet sent by a first forwarding plane device in the plurality of forwarding plane devices at a first port, and the first topology discovery packet carries identification information of the first forwarding plane device and identification information of the first port.
  • the second message carries the identification information of the first forwarding plane device, the identification information of the first port, identification information of the second forwarding plane device, and identification information of the second port, and the second message is used by the control plane device to establish a first topology connection from the first port of the first forwarding plane device to the second port of the second forwarding plane device.
  • the method may further include: generating, by the second forwarding plane device, the second message according to a received first topology discovery packet.
  • the second forwarding plane device receives a second flow entry sent by the control plane device according to the first topology connection.
  • the second flow entry is used to instruct the second forwarding plane device to make the first flow entry invalid and discard the first topology discovery packet, and a second timeout time related to a time at which the first topology connection becomes invalid is set for the second flow entry.
  • the second forwarding plane device sends a third message to the control plane device.
  • the third message is used to indicate that the second flow entry times out, is invalid, or is deleted, so that the control plane device determines, according to the third message, that the first topology connection is invalid, and deletes the first topology connection.
  • the second forwarding plane device discards the first topology discovery packet according to the instruction of the second flow entry of the control plane device, so that the second message is prevented from being forwarded to the control plane device in each period according to the topology discovery packet when the first topology connection is effective, and sending of a message indicating that the first topology connection is invalid is triggered only after the first topology connection is invalid. Therefore, after a topology connection has been discovered, a quantity of packets sent by a forwarding plane device to the control plane device due to invalidity of the discovered topology connection is greatly reduced, occupied control channel bandwidth is reduced, and processing overheads of a control device are reduced.
  • the second forwarding plane device resets the first flow entry to an effective state.
  • control plane device configured to perform the method performed by the control plane device in the embodiment shown in FIG. 1 or the method performed by the controller in the embodiment shown in FIG. 2 .
  • control plane device may include units configured to perform the method performed by the control plane device in the embodiment shown in FIG. 1 .
  • This application further discloses a forwarding plane device 1, configured to perform the method performed by the first forwarding plane device in the embodiment shown in FIG. 3 and the method performed by the switch 1 in the embodiment shown in FIG. 2 .
  • the first forwarding plane device may include units configured to perform the method performed by the first forwarding plane device in the embodiment shown in FIG. 3 .
  • This application further discloses a forwarding plane device 2, configured to perform the method performed by the second forwarding plane device in the embodiment shown in FIG. 4 and the method performed by the switch 2 in the embodiment shown in FIG. 2 .
  • the second forwarding plane device may include units configured to perform the method performed by the second forwarding plane device in the embodiment shown in FIG. 4 .
  • control plane device 2 A schematic structural diagram of a physical apparatus of the control plane device 2 may be shown as a physical apparatus 500 in FIG. 5 , and the control plane device 2 includes a processor 502, a memory 503, a transmitter 501, and a receiver 504.
  • the receiver 504, the transmitter 501, the processor 502, and the memory 503 are connected to each other by using a bus 505.
  • the bus 505 may be an ISA bus, a PCI bus, an EISA bus, or the like.
  • the bus may be classified into an address bus, a data bus, a control bus, or the like.
  • the bus is represented by using only one double-sided arrow. This, however, does not indicate that there is only one bus or only one type of bus.
  • the memory 503 is configured to store a program.
  • the program may include program code, and the program code includes a computer operation instruction.
  • the memory 503 may include a read-only memory and a random access memory, and provide an instruction and data to the processor 502.
  • the memory 503 may include a high-speed RAM memory, and may further include a non-volatile memory (non-volatile memory), for example, at least one magnetic disk memory.
  • the processor 502 executes the program stored in the memory 503.
  • the processor 502 may be configured to: perform the method in the embodiment shown in FIG. 1 , and implement functions of the control plane device in the embodiment shown in FIG. 1 , or implement functions of the controller in the embodiment shown in FIG. 2 .
  • the processor 502 may be an integrated circuit chip and has a signal processing capability. In an implementation process, the steps in the foregoing methods may be completed by using an integrated logical circuit of hardware in the processor 502 or instructions in a form of software in the processor 502.
  • the processor 502 may be a general purpose processor, including a central processing unit (Central Processing Unit, CPU for short), a network processor (Network Processor, NP for short), and the like; or may be a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field programmable gate array (FPGA), or another programmable logical device, discrete gate or transistor logic device, or discrete hardware assembly.
  • the processor may implement or perform the methods, steps, and logical block diagrams that are disclosed in this application.
  • the general purpose processor may be a microprocessor, or the processor may be any conventional processor, or the like.
  • the steps in the methods disclosed with reference to this application may be directly represented as being performed and completed by a hardware decoding processor, or being performed and completed by using a combination of hardware and software modules in the decoding processor.
  • the software module may be located in a mature storage medium in the art, such as a random access memory, a flash memory, a read-only memory, a programmable read-only memory, an electrically-erasable programmable memory, or a register.
  • the storage medium is located in the memory 503, and the processor 502 reads information in the memory 503 and completes the steps in the foregoing methods in combination with hardware of the processor 502.
  • This application further discloses a forwarding plane device 3, and a schematic structural diagram of a physical apparatus of the forwarding plane device 3 may be shown in FIG. 5 .
  • Physical units included in the forwarding plane device 3 are similar to the physical units included in the control plane device 2, and details are not described again.
  • the processor 502 may be configured to: perform the method in the embodiment shown in FIG. 3 , and implement functions of the first forwarding plane device in the embodiment shown in FIG. 3 , or implement functions of the switch 1 in the embodiment shown in FIG. 2 .
  • This application further discloses a forwarding plane device 4, and a schematic structural diagram of a physical apparatus of the forwarding plane device 4 may be shown in FIG. 5 .
  • Physical units included in the forwarding plane device 4 are similar to the physical units included in the control plane device 2, and details are not described again.
  • the processor 502 may be configured to: perform the method in the embodiment shown in FIG. 4 , and implement functions of the second forwarding plane device in the embodiment shown in FIG. 4 , or implement functions of the switch 2 in the embodiment shown in FIG. 2 .
  • This application further provides a computer-readable storage medium 1.
  • the computer-readable storage medium stores one or more programs.
  • the one or more programs include an instruction, and when executed by a portable electronic device including a plurality of application programs, the instruction can cause the portable electronic device to perform the method in the embodiment shown in FIG. 1 .
  • This application further provides a computer-readable storage medium 2.
  • the computer-readable storage medium stores one or more programs.
  • the one or more programs include an instruction, and when executed by a portable electronic device including a plurality of application programs, the instruction can cause the portable electronic device to perform the method in the embodiment shown in FIG. 3 .
  • This application further provides a computer-readable storage medium 3.
  • the computer-readable storage medium stores one or more programs.
  • the one or more programs include an instruction, and when executed by a portable electronic device including a plurality of application programs, the instruction can cause the portable electronic device to perform the method in the embodiment shown in FIG. 4 .
  • the disclosed system, apparatus, and method may be implemented in other manners.
  • the described apparatus embodiment is merely an example.
  • the unit division is merely logical function division and may be other division during actual implementation.
  • a plurality of units or components may be combined or integrated into another system, or some features may be ignored or not performed.
  • the displayed or discussed mutual couplings or direct couplings or communication connections may be implemented by using some interfaces.
  • the indirect couplings or communication connections between the apparatuses or units may be implemented in electronic, mechanical, or other forms.
  • the units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one position, or may be distributed on a plurality of network units. Some or all of the units may be selected according to actual requirements to achieve the objectives of the solutions of the embodiments.
  • the functions When the functions are implemented in the form of a software functional unit and sold or used as an independent product, the functions may be stored in a computer-readable storage medium.
  • the software product is stored in a storage medium, and includes several instructions for instructing a computer device (which may be a personal computer, a server, or a network device) to perform all or some of the steps of the methods described in the embodiments of this application.
  • the foregoing storage medium includes: any medium that can store program code, such as a USB flash drive, a removable hard disk, a read-only memory
  • ROM Read-Only Memory
  • RAM Random Access Memory
  • magnetic disk a magnetic disk, or an optical disc.

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
EP17765860.6A 2016-03-18 2017-03-16 Verbindungsentdeckungsverfahren und -vorrichtung Active EP3376717B1 (de)

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CN201610156065.4A CN107204924B (zh) 2016-03-18 2016-03-18 链路发现方法及装置
PCT/CN2017/076927 WO2017157318A1 (zh) 2016-03-18 2017-03-16 链路发现方法及装置

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Publication number Publication date
WO2017157318A1 (zh) 2017-09-21
CN107204924B (zh) 2020-09-25
EP3376717B1 (de) 2020-10-28
US10797986B2 (en) 2020-10-06
US20190020570A1 (en) 2019-01-17
CN107204924A (zh) 2017-09-26
EP3376717A4 (de) 2018-11-14

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