EP3367595B1

EP3367595B1 - Method for controlling self-interference duplication signal for removing self-interference in environment supporting full-duplex radio (fdr) communication, and apparatus therefor

Info

Publication number: EP3367595B1
Application number: EP15906751.1A
Authority: EP
Inventors: Dongkyu Kim; Donghyun Lee; Byung-Wook Min; Kwangseok Noh
Original assignee: LG Electronics Inc; Industry Academic Cooperation Foundation of Yonsei University
Current assignee: LG Electronics Inc; Industry Academic Cooperation Foundation of Yonsei University
Priority date: 2015-10-21
Filing date: 2015-10-21
Publication date: 2021-03-10
Anticipated expiration: 2035-10-21
Also published as: EP3367595A1; JP6517448B2; JP2018535625A; EP3367595A4; US10491260B2; US20180309475A1; WO2017069300A1

Description

[Technical Field]

The present invention relates to wireless communication, and more specifically, to a method for controlling a self-interference reference signal for self-interference cancellation in an environment supporting FDR and an apparatus therefor.

[Background Art]

Compared to conventional half duplex communication in which time or frequency resources are divided orthogonally, full duplex communication doubles a system capacity in theory by allowing a node to perform transmission and reception simultaneously.
FIG. 1 is a conceptual view of a UE and a Base Station (BS) which support Full Duplex Radio (FDR).
In the FDR situation illustrated in FIG. 1, the following three types of interference are produced.
Intra-device self-interference: Because transmission and reception take place in the same time and frequency resources, a desired signal and a signal transmitted from a BS or UE are received at the same time at the BS or UE. The transmitted signal is received with almost no attenuation at a Reception (Rx) antenna of the BS or UE, and thus with much larger power than the desired signal. As a result, the transmitted signal serves as interference.
UE to UE inter-link interference: An Uplink (UL) signal transmitted by a UE is received at an adjacent UE and thus serves as interference.
BS to BS inter-link interference: The BS to BS inter-link interference refers to interference caused by signals that are transmitted between BSs or heterogeneous BSs (pico, femto, and relay) in a HetNet state and received by an Rx antenna of another BS.
Among such three types of interference, intra-device self-interference (hereinafter, self-interference (SI)) is generated only in an FDR system to significantly deteriorate performance of the FDR system. Therefore, first of all, intra-device SI needs to be cancelled in order to operate the FDR system. US2005/226353 discloses a wireless communication system including two or more antennas and a cancellation device for cancelling interference between the antennas. US2012/230368 discloses interference-reducing circuits that include a feed-forward circuit for subtracting all or part of a desired transmitter-signal component from a signal coupled from the power amplifier's output path. US2011/171920 discloses systems and methods for reducing interference in the front-end of a communications receiver. US9136883 discloses an analog compensation circuit and a method for tuning an analog compensator in full-duplex transmission systems.

[Disclosure]

[Technical Problem]

An object of the present description is to provide a method by which an apparatus supporting Full Duplex Radio (FDR) controls a self-interference reference signal for self-interference cancellation.
Another object of the present description is to provide an apparatus for controlling a self-interference reference signal for self-interference cancellation in an environment supporting FDR.
It is to be understood that technical objects to be achieved by the present invention are not limited to the aforementioned technical objects and other technical objects which are not mentioned herein will be apparent from the following description to one of ordinary skill in the art to which the present invention pertains.

[Technical Solution]

To accomplish the objects, a method for controlling a self-interference reference signal for self-interference cancellation according to claim 1 is provided.
To accomplish the objects, an apparatus for controlling a self-interference reference signal for self-interference cancellation according to claim 9 is provided.

[Advantageous Effects]

According to an embodiment of the present invention, it is possible to trace and compensate for self-interference channel variation and circuit fault over time.
Furthermore, it is possible to maintain high self-interference cancellation performance while continuously receiving a desired reception signal by controlling a self-interference reference generator using two reference signals at frequencies of guard bands at both edges of a communication band.
In addition, it is possible to efficiently control a self-interference reference generator using two reference signals in an in-band by separating a data communication time from a self-interference reference generator control time.
It will be appreciated by persons skilled in the art that the effects that can be achieved with the present invention are not limited to what has been particularly described hereinabove and other advantages of the present invention will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings.

[Description of Drawings]

The accompanying drawings, which are included to provide a further understanding of the invention, illustrate embodiments of the invention and together with the description serve to explain the principle of the invention.

FIG. 1 is a diagram illustrating a network supporting full duplex/half duplex communication methods of UEs proposed by the present invention.
FIG. 2 is a block diagram showing configurations of a base station 105 and a UE 110 in a wireless communication system 100.
FIG. 3 illustrates the concept of a transmission/reception link and self-interference (SI) in RF chains of a communication apparatus in an FDR communication situation.
FIG. 4 is a diagram showing an RF chain (or RF front-end) structure of a communication apparatus for cancelling self-interference signals according to the present invention.
FIG. 5 is a diagram showing an RF chain of a communication apparatus for performing normal full duplex radio (FDR).
FIG. 6 is a diagram showing a method for controlling generation of a self-interference reference signal for self-interference cancellation in an FDR communication environment and an example of an RF chain structure for the same.
FIG. 7 is a diagram showing an example of a specific configuration of a controller 620 in FIG. 6.
FIG. 8 is a diagram showing an example of a specific configuration of the controller 620 in FIG. 6.
FIG. 9 is a diagram showing a method of transmitting reference signals for a method of stopping communication and controlling a self-interference reference generator in accordance with self-interference channel situation, and FIG. 10 is a diagram showing a method of transmitting reference signals for a method of controlling a self-interference reference generator while performing communication.
FIG. 11 is a diagram showing the concept of a process of tracing an optimal point starting from an initial start point when the power of a self-interference signal is controlled to be minimized using a phase shifter, an attenuator and a feedback loop, as shown in FIG. 7.
FIG. 12 is a diagram showing the concept of a process of tracing an optimal point starting from an initial start point when the power of a self-interference signal is controlled to be minimized using a phase shifter, an attenuator and a feedback loop, as shown in FIG. 8.

[Best Mode]

Reference will now be made in detail to the preferred embodiments of the present invention, examples of which are illustrated in the accompanying drawings. In the following detailed description of the invention includes details to help the full understanding of the present invention. Yet, it is apparent to those skilled in the art that the present invention can be implemented without these details. For instance, although the following descriptions are made in detail on the assumption that a mobile communication system includes 3GPP LTE system, the following descriptions are applicable to other random mobile communication systems in a manner of excluding unique features of the 3GPP LTE.
Occasionally, to prevent the present invention from getting vaguer, structures and/or devices known to the public are skipped or can be represented as block diagrams centering on the core functions of the structures and/or devices. Wherever possible, the same reference numbers will be used throughout the drawings to refer to the same or like parts.
Besides, in the following description, assume that a terminal is a common name of such a mobile or fixed user stage device as a user equipment (UE), a mobile station (MS), an advanced mobile station (AMS) and the like. And, assume that a base station (BS) is a common name of such a random node of a network stage communicating with a terminal as a Node B (NB), an eNode B (eNB), an access point (AP) and the like. Although the present specification is described based on IEEE 802.16m system, contents of the present invention may be applicable to various kinds of other communication systems.
In a mobile communication system, a user equipment is able to receive information in downlink and is able to transmit information in uplink as well. Information transmitted or received by the user equipment node may include various kinds of data and control information. In accordance with types and usages of the information transmitted or received by the user equipment, various physical channels may exist.
The following descriptions are usable for various wireless access systems including CDMA (code division multiple access), FDMA (frequency division multiple access), TDMA (time division multiple access), OFDMA (orthogonal frequency division multiple access), SC-FDMA (single carrier frequency division multiple access) and the like. CDMA can be implemented by such a radio technology as UTRA (universal terrestrial radio access), CDMA 2000 and the like. TDMA can be implemented with such a radio technology as GSM/GPRS/EDGE (Global System for Mobile communications)/General Packet Radio Service/Enhanced Data Rates for GSM Evolution). OFDMA can be implemented with such a radio technology as IEEE 802.11 (Wi-Fi), IEEE 802.16 (WiMAX), IEEE 802.20, E-UTRA (Evolved UTRA), etc. UTRA is a part of UMTS (Universal Mobile Telecommunications System). 3GPP (3rd Generation Partnership Project) LTE (long term evolution) is a part of E-UMTS (Evolved UMTS) that uses E-UTRA. The 3GPP LTE employs OFDMA in DL and SC-FDMA in UL. And, LTE-A (LTE-Advanced) is an evolved version of 3GPP LTE.
Moreover, in the following description, specific terminologies are provided to help the understanding of the present invention. And, the use of the specific terminology can be modified into another form within the scope of the technical idea of the present invention.
FIG. 2 is a block diagram for configurations of a base station 105 and a user equipment 110 in a wireless communication system 100.
Although one base station 105 and one user equipment 110 (D2D user equipment included) are shown in the drawing to schematically represent a wireless communication system 100, the wireless communication system 100 may include at least one base station and/or at least one user equipment.
Referring to FIG. 2, a base station 105 may include a transmitted (Tx) data processor 115, a symbol modulator 120, a transmitter 125, a transceiving antenna 130, a processor 180, a memory 185, a receiver 190, a symbol demodulator 195 and a received data processor 197. And, a user equipment 110 may include a transmitted (Tx) data processor 165, a symbol modulator 170, a transmitter 175, a transceiving antenna 135, a processor 155, a memory 160, a receiver 140, a symbol demodulator 155 and a received data processor 150. Although the base station/user equipment 105/110 includes one antenna 130/135 in the drawing, each of the base station 105 and the user equipment 110 includes a plurality of antennas. Therefore, each of the base station 105 and the user equipment 110 of the present invention supports an MIMO (multiple input multiple output) system. And, the base station 105 according to the present invention may support both SU-MIMO (single user-MIMO) and MU-MIMO (multi user-MIMO) systems.
In downlink, the transmission data processor 115 receives traffic data, codes the received traffic data by formatting the received traffic data, interleaves the coded traffic data, modulates (or symbol maps) the interleaved data, and then provides modulated symbols (data symbols). The symbol modulator 120 provides a stream of symbols by receiving and processing the data symbols and pilot symbols.
The symbol modulator 120 multiplexes the data and pilot symbols together and then transmits the multiplexed symbols to the transmitter 125. In doing so, each of the transmitted symbols may include the data symbol, the pilot symbol or a signal value of zero. In each symbol duration, pilot symbols may be contiguously transmitted. In doing so, the pilot symbols may include symbols of frequency division multiplexing (FDM), orthogonal frequency division multiplexing (OFDM), or code division multiplexing (CDM).
The transmitter 125 receives the stream of the symbols, converts the received stream to at least one or more analog signals, additionally adjusts the analog signals (e.g., amplification, filtering, frequency upconverting), and then generates a downlink signal suitable for a transmission on a radio channel. Subsequently, the downlink signal is transmitted to the user equipment via the antenna 130.
In the configuration of the user equipment 110, the receiving antenna 135 receives the downlink signal from the base station and then provides the received signal to the receiver 140. The receiver 140 adjusts the received signal (e.g., filtering, amplification and frequency downconverting), digitizes the adjusted signal, and then obtains samples. The symbol demodulator 145 demodulates the received pilot symbols and then provides them to the processor 155 for channel estimation.
The symbol demodulator 145 receives a frequency response estimated value for downlink from the processor 155, performs data demodulation on the received data symbols, obtains data symbol estimated values (i.e., estimated values of the transmitted data symbols), and then provides the data symbols estimated values to the received (Rx) data processor 150. The received data processor 150 reconstructs the transmitted traffic data by performing demodulation (i.e., symbol demapping, deinterleaving and decoding) on the data symbol estimated values.
The processing by the symbol demodulator 145 and the processing by the received data processor 150 are complementary to the processing by the symbol modulator 120 and the processing by the transmission data processor 115 in the base station 105, respectively.
In the user equipment 110 in uplink, the transmission data processor 165 processes the traffic data and then provides data symbols. The symbol modulator 170 receives the data symbols, multiplexes the received data symbols, performs modulation on the multiplexed symbols, and then provides a stream of the symbols to the transmitter 175. The transmitter 175 receives the stream of the symbols, processes the received stream, and generates an uplink signal. This uplink signal is then transmitted to the base station 105 via the antenna 135.
In the base station 105, the uplink signal is received from the user equipment 110 via the antenna 130. The receiver 190 processes the received uplink signal and then obtains samples. Subsequently, the symbol demodulator 195 processes the samples and then provides pilot symbols received in uplink and a data symbol estimated value. The received data processor 197 processes the data symbol estimated value and then reconstructs the traffic data transmitted from the user equipment 110.
The processor 155/180 of the user equipment/base station 110/105 directs operations (e.g., control, adjustment, management, etc.) of the user equipment/base station 110/105. The processor 155/180 may be connected to the memory unit 160/185 configured to store program codes and data. The memory 160/185 is connected to the processor 155/180 to store operating systems, applications and general files.
The processor 155/180 may be called one of a controller, a microcontroller, a microprocessor, a microcomputer and the like. And, the processor 155/180 may be implemented using hardware, firmware, software and/or any combinations thereof. In the implementation by hardware, the processor 155/180 may be provided with such a device configured to implement the present invention as ASICs (application specific integrated circuits), DSPs (digital signal processors), DSPDs (digital signal processing devices), PLDs (programmable logic devices), FPGAs (field programmable gate arrays), and the like.
Meanwhile, in case of implementing the embodiments of the present invention using firmware or software, the firmware or software may be configured to include modules, procedures, and/or functions for performing the above-explained functions or operations of the present invention. And, the firmware or software configured to implement the present invention is loaded in the processor 155/180 or saved in the memory 160/185 to be driven by the processor 155/180.
Layers of a radio protocol between a user equipment/base station and a wireless communication system (network) may be classified into 1st layer L1, 2nd layer L2 and 3rd layer L3 based on 3 lower layers of OSI (open system interconnection) model well known to communication systems. A physical layer belongs to the 1st layer and provides an information transfer service via a physical channel. RRC (radio resource control) layer belongs to the 3rd layer and provides control radio resourced between UE and network. A user equipment and a base station may be able to exchange RRC messages with each other through a wireless communication network and RRC layers.
In the present specification, although the processor 155/180 of the user equipment/base station performs an operation of processing signals and data except a function for the user equipment/base station 110/105 to receive or transmit a signal, for clarity, the processors 155 and 180 will not be mentioned in the following description specifically. In the following description, the processor 155/180 can be regarded as performing a series of operations such as a data processing and the like except a function of receiving or transmitting a signal without being specially mentioned.
FIG. 3 illustrates the concept of a transmission/reception link and self-interference (SI) in RF chains of a communication apparatus in an FDR communication situation.
As shown in FIG. 3, self-interference signals may be divided into direct interference produced when a signal transmitted from a transmission antenna is directly input to a reception antenna without pathloss and reflected interference produced when the signal is reflected due to surrounding geographical features, and the intensity of the self-interference signals is extremely greater than a desired signal due to a physical distance difference. It is necessary to effectively cancel self-interference signals for FDR system operation because of extremely high interference intensity.
FIG. 4 is a diagram showing an RF chain (or RF front-end) structure of a communication apparatus for self-interference signal cancellation according to the present invention.
Since it is difficult for 90° directional couplers used as a transmitted signal divider (TX divider) and a received signal subtractor (RX subtracter) to generate a perfect 90° phase difference, it is difficult to generate exact 180° phase difference between a self-interference signal and a reference self-interference signal. In addition, the phases of self-interference signals change when the signals pass through antennas and communication channels, and thus self-interference cancellation is impossible even if an exact 180° phase difference between the self-interference signals is generated. To solve this problem, addition of a phase shifting circuit (or phase shifter) to a reference self-interference signal generator including an attenuator and a time delayer (true time delay or true time delay circuit) as shown in FIG. 4 may be conceived. The true time delay refers to a circuit for shifting a signal in parallel over time when the signal is viewed in the time domain. The true time delay refers to a circuit for linearly shifting the phase of a signal over frequency (changing a phase-to-frequency gradient) when the signal is viewed in the frequency domain. The phase shifter refers to a circuit for shifting the phase of a signal while maintaining a phase-to-frequency gradient in the entire frequency domain when the signal is viewed in the frequency domain.
In FIG. 4, the phase shifter is positioned between the attenuator and the true time delay, attenuates a signal coming from the TX divider, delays the phase of the signal, delays time of the phase-delayed signal and sends the signal to a receiving end. However, the position of the phase shifter is not limited thereto. In this manner, a phase delay value for application of phase delay may be determined as a value that makes the sum of a reference self-interference signal and a self-interference signal to which the phase delay value is applied become less than a predetermined value (e.g., -30 dB).
As shown in FIG. 4, the RF chain requires a self-interference reference signal generator for self-interference signal cancellation in the FDR communication environment, and the self-interference reference signal generator needs to include the attenuator, the phase shifter and the true time delay. There are three variables that need to be controlled in order to reference a self-interference channel, and the variables are bias voltages applied to the attenuator, the phase shifter and the delayer (the true time delay or true time delay circuit).
A method of controlling the circuits is chronologically described. First, attenuation of an SI reference path is maximized in order to estimate an SI channel in a modem, and then a test transmission signal is transmitted to measure the SI channel. Control voltage 1, control voltage 2 and control voltage 3 which are the best voltages capable of referencing the SI channel are output to an SI reference generator.
FIG. 5 is a diagram showing an RF chain of a communication apparatus for performing normal FDR.
In FIG. 5, to detect the best control voltage 1 (i.e., voltage input to a true time delay), control voltage 2 (voltage input to a phase shifter) and control voltage 3 (voltage input to an attenuator), SI channel estimation needs to be performed first. Here, an SI reference path and a desired RX signal should not be applied. That is, there is a problem that a mechanism for controlling an SI reference generator does not continuously operate in time. Furthermore, even though perfect SI channel estimation has been performed, detection of best control voltage 1, control voltage 2 and control voltage 3 according thereto requires very precise calibration of SI reference path channels according to combination of control voltage 1, control voltage 2 and control voltage 3 of the SI signal reference generator. A look-up table of SI reference path channels needs to be created on the basis of combinations of control voltage 1, control voltage 2 and control voltage 3. Even when a look-up table which is correct at a specific TX power and temperature has been created, this varies according to original TX power and circuit temperature and thus SI cancellation performance may deteriorate due to a calibration error, current TX power and temperature, and a condition difference at look-up table creation time. Methods for solving this problem will be described as various embodiments below.
FIG. 6 is a diagram showing a method for controlling generation of an SI reference signal for SI cancellation in an FDR communication environment and an example of an RF chain structure therefor.
Referring to FIG. 6, an RF chain 610 of a communication apparatus may include a controller 620, an SI reference generator 630, a TX antenna 640 and an RX antenna 650. The controller 620 may include a Fast Fourier Transform (FFT) unit 627 and integrators 621, 623 and 625.
To control most accurate SI reference signal generation, an analog attenuator 633, an analog phase shifter 635 and an analog true time delay 637 are used and thus digital-to-analog converters (DACs) 661, 6653 and 665 for converting control signals output from the controller 620 into analog signals are provided.
True time delay cannot be controlled only using information at a single frequency due to the concept of true time delay defined as a phase shift-to-frequency band gradient. Accordingly, information at two or more frequencies needs to be known in order to perform SI cancellation (SIC) over a wide band and thus two pilots, two reference signals or two tones, which are test signals, are assumed.
To control an SI reference generator including only an attenuator and a phase shifter, acquisition of information for control is sufficient only using a single tone. A method proposed by the present invention is a normal feedback control method capable of controlling any type of SI reference generator to minimize a specific quantity (power of an SI signal) and thus is applicable to the aforementioned SI reference generator.
In the present invention, the method for controlling an SI reference generator may be normalized as shown in FIG. 6. The SI reference generator is controlled in such a manner that two pilot signals, two reference signals or two tones, which are test signals S_IL and S_IH, are transmitted and a receiving end checks the two pilot signals, two reference signals or two tones corresponding to the test signals and minimizes the test signals. Here, a current control signal is automatically calculated in a feedback loop based on the current power and a previous control signal in the controller 620. Calculation and control in the controller 620 of FIG. 6 are illustrated in detail in FIGS. 7 and 8 and operation principles are as follows.
Meanwhile, loop gains K₁, K₂ and K₃ in FIG. 6 may be considered to be a step size for detecting control voltages 1, 2 and 3 and they function as follows. If a very large loop gain is set when each feedback loop operates to detect control voltages 1, 2 and 3 for minimizing an SI signal, control voltages 1, 2 and 3 suitable for the environment can be detected very rapidly. However, when a very large loop gain is set, an error is considerable when a control value error is generated and the feedback loop may oscillate even after stabilization, resulting in deterioration of accuracy of SI cancellation performance. On the contrary, if a very small loop gain is set, control voltages 1, 2 and 3 are detected very slowly but an error is insignificant when a control value error is generated and SI cancellation performance is very high after stabilization. That is, a large loop gain may be set such that the SI reference generator can follow surrounding environment variation if the surrounding environment of antennas changes very rapidly, whereas a small loop gain may be set to improve SI cancellation performance if the surrounding environment of the antennas changes slowly. In this manner, a user can set an optimal loop gain depending on surrounding environment change. That is, loop gains K₁, K₂ and K₃ may be variably controlled according to antenna environment variation.
FIG. 7 is a diagram showing an example of a specific configuration of the controller 620 in FIG. 6.
FIG. 7 illustrates a method of using SI_L to control the phase shifter and the attenuator of the SI reference generator and using SI_H along with SI_L to control the delayer (the true time delay or true time delay circuit), the role of SI_H and SI_L may reversed from each other. The first tone SI_L is used to control the phase shifter and the attenuator of the SI reference generator (controlling for control voltage 2 and control voltage 3 in FIG. 7) and the second tone SI_H is used along with SI_L to control the delayer (the true time delay or true time delay circuit). A method of controlling the phase shifter and the attenuator is as follows. When a transmitting end of an apparatus transmits SI_L, a receiving end measures the power of SI_L and configures feedback loops for controlling the phase shifter and the attenuator based on information on the measured power of SI_L as shown in FIG. 7.
Two of the three elements of the attenuator, the phase shifter and the true time delay in the SI reference generator may be controlled using SI_L and the remaining element may be controlled using SI_H. On the contrary, two elements may be controlled using SI_H and the remaining element may be controlled using SI_L.
The feedback loops are composed of appropriate loop gains and integrators, and optimal control voltages 2 and 3 for minimizing the power of SI_L received at a reception channel are detected using the feedback loops. Any functions may be used as functions for operating the two control loops if the functions are two orthogonal periodic functions. The two orthogonal periodic functions serve to search all directions in a variable domain (which can be represented as a two-dimensional plane if the number of variables to be controlled is 2). For example, a square wave, sine and cosine functions correspond thereto. The two orthogonal signals can be orthogonal when they are time averaged.
On the other hand, control voltage 1 for controlling the delayer (the true time delay or true time delay circuit) cannot be controlled using only information of a single frequency due to characteristics of time delay and thus is detected using the information along with the power of the reference signal SI_H. To control control voltage 1 independently of control voltage 2 and control voltage 3, a feedback loop for detecting control voltage 1 may be configured of any function if it is orthogonal to the aforementioned two functions configuring the feedback loops for detecting control voltages 2 and 3. For example, the function of the loop may be set to half or a multiple of the frequency of the loop functions controlling control voltages 2 and 3, as illustrated in FIG. 7, and control voltage 1 automatically follows to minimize the power of SI_H as in the aforementioned two loops.
Assume that the phase shifter and the attenuator are controlled using the reference signal SI_L and the true time delay is controlled using the reference signal SI_H, for example. SI_L may be composed of the sum of orthogonal functions because it needs to control the two elements, the phase shifter 635 and the attenuator 637. For example, the reference signal SI_L may be configured as SI_L = sin(wt) + cos(wt) and the reference signal SI_H may be configured as S_IH = sin(2wt). The reference signal S_IL = sin(wt) + cos(wt) and the reference signal S_IH = sin(2wt) are two orthogonal periodic functions.
Accordingly, when a transmission chain transmits SI_L = sin(wt) + cos(wt) and SI_H = sin(2wt), an FFT unit of a reception chain can separate sin(wt) and cos(wt) and separate SI_H = sin(2wt). Then, the FFT unit 627 may output the separated signals sin(wt) and cos(wt) to the circuit having the phase shifter loop gain K₂ and the circuit having the attenuator loop gain K₃ in order to control the phase shifter and the attenuator. The FFT unit may output the signal SI_H = sin(2wt) to the circuit having the true time delay loop gain K₁. That is, the signals output from the FFT unit are respectively multiplied by the phase shifter loop gain K₂, the attenuator loop gain K₃ and the true time delay loop gain K₁ and then input to the integrators included in the respective circuits.
Signals output from the integrators are converted into analog signals through the DACs and then used to control the true time delay, the phase shifter and the attenuator. When the reference signals SI_L and SI_H are transmitted after the aforementioned loop, the reception chain receives a "desired RX signal + SI - signal SI_REF generated in the SI reference generator", and this loop is repeated until "SI - SI_REF generated in the SI reference generator" is minimized.
FIG. 8 is a diagram showing an example of a specific configuration of the controller 620 in FIG. 6.
FIG. 8 shows a configuration in which the phase shifter, the attenuator and the delayer (the true time delay or true time delay circuit) of the SI reference generator are simultaneously controlled to minimize the sum of SI_L and SI_H. FIG. 8 is distinguished from FIG. 7 in that the SI reference generator is controlled using a single variable corresponding to the sum of SI_L and SI_H to be minimized instead of SI_L and SI_H. In addition, power checking or measurement is performed through a method of changing control voltage 1 and checking power, changing control voltage 2 and checking power and then changing control voltage 3 and checking power, instead of a method of simultaneously controlling control voltages 1, 2 and 3 applied to blocks of the SI reference generator and then checking power, that is, through a feedback method according to sequential control instead of a feedback method for simultaneously changing all control voltages and checking power. FIG. 12 illustrates a conceptual operation principle. This method has an advantage of rapid convergence on an optimal point only with a small number of iterations in the SI reference generator.
Methods for controlling the SI reference generator according to the present invention may be classified into two methods. The first method is a method of stopping communication and controlling the SI reference generator in accordance with SI channel situation and the second method is a method of controlling the SI reference generator while performing communication.
FIG. 9 is a diagram showing a method of transmitting reference signals for the method of stopping communication and controlling the SI reference generator in accordance with SI channel situation and FIG. 10 is a diagram showing a method of transmitting reference signals for the method of controlling the SI reference generator while performing communication.
In both the methods, a transmission chain transmits two reference signals SI_L, and SI_H (pilot signals or tones) in FIGS. 9 and 10 in order to recognize an SI channel situation, a reception chain measures power of the two reference signals at frequencies corresponding to the two reference signals, and the SI reference generator is controlled on the basis of information on the measurement result.
In the first method, a data communication time and an SI reference generator control time are separately set because two reference signals (pilot signals or tones) are transmitted within a data communication band. In the second method, the SI reference generator can be controlled simultaneously with data communication because the reference signals are respectively transmitted at frequencies in guard bands positioned at both edges of a data communication band, as shown in FIG. 10. Since the SI reference generator is controlled on the basis of only power at the frequencies corresponding to the two reference signals input to the reception chain in the present invention, signal processing burden can be remarkably reduced compared to channel estimation performed in normal communication.
FIG. 11 is a diagram showing the concept of a process of tracing an optimal point starting from an initial start point when the power of an SI signal is controlled to be minimized using a phase shifter, an attenuator and a feedback loop, as shown in FIG. 7.
FIG. 11 illustrates how control voltages 1, 2 and 3 for controlling the phase shifter and the attenuator trace the optimal point from the initial start point in the case of FIG. 7. The figure shows a process of tracing the optimal point in a direction in which the power of SI_L (or SI_H) is reduced while drawing circles around the initial start point according to a sine function and a cosine function, and integrators set in feedback loops shift current variable points in the corresponding direction.
FIG. 12 is a diagram showing the concept of a process of tracing an optimal point starting from an initial start point when the power of an SI signal is controlled to be minimized using a phase shifter, an attenuator and a feedback loop, as shown in FIG. 8.
FIG. 12 illustrates how control voltages 2 and 3 for controlling the phase shifter and the attenuator trace the optimal point from the initial start point in the case of FIG. 8. In this case, time delay also traces an optimal point in a similar manner if the process can be three-dimensionally described.
As described above, the methods according to an embodiment of the present invention can be continuously performed in time, differently from the conventional method having a procedure of measuring an SI channel, pre-calibrating an SI reference generator and creating a look-up table of the SI reference generator to control the SI reference generator, and thus can trace and compensate for SI channel variation and circuit fault with time in real time. In addition, since the SI reference generator is controlled using two reference signals at frequencies of guard bands of both edges of a communication band, it is possible to maintain high SI cancellation performance while continuously receiving a desired RX signal. Furthermore, it is possible to efficiently control the SI reference generator using two reference signals in an in-band by separating a data communication time from an SI reference generator control time.

[industrial Applicability]

The method of controlling an SI reference signal for SI cancellation in an environment supporting FDR and the apparatus therefor are applicable to various wireless communication systems.

Claims

A method for controlling a self-interference reference signal for self-interference cancellation, by an apparatus (105, 110) supporting full duplex radio, FDR, mode, the method comprising;
transmitting a first reference signal and a second reference signal,
wherein the first reference signal and the second reference signal are orthogonal from each other;
measuring powers of the first reference signal and the second reference signal received as self-interference signals; and
controlling:
a phase shifter, among the phase shifter, an attenuator and a time delay element, based on a measured power of a first signal included in the first reference signal,

the attenuator, among the phase shifter, the attenuator and the time delay element, based on a measured power of a second signal included in the first reference signal, and

the time delay element, among the phase shifter, the attenuator and the time delay element, based on a measured power of the second reference signal,
wherein the first reference signal is composed of a sum of the first signal and the second signal which are orthogonal from each other, and
wherein the phase shifter, the attenuator and the time delay element are included in a self-interference reference generator configured to obtain the self-interference reference signal.
The method of claim 1, wherein the first reference signal is a frequency signal within a guard band positioned at an edge of a lower frequency in a data communication band of the apparatus (105, 110).
The method of claim 1, wherein the second reference signal is a frequency signal within a guard band positioned at an edge of a higher frequency in a data communication band of the apparatus (105, 110).
The method of claim 1, further comprising:
detecting separately the first signal and the second signal from each other.
The method of claim 4, wherein the separately detected first signal is used to control the phase shifter and the separately detected second signal is used to control the attenuator.
The method of claim 1, wherein the phase shifter and the attenuator are controlled to minimize the measured power of the first reference signal and the time delay element is controlled to minimize the measured power of the second reference signal.
An apparatus (105, 110) for controlling a self-interference reference signal for self-interference cancellation in an environment supporting full duplex radio, FDR, mode, the apparatus (105, 110) comprising;
a transmitting end (125, 175); a receiving end (140, 190);
a self-interference generator comprising a phase shifter, an attenuator and a time delay element, wherein the self-interference generator is configured to generate the self-interference reference signal; and
at least one processor (155, 180) coupled with the transmitting end (125, 175), the receiving end (140, 190) and the self-interference generator, wherein the at least one processor (155, 180) is configured to:
transmit a first reference signal and a second reference signal,
wherein the first reference signal and the second reference signal are orthogonal from each other;

measure powers of the first reference signal and the second reference signal received as self-interference signals; and

control:
a phase shifter, among the phase shifter, the attenuator and the time delay element, based on a measured power of a first signal included in the first reference signal,

the attenuator, among the phase shifter, the attenuator and the time delay element, based on a measured power of a second signal included in the first reference signal, and

the time delay element, among the phase shifter, the attenuator and the time delay element, based on a measured power of the second reference signal,

wherein the first reference signal is composed of a sum of the first signal and the second signal which are are orthogonal from each other.
The apparatus (105, 110) of claim 7, wherein the first reference signal is a frequency signal within a guard band positioned at an edge of a lower frequency in a data communication band of the apparatus (105, 110).
The apparatus (105, 110) of claim 7, wherein the second reference signal is a frequency signal within a guard band positioned at an edge of a higher frequency in the data communication band of the apparatus (105, 110).
The apparatus (105, 110) of claim 7, wherein the at least one processor (155, 180) is further configured to detect separately the first signal and the second signal from each other.
The apparatus (105, 110) of claim 10, wherein the phase shifter and the attenuator are controlled to minimize the measured power of the first reference signal and the time delay element is controlled to minimize the measured power of the second reference signal.