EP3325689A4 - Lithografisches verfahren zur verkapselung von gemusterten dünnschichtbeschichtungen - Google Patents

Lithografisches verfahren zur verkapselung von gemusterten dünnschichtbeschichtungen Download PDF

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Publication number
EP3325689A4
EP3325689A4 EP16825231.0A EP16825231A EP3325689A4 EP 3325689 A4 EP3325689 A4 EP 3325689A4 EP 16825231 A EP16825231 A EP 16825231A EP 3325689 A4 EP3325689 A4 EP 3325689A4
Authority
EP
European Patent Office
Prior art keywords
encapsulation
thin film
lithography process
film coatings
patterned thin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP16825231.0A
Other languages
English (en)
French (fr)
Other versions
EP3325689A1 (de
Inventor
Heather LOVELADY
Ronnie Varghese
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Pixelteq Inc
Original Assignee
Pixelteq Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Pixelteq Inc filed Critical Pixelteq Inc
Priority claimed from PCT/US2016/042419 external-priority patent/WO2017011723A1/en
Publication of EP3325689A1 publication Critical patent/EP3325689A1/de
Publication of EP3325689A4 publication Critical patent/EP3325689A4/de
Withdrawn legal-status Critical Current

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Classifications

    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/16Coating processes; Apparatus therefor
    • G03F7/168Finishing the coated layer, e.g. drying, baking, soaking
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0272Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers for lift-off processes
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/26Processing photosensitive materials; Apparatus therefor
    • G03F7/40Treatment after imagewise removal, e.g. baking

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)
EP16825231.0A 2015-07-16 2016-07-15 Lithografisches verfahren zur verkapselung von gemusterten dünnschichtbeschichtungen Withdrawn EP3325689A4 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US201562193174P 2015-07-16 2015-07-16
PCT/US2016/042419 WO2017011723A1 (en) 2015-07-16 2016-07-15 Lithography process for the encapsulation of patterned thin film coatings

Publications (2)

Publication Number Publication Date
EP3325689A1 EP3325689A1 (de) 2018-05-30
EP3325689A4 true EP3325689A4 (de) 2019-04-17

Family

ID=61973022

Family Applications (1)

Application Number Title Priority Date Filing Date
EP16825231.0A Withdrawn EP3325689A4 (de) 2015-07-16 2016-07-15 Lithografisches verfahren zur verkapselung von gemusterten dünnschichtbeschichtungen

Country Status (1)

Country Link
EP (1) EP3325689A4 (de)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4202914A (en) * 1978-12-29 1980-05-13 International Business Machines Corporation Method of depositing thin films of small dimensions utilizing silicon nitride lift-off mask
US20060154412A1 (en) * 2005-01-12 2006-07-13 International Business Machines Corporation Method for Post Lithographic Critical Dimension Shrinking Using Thermal Reflow Process
US20090111061A1 (en) * 2007-10-30 2009-04-30 Frank Hin Fai Chau Methods of Minimizing Etch Undercut and Providing Clean Metal Liftoff

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4202914A (en) * 1978-12-29 1980-05-13 International Business Machines Corporation Method of depositing thin films of small dimensions utilizing silicon nitride lift-off mask
US20060154412A1 (en) * 2005-01-12 2006-07-13 International Business Machines Corporation Method for Post Lithographic Critical Dimension Shrinking Using Thermal Reflow Process
US20090111061A1 (en) * 2007-10-30 2009-04-30 Frank Hin Fai Chau Methods of Minimizing Etch Undercut and Providing Clean Metal Liftoff

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of WO2017011723A1 *

Also Published As

Publication number Publication date
EP3325689A1 (de) 2018-05-30

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Effective date: 20190318

RIC1 Information provided on ipc code assigned before grant

Ipc: G03F 7/40 20060101AFI20190312BHEP

Ipc: H01L 21/027 20060101ALI20190312BHEP

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