EP3314427A1 - Dispositif et procédé d'intégration de composantes logicielles dans un système distribué en temps réel à commande temporelle - Google Patents
Dispositif et procédé d'intégration de composantes logicielles dans un système distribué en temps réel à commande temporelleInfo
- Publication number
- EP3314427A1 EP3314427A1 EP16745033.7A EP16745033A EP3314427A1 EP 3314427 A1 EP3314427 A1 EP 3314427A1 EP 16745033 A EP16745033 A EP 16745033A EP 3314427 A1 EP3314427 A1 EP 3314427A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- development system
- target hardware
- time
- software components
- integration
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/70—Software maintenance or management
- G06F8/71—Version control; Configuration management
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Program initiating; Program switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
- G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
- G06F9/4881—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
- G06F9/4887—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues involving deadlines, e.g. rate based, periodic
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/60—Software deployment
- G06F8/65—Updates
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/54—Interprogram communication
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L67/00—Network arrangements or protocols for supporting network services or applications
- H04L67/34—Network arrangements or protocols for supporting network services or applications involving the movement of software or configuration parameters
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L67/00—Network arrangements or protocols for supporting network services or applications
- H04L67/01—Protocols
- H04L67/10—Protocols in which an application is distributed across nodes in the network
Definitions
- the invention relates to an apparatus for integrating software components of a distributed real-time software system executed on a target hardware and on a development system, wherein the target hardware comprises compute nodes and the development system comprises one or more computers.
- the invention relates to a method for integrating software components of a distributed real-time software system on such a device.
- a sauceware component is part of a software system which exchanges data and control signals with other parts of the software system (other software components) via specified interfaces.
- a functional specification is created for each software component.
- a functional specification of a software component describes the syntax and semantics of the input data, the output data, and the internal state of the software component, as well as the processing algorithm that determines how to compute the output data and the next inner state from the input data and the initial internal state.
- Program development is usually done on a development system that supports convenient tools for program code testing and debugging and simulation.
- the en- hancement system usually supports more functions than the target hardware, eg additional functions for interactive simulation of the execution of the programs.
- target hardware is understood to mean the distributed hardware environment that is used in a planned product.
- the software components developed separately on the development system must be ported to the target hardware, while maintaining the given real-time barriers.
- the device is designed as an advanced development system, in which extended development system, the computer nodes of the target hardware are connected to the computers of the development system via one or more timed distributor units, the advanced development system sparse global time of known precision, and wherein the compute nodes of the target hardware are connected to the computers of the development system via the one or more timed distribution units such that the data content of a TT message template of a TT platform of the target hardware from both a simulation process of the development system can be provided on time by an operational process of the target hardware.
- this object can also be achieved with a method mentioned in the introduction, in which the integration of the software components is realized in several phases, wherein in the first phase of the integration the TT message templates exchanged between the parallel executable software components , and by means of the TT message templates a TT platform is formed, in which the periodic transmission and reception times of each TT message template are defined, and in the following phases of the integration, the data contents of the TT message templates are first of simulation processes and later operational processes and, in a final phase of integration, the data contents of all TT message templates are provided by operational processes.
- the activation signals for starting the software components are defined in the first phase of the system integration.
- the TT platform monitors the specified CPU runtime of a software component on the target hardware.
- the TT platform defines memory areas for the data structures of a software component and monitors the access of the operational processes to these memory areas.
- a development system that is augmented by the target hardware and where messages can be exchanged between the development system and the target hardware, given given real-time bounds, is referred to as an advanced development system.
- TT message template an abstraction of a timed message in which the following attributes of a TT message are specified: period duration, message length, message sender and message recipient. Since the concrete payload of a message template need not be present, the TT message templates can be specified once the processing times of the operational processes on the target hardware and the transport times of the TT messages exchanged on the target hardware between the software components have been determined.
- TT platform is understood to mean a time-controlled architecture level of a distributed real-time system on which TT message templates are exchanged at predetermined periodically recurring points in time between software components. Furthermore, the TT platform provides the environment for the execution of the software components, monitors the runtime and memory accesses of the software components and produces the signals for the start of execution - the activation signals- of the software components. A signal is an event that takes place at a time.
- a device which makes it possible to produce the data contents of TT message templates of the TT platform of the target hardware in a timely manner both from simulation processes of the development system and from operational processes of the target hardware.
- the message content of a message template is produced in a timely manner if the message content contains the results of the preceding period and where the description of the message has been completed in time prior to the a priori specified time of sending the timed message concerned.
- the system integration can be divided into a number of phases, with the TT platform being built on the target hardware in the first phase of system integration, and the contents of the TT message templates of this TT platform being progressively incremented first by simulation processes and then by operational ones in the following phases Processes are provided. In the final phase of system integration, the operational processes produce all the contents of the TT message templates.
- FIG. 1 shows the structure of an exemplary extended development system
- FIG. 2 shows the construction of a sparse global time.
- Fig. 1 shows the structure of an extended development system. It consists of a target hardware 100 and a development system 150. These two systems are connected via a communication channel 130, on which timed messages can be transported.
- the target hardware 100 consists of four computer nodes 101, 102, 103, 104, which can exchange timed messages with each other and with the development system 150 via the communication channel 130 via a distribution unit 110.
- the TT platform may provide multiple partitions for executing software components from a hypervisor.
- the development system 150 shown in FIG. 1 consists of four computers, eg personal computers, 151, 152, 153, 154, which can exchange timed messages with each other and via the communication channel 130 with the destination hardware via a time-controlled distribution unit 160.
- Fig. 2 shows the structure of global time.
- the abscissa 200 shows the progression of the global time.
- the dashes on lines 201 and 202 represent the ticks of watches 201 and 202.
- the maximum synchronization error of the corresponding ticks of two clocks of an ensemble of clocks which depends on the synchronization algorithm and the quality of the clocks, is called precision of a clock ensemble.
- the precision in the sequence determines the granularity of a digital time base [4].
- the digitization leads to a digitization error of the same order of magnitude as the synchronization error.
- a sparse time base 203 is introduced in the extended development system where sparse events may only occur in intervals 210, 220, 230 and 240 and where the identifier of these intervals is the global time stamps with the integers 1, 2, 3 and 4 is made. Since the time interval of sparse events is greater than the sum of synchronization errors and digitization errors, it is possible to consistently determine the temporal order of sparse events in the distributed system based on their timestamps.
- the distribution units 110 and 160 are parameterized in the extended development system such that the data contents of the message templates can be calculated by the simulation processes and written to the message templates of the TT platform in a timely manner. As a result, these data contents are incrementally calculated by a process of the target hardware 100, up to In the final phase of system integration, all data content of the TT platform is calculated by the operational processes executing on the target hardware 100.
- the device described already supports the step-by-step integration of the software at a time when not all the project teams of a large project have completed their program code. If the final program code does not yet exist, the data content of a message template may be provided by a simple utility running on the development system. Such a simple utility provides data content from the allowed data area of a TT message template.
- the present invention simplifies the complex integration of software components in a timed distributed computer system and is therefore of great economic benefit.
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Security & Cryptography (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Debugging And Monitoring (AREA)
Abstract
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
AT505492015 | 2015-06-25 | ||
PCT/AT2016/050208 WO2016205842A1 (fr) | 2015-06-25 | 2016-06-16 | Dispositif et procédé d'intégration de composantes logicielles dans un système distribué en temps réel à commande temporelle |
Publications (1)
Publication Number | Publication Date |
---|---|
EP3314427A1 true EP3314427A1 (fr) | 2018-05-02 |
Family
ID=56555140
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP16745033.7A Withdrawn EP3314427A1 (fr) | 2015-06-25 | 2016-06-16 | Dispositif et procédé d'intégration de composantes logicielles dans un système distribué en temps réel à commande temporelle |
Country Status (3)
Country | Link |
---|---|
US (1) | US10671382B2 (fr) |
EP (1) | EP3314427A1 (fr) |
WO (1) | WO2016205842A1 (fr) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108829378B (zh) * | 2018-05-24 | 2022-06-21 | 北京顺丰同城科技有限公司 | 一种应用软件的开发方法、装置及电子设备 |
Family Cites Families (25)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6021457A (en) * | 1995-09-28 | 2000-02-01 | Intel Corporation | Method and an apparatus for minimizing perturbation while monitoring parallel applications |
US7334216B2 (en) * | 2000-04-04 | 2008-02-19 | Sosy, Inc. | Method and apparatus for automatic generation of information system user interfaces |
ATE427521T1 (de) * | 2001-07-26 | 2009-04-15 | Freescale Semiconductor Inc | Uhrensynchronisation in einem verteilten system |
EP1388792A1 (fr) * | 2001-09-05 | 2004-02-11 | Matsushita Electric Industrial Co., Ltd. | Procede de traitement de messages de synchronisation |
US7343428B2 (en) | 2001-09-19 | 2008-03-11 | International Business Machines Corporation | Dynamic, real-time integration of software resources through services of a content framework |
US20030140333A1 (en) | 2001-12-20 | 2003-07-24 | Hitachi, Ltd. | Integration of computer system components |
US8245239B2 (en) * | 2005-07-06 | 2012-08-14 | Honeywell International Inc. | Deterministic runtime execution environment and method |
EP1977566B1 (fr) * | 2006-01-27 | 2017-03-15 | FTS Computertechnik GmbH | Communication securisee synchronisee |
US8015323B2 (en) * | 2006-02-28 | 2011-09-06 | Infineon Technologies Ag | Acquisition of data and autonomous transfer of data through communication interface in automotive system |
US7787486B2 (en) * | 2006-11-13 | 2010-08-31 | Honeywell International Inc. | Method and system for achieving low jitter in real-time switched networks |
WO2008151339A2 (fr) | 2007-06-11 | 2008-12-18 | Fts Computertechnik Gmbh | Procédé et architecture pour la sécurisation de données en temps réel |
US7937360B2 (en) * | 2008-02-25 | 2011-05-03 | International Business Machines Corporation | Transferring messages to a directory |
US7930041B2 (en) * | 2008-09-29 | 2011-04-19 | Rockwell Automation Technologies, Inc. | Industrial controller with coordination of network transmissions using global clock |
US9213551B2 (en) * | 2011-03-11 | 2015-12-15 | Oracle International Corporation | Return address prediction in multithreaded processors |
US8914794B2 (en) * | 2011-06-30 | 2014-12-16 | Rockwell Automation Technologies, Inc. | Multiple deployment of applications with multiple configurations in an industrial automation environment |
AT512290B1 (de) | 2011-12-19 | 2013-07-15 | Fts Computertechnik Gmbh | Verfahren zur zeitrichtigen beobachtung von ttethernet nachrichten |
US9407696B2 (en) | 2011-12-27 | 2016-08-02 | Fts Computertechnik Gmbh | Method for combining results of periodically operating EDP components at the correct time |
EP2801174B1 (fr) | 2012-04-19 | 2016-04-06 | FTS Computertechnik GmbH | Dispositif et procédé de changement consistent de dans un commutateur synchrone et deterministe |
US8826072B2 (en) * | 2012-05-09 | 2014-09-02 | Imec | Method and system for real-time error mitigation |
WO2014094023A1 (fr) | 2012-12-18 | 2014-06-26 | Fts Computertechnik Gmbh | Procédé pour augmenter la sécurité dans un système en temps réel réparti et système fonctionnant en temps réel |
US20140331209A1 (en) * | 2013-05-02 | 2014-11-06 | Amazon Technologies, Inc. | Program Testing Service |
AT514444A2 (de) | 2013-06-24 | 2015-01-15 | Fts Computertechnik Gmbh | Verfahren und Vorrichtung zur zeitrichtigen Datenübergabe an die zyklischen Tasks in einem verteilten Echtzeitsystem |
AT514714A1 (de) | 2013-09-04 | 2015-03-15 | Fts Computertechnik Gmbh | Verfahren zur Übertragung von Nachrichten in einem Computernetzwerk sowie Computernetzwerk |
US9332072B2 (en) * | 2014-02-20 | 2016-05-03 | Cisco Technology, Inc. | Maintaining distribution-network-wide time synchronization in smart grid devices |
WO2015131214A1 (fr) | 2014-03-05 | 2015-09-11 | Fts Computertechnik Gmbh | Dispositifs et procédé pour le développement distribué de programmes de procédé d'un système en temps réel distribué sur un matériel de développement distribué |
-
2016
- 2016-06-16 WO PCT/AT2016/050208 patent/WO2016205842A1/fr active Application Filing
- 2016-06-16 EP EP16745033.7A patent/EP3314427A1/fr not_active Withdrawn
- 2016-06-16 US US15/738,874 patent/US10671382B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
US20180165089A1 (en) | 2018-06-14 |
WO2016205842A1 (fr) | 2016-12-29 |
US10671382B2 (en) | 2020-06-02 |
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