EP3262900A2

EP3262900A2 - Chip for use in an operating device for lighting means and operating device comprising such a chip

Info

Publication number: EP3262900A2
Application number: EP16718989.3A
Authority: EP
Inventors: Stefan KOHLGRÜBER; Florian Moosmann
Original assignee: Tridonic GmbH and Co KG
Current assignee: Tridonic GmbH and Co KG
Priority date: 2015-02-26
Filing date: 2016-02-26
Publication date: 2018-01-03
Also published as: US20180139814A1; WO2016134399A3; CN107211497A; CN107211497B; WO2016134399A2; US10314126B2

Abstract

The invention relates to a chip (1) for use in an operating device for lighting means, wherein the chip (1) is designed to control a processing block (2) of an operating device for lighting means, wherein the chip (1) can control a plurality of different processing blocks (2) which differ in their function, wherein the chip (1) is designed to select on the basis of at least one signal applied to the chip (1) what type of processing block (2) should be controlled.

Description

The present invention relates to a chip for use in a lighting device, the chip being adapted to control a processing block of the operating device. The invention also relates to an operating device, in particular for LEDs, with such a chip. In lighting arrangements are depending on the application or configuration of the

Lighting arrangement often provided operating equipment or converter, to which corresponding lighting means of the lighting arrangement are connected. The light-emitting devices may, for example, be light-emitting diodes (LEDs), which are being used more and more frequently as light sources in various fields of lighting technology, since LEDs have considerable advantages, in particular with respect to the life and energy efficiency compared to conventional light sources, and meanwhile also have a sufficient light source Have luminous intensity.

However, corresponding operating devices are also used in lighting arrangements with other light sources, wherein regardless of the type of light source, the operating device is designed and provided to provide the light source with a correspondingly suitable current and also to control the light source accordingly. Operating devices for LEDs as well as for other lamps often have different processing blocks, which are connected to each other within the operating device accordingly. These processing blocks may be, for example, a Power Factor Correction Block (PFC block), a Buck Converter block, a Boost Converter block, an isolated flyback converter. or flyback converter block or a half-bridge block, preferably resonant and / or isolated half-bridge block, (HB / LLC block) act. The more detailed structure of such processing blocks as well as the use and interconnection Within a control gear is already well known, which is why will not be discussed in more detail here.

It should now be noted in such processing blocks that they should mostly be controlled independently of their function or type, for example by detecting or measuring a voltage within the processing block that is transmitted to a chip, which then according to the voltage can control the respective processing block. For this purpose, controllable switches or gates can be provided in the processing block, which make it possible for the chip to control or regulate the processing block accordingly. Instead of the controllable switches or gates, the control of the

Processing block through the chip but also on other, already known, types done.

In an operating device then, as shown for example in Figure 1, a plurality of processing blocks 2 are provided, each processing block 2, a chip 1 is assigned to control the respective processing block 2. It should now be noted that processing blocks of various types are provided in an operating device. Since each processing block, depending on its function, requires a different drive or control by the chip, it is necessary for each type of processing block to have its own chip with its own internal structure or bonding.

Currently, mostly chips or ICs are used, which only support a topology, ie, a certain type of processing block. Accordingly, processing blocks of various types or functions require that a new chip be developed for each type of processing block, thus requiring considerable effort both in design and manufacture and also in appropriate performance tests and the like is. Furthermore, there is also an effort in the additional logistics, since different types or types of chips must be held and distributed accordingly. The object of the present invention is now to provide a way that for different types of processing blocks the same chip can be used to control the processing blocks. The object is solved by the features of the independent claims.

Advantageous developments of the invention are the subject of the dependent

Claims.

According to the invention, a chip for use in a control gear for

Provided light source, wherein the chip is adapted to a

Control processing block of the operating device. In this case, the chip can control a large number of different processing blocks differing in their function, the chip being designed to select which type of processing block is to be controlled on the basis of a signal applied to the chip.

With this configuration, it is now possible that the chip can easily determine, based on a signal applied to the chip, which type of processing block it should control. Advantageously, it is provided that the control of the processing block in response to an applied to the chip input signal, wherein for controlling the processing block, the chip may be configured to output control signals. Based on the input signal can then select which type of

Processing block to be controlled take place, wherein the input signal has various parameters and the selection can be made in dependence of at least one parameter. These parameters may be, for example, the waveform and / or the frequency and / or the amplitude and / or the

Duty ratios and / or the thresholds and / or timings, such as a time value specification, and / or maximum values of the input signal act. As an alternative to the input signal can be used to select which type of processing block should also be applied to the chip selection signal. That is, the selection takes place in dependence on a signal applied to the chip selection signal. In this case, the selection signal can have different parameters and the selection can be made as a function of at least one parameter. Advantageously, this is the voltage level of the

Selection signal.

Preferably, it is also provided that the chip has a plurality of pins for outputting and receiving signals.

Furthermore, it can be provided that a control unit is provided in the chip for each processing block of the plurality of function blocks that differ in their function, which the chip can control.

Advantageously, the chip is then designed such that each control unit of the chip can be connected to each pin of the chip.

In addition, it can be provided that controllable switches or gates are provided in the chip between the control units and the pins, and the chip can then be configured such that the controllable switches or gates can be selected by the signal applied to the chip for selecting which type of Control block to be controlled. Preferably, additional comparators are provided in the chip which can control the controllable switches or gates as a function of the signal applied to the chip for selecting which type of processing block is to be controlled. The controllable switches or gates may be transistors,

in particular FET transistors, act. The controllable switches or gates may be one or more multiplexers. An embodiment of the invention represents a chip, in particular an ASIC, which can support all different topologies (processing blocks) used in the operating device. With this technology, it is then provided that by means of an OTP programming or an OTP file (OTP stands for "one-time programmable", ie a one-time programmable memory data set), ie a so-called "software" Sector block is selected which topology and thus which type of processing blocks should be supported. This means that this OTP file determines which type of processing block the chip can control.

The chip may have a pin which is designed to be used only during a programming mode, preferably during the production of the operating device, to receive a selection signal and is used in a normal mode for the detection and / or output of other signals.

Furthermore, an operating device for lighting means is provided with at least one processing block and at least one chip associated with the processing block. Advantageously, the operating device has several

Processing blocks, each having a different function, each processing block is associated with a chip.

The processing block or blocks of the operating device may be, for example, a PFC (Power Factor Correction,

Power Factor Correction) block, HB (Half Bridge) / LLC Block, Buck Converter Block (Down Converter), Boost Converter Block (Boost Converter) or Flyback Converter (Isolated Flyback Converter) block. Additionally or alternatively, the processing blocks of the operating device may be a SEPIC converter block, buck-boost converter block, forward-converter-B lock, two-switch-forward-converter-B lock, active clamp forward converter Block, Push Pull Converter Block, Full Bridge Block, Phase Shift ZVT Converter Block Act.

It is also possible to use several stages of the same type, for example 3 buck converter blocks, which perform different functions. Advantageously, the processing block or blocks have controllable gates which are controlled by the chip (s).

The embodiment of the chip according to the invention now provides the advantage that only one chip is required for controlling the respective processing block for different types of processing blocks, since the chip can itself internally determine, based on the applied signal, which topology it supports, ie what type of processing block he can control. Thus, different types of chips are not required for multiple types of processing blocks, eliminating a number of tests for different types of chips. In addition, a large number of different OTP files is not necessary.

In addition, it is easily possible that even later or during operation, the chip can be switched to the support of another topology.

The invention will be explained in more detail with reference to embodiments and the accompanying drawings. Show it:

Figure 1 is a schematic representation of a control gear with several

Processing blocks and multiple chips;

Figure 2 is a schematic representation of the internal structure

chips according to the invention; and

Figure 3 is a schematic representation of the internal structure

chips according to the invention.

As already explained above, FIG. 1 shows a plurality of processing blocks 2 of an operating device for lighting means, wherein each processing block 2 is assigned a chip 1 which controls the corresponding processing block 2. It should be noted that in Figure 1, the connection between the chips 1 and the processing blocks 2 and between the processing blocks 2 with each other is shown only schematically. Accordingly, FIG. 1 can not directly take the exact interconnection of the processing blocks 2 with one another and with the chips 1. However, this is well known, which is why will not be discussed in more detail here.

In an operating device for lighting means, as already explained above, it is provided that the processing blocks 2 are controlled by the chips 1. For this purpose, certain parameters of the processing block 2, such as a certain voltage to the associated chip 1 are transmitted. Based on this derived from the corresponding processing block 2 parameters that are present as an input signal to the chip 1, the chip 1 can then control the processing block 2 accordingly. This occurs, for example, in that the processing block 2 has corresponding controllable switches or gates, by means of which a control or regulation of the processing block 2 is made possible. The control of

Processing blocks 2 by the chips 1 can also be done in other ways. For controlling the processing blocks 2 by the chips 1, it may then be provided that the chips 1 send a control signal to the processing blocks 2.

As already explained above, it has hitherto been provided, for example, that for each type of processing block 2, another chip 1 is used to control the respective one

Processing block is required. In the case of the type of processing block 2 or the function which fulfills a processing block 2, it may be, for example, a PFC block, a buck converter block, an HB / LLC block or a flyback converter block, which also already well known. Now to use only one chip 1 in different types of

To allow processing blocks 2 and thus a simplification and

Achieving cost savings is provided in the present invention that the chip 1 a variety of different in their function Processing blocks 2 can control, wherein the chip 1 is adapted to select from a signal applied to the chip 1 signal which type of

Processing block 2 is to be controlled.

In this signal applied to the chip 1 signal for selecting the type of

Processing blocks can be either an additional or extra

Selection signal or Topologieauswahlsignal act, which is applied to an additional or extra pin of the chip 1. Such chips 1, in which a specific selection signal is applied to the chip 1, are shown in FIGS. 2 and 3, wherein the selection signal may have different parameters and the selection in FIG

Dependence of at least one parameter takes place. In particular, in this case the voltage level of the selection signal is provided as a selection criterion.

As an alternative to a selection signal, it can also be provided that the selection of which type of processing block 2 is to be controlled as a function of the input signal. For this purpose, the input signal has various parameters, the selection taking place as a function of at least one parameter. These parameters may be, for example, waveform, frequency, amplitude, duty cycles, thresholds, timings, and max values of the input signal. That is, in the case that the chip 1 makes the selection of which type of processing block 2 to be controlled from the input signal, the chip 1 autonomously and independently based on the parameters of

Input signal can recognize which topology to support, that is, which type of processing block 2 it should control. With regard to the parameters of the input signal, it should be pointed out that these are thus specific fingerprints in the input signal or specific characteristics of the input signal.

It should also be noted here that the input signals of the different types of processing blocks 2 must differ at least in each case in one parameter, so that the chip 1 is able to detect a corresponding difference and to determine based on which topology is to be supported. In FIGS. 2 and 3, as already explained above, the structure of a respective chip 1 is shown, in which an additional selection signal for selecting which type of processing block 2 is to be controlled is provided. This selection signal is applied to a pin 3 of the chip 1, wherein the pin 3 is an additional or extra pin.

In Figure 2, the chip 1 further comprises a pin 4, to which an input signal corresponding to the input signal described above is applied, which may also be referred to as a sensing signal. This is, as already explained above, a signal that can come from the processing block 2, for example, a certain voltage value of the processing block 2 by means of which then the chip 1 performs the control of the corresponding processing block 2. Furthermore, two pins 5a and 5b are then provided at which corresponding control signals are output by the chip 1, with the aid of which

Processing blocks 2 can be controlled.

Internally, the chip 1 then has two control units 6 in FIG

Control unit 6 is provided for controlling a different type of processing block 2 and has control means or control components for controlling the respective type of processing block 2, which are not shown in detail in Figure 2, since these are well known. For example, the

Control unit 6 for controlling a PFC block comparable or the same

Have control means or control components such as a conventional, previously used chip for controlling a PFC block.

Due to the three control units 6, the chip 1 shown in FIG. 2 is thus able to control three different types of processing blocks 2. As can be seen from FIG. 2, the control units 6 are control units for a PFC block, an HB / LLC block or HB block and a buck converter block. Both between the pin 4, on which the input signal is applied, and the

Control units 6 as well as between the control units 6 and the pins 5a and 5b, where corresponding control signals are output, then appropriate controllable switches or gates in the form of FET transistors 7 are provided. Instead of the FET transistors 7, other types of transistors or any other form of switches or controllable elements could be used as controllable switches, for example the gates could also be implemented as multiplexers. With the aid of these FET transistors 7, it is possible, on the one hand, for the FET transistors 7, which are arranged between the pin 4 and the control units 6, to apply the input signal which is applied to the pin 4 to one of the control units 6 becomes. On the other hand, by the FET transistors 7 disposed between the control units 6 and the pins 5a and 5b, there is a possibility that a control signal output from the control units 6 is selectively applied to the pins 5a and 5b.

It should be noted that in Figure 2, the control unit 6 for the PFC block and the control unit 6 for the Buck converter block can each apply a control signal (PFC_out or Buck_FET_out) to the pin 5a optionally and the control unit 6 for the HB / LLC or HB block outputs two control signals (HB_LS_out and HB_HS_out), one of the two control signals to pin 5a and the other

Control signal is passed to the pin 5b. Due to the design with the FET transistors 7 arranged between the control units 6 and the pins 4 and 5, it is thus possible for one of the control units 6 to be selected, to which the input signal which is applied to the pin 4 is fed both to one as well as that of the

corresponding control unit 6 output to the or the pins 5 are guided so that the control signal or the control signals can be output accordingly and forwarded to the corresponding processing block 2. The selection of which control unit 6 is to be used then takes place on the basis of the selection signal which is applied to the additional pin 3. That is, the selection of the control unit 6 corresponds to the selection of which type of processing block 2 the chip 1 can or should control.

The evaluation of the selection signal, which is applied to the pin 3, then takes place with the aid of comparators 8, to which the selection signal is applied, this

Comparators 8 then control the FET transistors 7 as a function of the voltage level of the selection signal.

The comparators in Figure 2 and Figure 3 are shown only by way of example for understanding. The evaluation can also take place differently than based on the level, for example by means of the frequency of the signal (for example by a counter - f> 20 kHz = topology, f <20 kHz = topology 2), duty cycle, AC / DC, ....

In detail, it is provided in the exemplary embodiment that the selection signal essentially assumes three states or states, wherein a first state or state 1 a voltage level below 3 volts, a second state or a state 2 a

Voltage level between 3 and 6 volts and a third state or State 3 describes a voltage level above 6 volts. In this case, in case the

Voltage level of the selection signal is below 3 volts, the control unit 6 selected for the PFC block, in the event that the voltage level between 3 and 6 volts, the control unit 6 is selected for the HB block and in the event that

Voltage level is above 6 volts, the control unit 6 is selected for the buck converter block.

In this case, for the evaluation of the voltage level below 3 volts, a first comparator 8 is provided, which is connected to the FET transistors 7, which allow the input signal, which is applied to the pin 4, to the control unit 6 for the PFC block is forwarded and that the output from the PFC block control signal to the pin 5 a is performed. For the voltage range between 3 volts and 6 volts then a second and third comparator 8 are provided, which are connected via an AND gate with the FET transistors 7, which allow the control unit 6 for the HB block can receive the input signal and the corresponding output or control signals can be forwarded to the pins 5. For the voltage level above 6V then a fourth comparator 8 is provided which is connected to the FET transistors 7, which allow that the input signal to the control unit 6 for the Buck converter block can be performed and the

Control signal of this control unit 6 can then be passed to the pin 5a.

This wiring of the comparators 8 with the AND gate and the FET transistors 7 is also apparent from the following table, from which the

different voltage levels emerge and the resulting

Shortcuts for the pin 4 and the pins 5a and 5b and which signals

lie appropriate.

Thus results in a voltage of the output signal of less than 3 volts, a so-called PFC controller or a chip 1, which is intended to control a PFC block, at a voltage between 3 and 6 volts an HB controller or a chip 1 is suitable for controlling an HB block and at a voltage above 6 volts, a buck converter controller or a chip 1, which is suitable for controlling a Buck converter block.

In FIG. 3, a chip 1 is again shown schematically, in which the selection of which type of processing block 2 is to be controlled as a function of a selection signal applied to the chip 1, whereby in turn the selection signal is applied to an additional pin 3. Similarly to FIG. 2, two pins 5a and 5b are provided in the chip 1 in FIG.

In contrast to FIG. 2, in the exemplary embodiment in FIG. 3, however, only two control units 6 are provided in the chip 1, on the one hand a control unit 6 for a PFC block and, on the other hand, a control unit 6 for a buckle. Converter block. Furthermore, the chip 1 in FIG. 3 has two pins 4a and 4b for corresponding input signals.

As in FIG. 2, controllable switches or gates in the form of FET transistors 7 are also provided in FIG. 3, these being, as in FIG. 2, between the pins 4a and 4b and the control units 6 and between the control units 6 and Pins 5a and 5b are arranged. In addition, the FET transistors 7 are again controlled by corresponding comparators 8 on the basis of the selection signal which is applied to the pin 3.

It should now be noted, however, that is additionally provided in Figure 3 that the control unit 6 for the PFC block with both the pin 4a and the pin 4b and the control unit 6 for the buck converter block also both with the Pin 4a and can be connected to the pin 4b. As a result, there is the

Possibility that an input signal to both the pin 4a and the pin 4b can be applied and regardless of which pin 4a and 4b the input signal is present, this can be forwarded to both provided in the chip 1 control units 6. The situation is similar with that of the

Control units 6 output control signals that can be passed from both control units 6 both to the pin 5 a and 5 b to the pin.

It is then provided that, for example, at a voltage level below 3 volts, the control unit 6 for the PFC block with the pin 4a and the pin 5a and the control unit 6 for the buck converter block with the pin 4b and the pin 5b connected is. At a voltage level between 3 volts and 6 volts is

on the other hand, the PFC block control unit 6 is connected to the pin 4b and the pin 5b and the buck converter block control unit 6 is connected to the pin 4a and the pin 5a, and at a voltage level above 6 volts, it is provided that the Control unit 6 for the PFC block with the pin 4a and the pin 5b and the

Control unit 6 for the buck converter block is connected to the pin 4b and the pin 5a. This can also be seen from the following table, which shows the different voltage levels and the associated links.

Thus, FIG. 3 shows an example in which the two control units 6 can be connected both to different pins 4a and 4b on which the input signal is applied and to different pins 5a and 5b for the output of the control or output signal. An embodiment comprises a chip 1, in particular ASIC, which can support different processing blocks 2 used in the operating device. In this embodiment, it is provided that with the aid of an OTP programming (a "one-time programmable" programming, ie a one-time programming of a memory), or an OTP file is selected over a sector block, which topology and thus which type of

Processing blocks 2 should be supported. That is, this type of OTP programming determines which type of processing blocks 2 the chip can control. For example, the pin 3 may also be used only during a programming mode during the production of the operating device to receive a selection signal and used in a normal mode for the detection and output of other signals, such as measurement signals and / or control signals. For example, the pin 3 in normal operation of the operating device, so when driving a connected light source, to specify the nominal lamp current or the

Bulb power can be used. When receiving a selection signal only in a programming mode can be provided, for example, that is selected by means of OTP programming and determines which topology and thus which type of processing blocks 2 should be supported. In the embodiment where the selection signal is received only once during a programming mode and in normal operation is no longer the

Selection signal is queried, for example, each time you restart the

Operating equipment are tested in the chip 1, which support of

Processing blocks 2 have been selected by the selection signal received in the programming mode. For example, the stored in the chip 1 OTP programming or the OTP file can be queried. A restart of the

Operating device can be, for example, the booting of the operating device when applying a supply voltage to the operating device.

In principle, it would be conceivable that with a plurality of pins and control units by the use of a plurality of controllable switches or gates, such as multiplexers, depending on the selected state or state theoretically every pin of each control unit could be switched or assigned, even with everyone any combination. As a result, there is the possibility that the layout within an operating device can be considerably facilitated since jumper bridges can be saved if, for example, it is advantageous due to the layout that the input signal for the control unit for the PFC block is not connected to a first, but rather to a first can be applied to another pin from the outside to the chip.

This means that overall it can also be provided that each control unit of the chip can be connected to each pin of the chip. By the chip 1 according to the invention and the particular embodiment that can be selected by a voltage applied to the chip signal, which type of

If the processing block is to be controlled, it is possible in a simple manner to use the same chip for the control of different types of

To use processing blocks. That is, it is only necessary to develop and test a single chip for different topologies or different processing blocks, which can save significant costs and development costs. There is also the possibility of relief in the creation of layouts for operating devices, since any assignment of the pins and the control units can be done within the chip.

The simple selection on the basis of a signal applied to the chip, which type of processing block the chip is to control, then makes it possible, on the one hand, for this selection to be made once, for example during the production of an operating device. This means that with the operating device with several

However, it would also be possible through the simple selection that the selection takes place during operation of a lighting device, or that the selection during operation is changed. This would also be conceivable, for example, in the event that the chip evaluates the input signal accordingly. Pin 3 can also be used only during a programming mode during the production of the operating device to receive a selection signal and in a normal mode for the detection and / or output of other signals, such as

Measuring signals and / or control signals are used. Overall, therefore, it should be mentioned that a selection can take place in a simple manner both before and during the operation of the operating device. Thus, the bonding of the chip is not predetermined but is based on one or more signals.

Claims

claims

A chip (1) for use in a lighting apparatus, wherein the chip (1) is adapted to a processing block (2) of a

Control device for lighting means, characterized in that the chip (1) can control a plurality of different in their function processing blocks (2), wherein the chip (1) is adapted to at least one signal applied to the chip (1) to select which type of processing block (2) to control.

Chip according to claim 1, characterized

that at least one processing block, preferably all

Processing blocks are selected from: PFC block, half-bridge block, buck-converter-B lock, SEPIC converter block, buck-boost converter block, forward-converter-B lock or flyback converter block.

Chip according to claim 1 or 2, characterized

for controlling the processing block (2), the chip (1) is designed to output control signals; and or

the control of the processing block (2) takes place as a function of an input signal applied to the chip (1).

Chip according to claim 3, characterized

the selection of which type of processing block (2) is to be controlled as a function of the input signal; and or

that the input signal has different parameters and the selection is made as a function of at least one parameter; wherein the parameters are in particular the waveform and / or the frequency and / or the amplitude and / or the duty cycles and / or the threshold values and / or timings and / or max. values of the input signal are concerned.

Chip according to one of Claims 1 to 4, characterized in that the selection of which type of processing block (2) is to be controlled depends on a selection signal applied to the chip (1); and or

that the selection signal has different parameters and the selection takes place as a function of at least one parameter; wherein the parameters are in particular the voltage level of the selection signal.

Chip according to one of the preceding claims, characterized in that the chip (1) has a plurality of pins (4, 5) for outputting and receiving signals; and or

for each processing block (2) of the plurality of different functionally different processing blocks (2) that the chip (1) can control, a control unit (6) is provided in the chip (1); and or

in that the chip (1) is designed such that each control unit (6) of the chip (1) can be connected to each pin (4, 5) of the chip (1).

Chip according to claim 6, characterized

that controllable switches and / or gates (7) are provided in the chip (1) between the control units (6) and the pins (4, 5); and or

the chip (1) is designed such that the controllable switches and / or

Gate (7) by the voltage applied to the chip (1) signal to choose which

Type of processing block (2) to be controlled to be controlled;

and or

in that comparators (8) are provided in the chip (1) which can control the controllable switches and / or gates (7) as a function of the signal applied to the chip (1) for selecting which type of processing block (2) to control ,

8. Chip according to claim 7, characterized in that

in that the controllable switches and / or gates are transistors, in particular FET transistors (7). 9. Chip according to claim 7, characterized

that the controllable switches and / or gates are one or more multiplexers.

10. Chip according to one of the preceding claims, characterized

in that the chip has a pin (3), the pin (3) being designed to be used only during a programming mode, preferably during the production of the operating device, for receiving a selection signal and in a normal mode for detecting and / or outputting other signals is used.

11. Operating device for lighting, especially for LEDs, characterized

in

in that the operating device is provided with at least one processing block (2) and at least one chip (1) associated with the processing block (2) according to one of the preceding claims.

12. operating device for lighting means according to claim 11, characterized in that the operating device has a plurality of processing blocks (2), each having a different function, each processing block (2) is associated with a chip (1); and or

in that the processing block (2) or the processing blocks (2) of the operating device are a power factor correction filter (PFC) block, half-bridge block, buck converter block, SEPIC converter block, Buck Boost converter block, Forward converter B lock or flyback converter block; and or

the processing block (2) or the processing blocks (2) have controllable switches and / or gates, which are controlled by the chip (s) (1).