EP3158839A4 - System and methods for producing modular stacked integrated circuits - Google Patents

System and methods for producing modular stacked integrated circuits Download PDF

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Publication number
EP3158839A4
EP3158839A4 EP15812624.3A EP15812624A EP3158839A4 EP 3158839 A4 EP3158839 A4 EP 3158839A4 EP 15812624 A EP15812624 A EP 15812624A EP 3158839 A4 EP3158839 A4 EP 3158839A4
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EP
European Patent Office
Prior art keywords
methods
integrated circuits
stacked integrated
modular stacked
producing modular
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP15812624.3A
Other languages
German (de)
French (fr)
Other versions
EP3158839A1 (en
EP3158839B1 (en
Inventor
Jawad Nasrullah
Ming Zhang
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
North Sea Investments Co Ltd
Original Assignee
Zglue Inc
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Publication of EP3158839A1 publication Critical patent/EP3158839A1/en
Publication of EP3158839A4 publication Critical patent/EP3158839A4/en
Application granted granted Critical
Publication of EP3158839B1 publication Critical patent/EP3158839B1/en
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    • H01L22/30—Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
    • H01L22/34—Circuits for electrically characterising or monitoring manufacturing processes, e. g. whole test die, wafers filled with test structures, on-board-devices incorporated on each die, process control monitors or pad structures thereof, devices in scribe line
    • G—PHYSICS
    • G01—MEASURING; TESTING
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    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2853—Electrical testing of internal connections or -isolation, e.g. latch-up or chip-to-lead connections
    • G—PHYSICS
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    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/39—Circuit design at the physical level
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    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19041—Component type being a capacitor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19042—Component type being an inductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19102—Disposition of discrete passive components in a stacked assembly with the semiconductor or solid state device
    • H01L2924/19104—Disposition of discrete passive components in a stacked assembly with the semiconductor or solid state device on the semiconductor or solid-state device, i.e. passive-on-chip
EP15812624.3A 2014-06-23 2015-06-23 System and methods for producing modular stacked integrated circuits Active EP3158839B1 (en)

Applications Claiming Priority (3)

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US201462015530P 2014-06-23 2014-06-23
US201462058372P 2014-10-01 2014-10-01
PCT/US2015/037233 WO2015200351A1 (en) 2014-06-23 2015-06-23 System and methods for producing modular stacked integrated circuits

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EP3158839A1 EP3158839A1 (en) 2017-04-26
EP3158839A4 true EP3158839A4 (en) 2018-02-21
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US9514093B2 (en) * 2014-09-26 2016-12-06 Intel Corporation Method and apparatus for stacking core and uncore dies having landing slots
KR102491103B1 (en) 2018-02-06 2023-01-20 삼성전자주식회사 Semiconductor package and method of fabricating the same
US10573803B1 (en) * 2018-08-21 2020-02-25 Semiconductor Components Industries, Llc Current sensor packages with through hole in semiconductor
CN111741601B (en) * 2020-07-09 2021-07-30 复旦大学 Universal configurable active substrate circuit structure
CN115859901B (en) * 2023-02-28 2023-05-16 湖北芯擎科技有限公司 PCB routing layer-changing design method, device, computer equipment and storage medium

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US20110316572A1 (en) * 2010-06-28 2011-12-29 Xilinx, Inc. Testing die-to-die bonding and rework
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US6262594B1 (en) * 1999-11-05 2001-07-17 Ati International, Srl Apparatus and method for configurable use of groups of pads of a system on chip
US20110316572A1 (en) * 2010-06-28 2011-12-29 Xilinx, Inc. Testing die-to-die bonding and rework
US20130181257A1 (en) * 2012-01-13 2013-07-18 Tony Ngai Apparatus for flexible electronic interfaces and associated methods

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See also references of WO2015200351A1 *

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CN106664812B (en) 2019-07-23
CN106664812A (en) 2017-05-10
KR101949618B1 (en) 2019-02-18
KR20170016450A (en) 2017-02-13
US9842784B2 (en) 2017-12-12
EP3158839A1 (en) 2017-04-26
EP3158839B1 (en) 2020-12-16
WO2015200351A1 (en) 2015-12-30
US20170062294A1 (en) 2017-03-02

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