EP3149740A4 - Thyristor volatile random access memory and methods of manufacture - Google Patents
Thyristor volatile random access memory and methods of manufacture Download PDFInfo
- Publication number
- EP3149740A4 EP3149740A4 EP15845023.9A EP15845023A EP3149740A4 EP 3149740 A4 EP3149740 A4 EP 3149740A4 EP 15845023 A EP15845023 A EP 15845023A EP 3149740 A4 EP3149740 A4 EP 3149740A4
- Authority
- EP
- European Patent Office
- Prior art keywords
- thyristor
- manufacture
- methods
- random access
- access memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 238000000034 method Methods 0.000 title 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/39—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using thyristors or the avalanche or negative resistance type, e.g. PNPN, SCR, SCS, UJT
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1048—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using arrangements adapted for a specific error detection or correction feature
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/402—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration individual to each memory cell, i.e. internal refresh
- G11C11/4026—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration individual to each memory cell, i.e. internal refresh using bipolar transistors
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/4067—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the bipolar type
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/408—Address circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4094—Bit-line management or control circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
- H01L29/6609—Diodes
- H01L29/66121—Multilayer diodes, e.g. PNPN diodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66363—Thyristors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/87—Thyristor diodes, e.g. Shockley diodes, break-over diodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/10—DRAM devices comprising bipolar components
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- General Engineering & Computer Science (AREA)
- Semiconductor Memories (AREA)
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US201462055582P | 2014-09-25 | 2014-09-25 | |
US14/590,834 US9449669B2 (en) | 2014-09-25 | 2015-01-06 | Cross-coupled thyristor SRAM circuits and methods of operation |
US201562186336P | 2015-06-29 | 2015-06-29 | |
PCT/US2015/052499 WO2016049601A1 (en) | 2014-09-25 | 2015-09-25 | Thyristor volatile random access memory and methods of manufacture |
Publications (2)
Publication Number | Publication Date |
---|---|
EP3149740A1 EP3149740A1 (en) | 2017-04-05 |
EP3149740A4 true EP3149740A4 (en) | 2017-11-01 |
Family
ID=55582136
Family Applications (3)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP15845023.9A Withdrawn EP3149740A4 (en) | 2014-09-25 | 2015-09-25 | Thyristor volatile random access memory and methods of manufacture |
EP15844668.2A Withdrawn EP3149735A4 (en) | 2014-09-25 | 2015-09-25 | Power reduction in thyristor random access memory |
EP15844478.6A Withdrawn EP3149741A4 (en) | 2014-09-25 | 2015-09-25 | Methods of retaining and refreshing data in a thyristor random access memory |
Family Applications After (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP15844668.2A Withdrawn EP3149735A4 (en) | 2014-09-25 | 2015-09-25 | Power reduction in thyristor random access memory |
EP15844478.6A Withdrawn EP3149741A4 (en) | 2014-09-25 | 2015-09-25 | Methods of retaining and refreshing data in a thyristor random access memory |
Country Status (2)
Country | Link |
---|---|
EP (3) | EP3149740A4 (en) |
WO (3) | WO2016049608A1 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20180130804A1 (en) * | 2016-11-08 | 2018-05-10 | Kilopass Technology, Inc. | Vertical Thyristor Cell and Memory Array with Silicon Germanium Base Regions |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20090213648A1 (en) * | 2007-12-21 | 2009-08-27 | Qimonda Ag | Integrated Circuit Comprising a Thyristor and Method of Controlling a Memory Cell Comprising a Thyristor |
US20120228629A1 (en) * | 2011-03-08 | 2012-09-13 | Micron Technology, Inc. | Thyristors, Methods of Programming Thyristors, and Methods of Forming Thyristors |
US20120281468A1 (en) * | 2011-05-04 | 2012-11-08 | Qingqing Liang | Semiconductor device and semiconductor memory device |
US8441881B1 (en) * | 2010-07-02 | 2013-05-14 | T-Ram Semiconductor | Tracking for read and inverse write back of a group of thyristor-based memory cells |
Family Cites Families (23)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6026042A (en) * | 1998-04-10 | 2000-02-15 | Micron Technology, Inc. | Method and apparatus for enhancing the performance of semiconductor memory devices |
US6229161B1 (en) * | 1998-06-05 | 2001-05-08 | Stanford University | Semiconductor capacitively-coupled NDR device and its applications in high-density high-speed memories and in power switches |
EP1384232A4 (en) * | 2001-04-05 | 2008-11-19 | T Ram Inc | Dynamic data restore in thyristor-based memory device |
US6627924B2 (en) * | 2001-04-30 | 2003-09-30 | Ibm Corporation | Memory system capable of operating at high temperatures and method for fabricating the same |
US6906354B2 (en) * | 2001-06-13 | 2005-06-14 | International Business Machines Corporation | T-RAM cell having a buried vertical thyristor and a pseudo-TFT transfer gate and method for fabricating the same |
CA2447204C (en) * | 2002-11-29 | 2010-03-23 | Memory Management Services Ltd. | Error correction scheme for memory |
KR100557637B1 (en) * | 2004-01-06 | 2006-03-10 | 주식회사 하이닉스반도체 | Low power semiconductor memory device |
US7460395B1 (en) * | 2005-06-22 | 2008-12-02 | T-Ram Semiconductor, Inc. | Thyristor-based semiconductor memory and memory array with data refresh |
US7542340B2 (en) * | 2006-07-11 | 2009-06-02 | Innovative Silicon Isi Sa | Integrated circuit including memory array having a segmented bit line architecture and method of controlling and/or operating same |
US8547756B2 (en) * | 2010-10-04 | 2013-10-01 | Zeno Semiconductor, Inc. | Semiconductor memory device having an electrically floating body transistor |
US20080151670A1 (en) * | 2006-12-22 | 2008-06-26 | Tomohiro Kawakubo | Memory device, memory controller and memory system |
US7630235B2 (en) * | 2007-03-28 | 2009-12-08 | Globalfoundries Inc. | Memory cells, memory devices and integrated circuits incorporating the same |
US8116157B2 (en) * | 2007-11-20 | 2012-02-14 | Qimonda Ag | Integrated circuit |
US8130547B2 (en) * | 2007-11-29 | 2012-03-06 | Zeno Semiconductor, Inc. | Method of maintaining the state of semiconductor memory having electrically floating body transistor |
US8120951B2 (en) * | 2008-05-22 | 2012-02-21 | Micron Technology, Inc. | Memory devices, memory device constructions, constructions, memory device forming methods, current conducting devices, and memory cell programming methods |
WO2010104918A1 (en) * | 2009-03-10 | 2010-09-16 | Contour Semiconductor, Inc. | Three-dimensional memory array comprising vertical switches having three terminals |
US8139391B2 (en) * | 2009-04-03 | 2012-03-20 | Sandisk 3D Llc | Multi-bit resistance-switching memory cell |
JP2011108327A (en) * | 2009-11-18 | 2011-06-02 | Toshiba Corp | Non-volatile semiconductor memory device |
CN103339732B (en) * | 2010-10-12 | 2016-02-24 | 斯兰纳半导体美国股份有限公司 | There is the vertical semiconductor devices of the substrate be thinned |
US8824230B2 (en) * | 2011-09-30 | 2014-09-02 | Qualcomm Incorporated | Method and apparatus of reducing leakage power in multiple port SRAM memory cell |
US8947925B2 (en) * | 2012-08-17 | 2015-02-03 | The University Of Connecticut | Thyristor memory cell integrated circuit |
US20150228325A1 (en) * | 2012-08-29 | 2015-08-13 | Ps4 Luxco S.A.R.L. | Fbc memory or thyristor memory for refreshing unused word line |
US20140269046A1 (en) * | 2013-03-15 | 2014-09-18 | Micron Technology, Inc. | Apparatuses and methods for use in selecting or isolating memory cells |
-
2015
- 2015-09-25 EP EP15845023.9A patent/EP3149740A4/en not_active Withdrawn
- 2015-09-25 WO PCT/US2015/052507 patent/WO2016049608A1/en active Application Filing
- 2015-09-25 EP EP15844668.2A patent/EP3149735A4/en not_active Withdrawn
- 2015-09-25 EP EP15844478.6A patent/EP3149741A4/en not_active Withdrawn
- 2015-09-25 WO PCT/US2015/052505 patent/WO2016049606A1/en active Application Filing
- 2015-09-25 WO PCT/US2015/052499 patent/WO2016049601A1/en active Application Filing
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20090213648A1 (en) * | 2007-12-21 | 2009-08-27 | Qimonda Ag | Integrated Circuit Comprising a Thyristor and Method of Controlling a Memory Cell Comprising a Thyristor |
US8441881B1 (en) * | 2010-07-02 | 2013-05-14 | T-Ram Semiconductor | Tracking for read and inverse write back of a group of thyristor-based memory cells |
US20120228629A1 (en) * | 2011-03-08 | 2012-09-13 | Micron Technology, Inc. | Thyristors, Methods of Programming Thyristors, and Methods of Forming Thyristors |
US20120281468A1 (en) * | 2011-05-04 | 2012-11-08 | Qingqing Liang | Semiconductor device and semiconductor memory device |
Non-Patent Citations (1)
Title |
---|
See also references of WO2016049601A1 * |
Also Published As
Publication number | Publication date |
---|---|
EP3149735A1 (en) | 2017-04-05 |
WO2016049601A1 (en) | 2016-03-31 |
WO2016049608A1 (en) | 2016-03-31 |
EP3149735A4 (en) | 2018-06-13 |
WO2016049606A1 (en) | 2016-03-31 |
EP3149740A1 (en) | 2017-04-05 |
EP3149741A4 (en) | 2018-01-17 |
EP3149741A1 (en) | 2017-04-05 |
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A4 | Supplementary search report drawn up and despatched |
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RIC1 | Information provided on ipc code assigned before grant |
Ipc: H01L 27/102 20060101ALI20170927BHEP Ipc: G11C 11/39 20060101AFI20170927BHEP Ipc: G11C 11/402 20060101ALI20170927BHEP Ipc: G11C 11/406 20060101ALN20170927BHEP Ipc: H01L 29/87 20060101ALI20170927BHEP |
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