EP3053168A4 - Volatile memory architecture in non-volatile memory devices and related controllers - Google Patents
Volatile memory architecture in non-volatile memory devices and related controllers Download PDFInfo
- Publication number
- EP3053168A4 EP3053168A4 EP14849641.7A EP14849641A EP3053168A4 EP 3053168 A4 EP3053168 A4 EP 3053168A4 EP 14849641 A EP14849641 A EP 14849641A EP 3053168 A4 EP3053168 A4 EP 3053168A4
- Authority
- EP
- European Patent Office
- Prior art keywords
- volatile memory
- memory devices
- related controllers
- architecture
- memory architecture
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
- G11C2207/10—Aspects relating to interfaces of memory device to external buses
- G11C2207/104—Embedded memory devices, e.g. memories with a processing device on the same die or ASIC memory designs
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
- G11C2207/22—Control and timing of internal memory operations
- G11C2207/2209—Concurrent read and write
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2216/00—Indexing scheme relating to G11C16/00 and subgroups, for features not directly covered by these groups
- G11C2216/12—Reading and writing aspects of erasable programmable read-only memories
- G11C2216/22—Nonvolatile memory in which reading can be carried out from one memory bank or array whilst a word or sector in another bank or array is being erased or programmed simultaneously
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Read Only Memory (AREA)
- Memory System Of A Hierarchy Structure (AREA)
- Theoretical Computer Science (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US14/041,334 US20150095551A1 (en) | 2013-09-30 | 2013-09-30 | Volatile memory architecutre in non-volatile memory devices and related controllers |
PCT/US2014/056840 WO2015047962A1 (en) | 2013-09-30 | 2014-09-22 | Volatile memory architecture in no-volatile memory devices and related controllers |
Publications (3)
Publication Number | Publication Date |
---|---|
EP3053168A1 EP3053168A1 (en) | 2016-08-10 |
EP3053168A4 true EP3053168A4 (en) | 2017-05-03 |
EP3053168B1 EP3053168B1 (en) | 2022-11-30 |
Family
ID=52741292
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP14849641.7A Active EP3053168B1 (en) | 2013-09-30 | 2014-09-22 | Volatile memory architecture in non-volatile memory devices and related controllers |
Country Status (7)
Country | Link |
---|---|
US (2) | US20150095551A1 (en) |
EP (1) | EP3053168B1 (en) |
JP (1) | JP6142081B2 (en) |
KR (2) | KR101940963B1 (en) |
CN (1) | CN105593942B (en) |
TW (2) | TWI625731B (en) |
WO (1) | WO2015047962A1 (en) |
Families Citing this family (24)
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KR102025088B1 (en) * | 2012-09-03 | 2019-09-25 | 삼성전자 주식회사 | Memory controller and electronic device having the memory controller |
US9754648B2 (en) | 2012-10-26 | 2017-09-05 | Micron Technology, Inc. | Apparatuses and methods for memory operations having variable latencies |
US9740485B2 (en) | 2012-10-26 | 2017-08-22 | Micron Technology, Inc. | Apparatuses and methods for memory operations having variable latencies |
US9734097B2 (en) | 2013-03-15 | 2017-08-15 | Micron Technology, Inc. | Apparatuses and methods for variable latency memory operations |
TWI494849B (en) * | 2013-05-06 | 2015-08-01 | Phison Electronics Corp | Firmware code loading method, memory controller and memory storage apparatus |
US9727493B2 (en) | 2013-08-14 | 2017-08-08 | Micron Technology, Inc. | Apparatuses and methods for providing data to a configurable storage area |
US9563565B2 (en) | 2013-08-14 | 2017-02-07 | Micron Technology, Inc. | Apparatuses and methods for providing data from a buffer |
US20150178125A1 (en) * | 2013-12-23 | 2015-06-25 | Oracle International Corporation | Reducing synchronization of tasks in latency-tolerant task-parallel systems |
US10365835B2 (en) | 2014-05-28 | 2019-07-30 | Micron Technology, Inc. | Apparatuses and methods for performing write count threshold wear leveling operations |
CN108475229B (en) | 2016-11-26 | 2021-07-16 | 华为技术有限公司 | Data migration method, host and solid-state storage device |
US10275378B2 (en) * | 2017-03-07 | 2019-04-30 | Western Digital Technologies, Inc. | Data buffer pointer fetching for direct memory access |
US20180292991A1 (en) * | 2017-04-11 | 2018-10-11 | Micron Technology, Inc. | Memory protocol with programmable buffer and cache size |
US10497447B2 (en) * | 2017-06-29 | 2019-12-03 | SK Hynix Inc. | Memory device capable of supporting multiple read operations |
US10685702B2 (en) | 2017-08-28 | 2020-06-16 | Micron Technology, Inc. | Memory array reset read operation |
US10649656B2 (en) | 2017-12-28 | 2020-05-12 | Micron Technology, Inc. | Techniques to update a trim parameter in non-volatile memory |
US10922013B2 (en) * | 2018-04-09 | 2021-02-16 | Western Digital Technologies, Inc. | Suspending and resuming a read operation for a non-volatile memory |
US10636459B2 (en) * | 2018-05-30 | 2020-04-28 | Micron Technology, Inc. | Wear leveling |
US11163638B2 (en) | 2019-04-05 | 2021-11-02 | Samsung Electronics Co., Ltd. | Memory device for swapping data and operating method thereof |
US11366760B2 (en) | 2020-03-12 | 2022-06-21 | Micron Technology, Inc. | Memory access collision management on a shared wordline |
US11188473B1 (en) * | 2020-10-30 | 2021-11-30 | Micron Technology, Inc. | Cache release command for cache reads in a memory sub-system |
US11455254B2 (en) * | 2020-12-10 | 2022-09-27 | Macronix International Co., Ltd. | Flash memory system and flash memory device thereof |
US12001336B2 (en) * | 2021-07-21 | 2024-06-04 | Micron Technology, Inc. | Hybrid parallel programming of single-level cell memory |
CN114217750B (en) * | 2021-12-28 | 2023-07-04 | 深圳忆联信息系统有限公司 | SSD low power consumption optimization method, SSD low power consumption optimization device, computer equipment and storage medium |
US20240070059A1 (en) * | 2022-08-30 | 2024-02-29 | Micron Technology, Inc. | Memory devices including logic non-volatile memory |
Citations (3)
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WO2001075896A2 (en) * | 2000-03-30 | 2001-10-11 | Micron Technology, Inc. | Flash with consistent latency for read operations |
US20100103723A1 (en) * | 2007-08-01 | 2010-04-29 | Ken Kawai | Nonvolatile memory apparatus |
US20110208905A1 (en) * | 2008-12-09 | 2011-08-25 | Rambus Inc. | Non-Volatile Memory Device For Concurrent And Pipelined Memory Operations |
Family Cites Families (27)
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JPS5710853A (en) * | 1980-06-23 | 1982-01-20 | Nec Corp | Memory device |
JPH0337897A (en) * | 1989-07-05 | 1991-02-19 | Nec Corp | Microcomputer |
JP3191302B2 (en) * | 1990-12-28 | 2001-07-23 | 日本電気株式会社 | Memory circuit |
KR970008188B1 (en) * | 1993-04-08 | 1997-05-21 | 가부시끼가이샤 히다찌세이사꾸쇼 | Control method of flash memory and information processing apparatus using the same |
US6385074B1 (en) * | 1998-11-16 | 2002-05-07 | Matrix Semiconductor, Inc. | Integrated circuit structure including three-dimensional memory array |
DE60012081T2 (en) * | 1999-05-11 | 2004-11-18 | Fujitsu Ltd., Kawasaki | Non-volatile semiconductor memory device that allows a data read operation during a data write / erase operation |
US6851026B1 (en) | 2000-07-28 | 2005-02-01 | Micron Technology, Inc. | Synchronous flash memory with concurrent write and read operation |
US6671204B2 (en) * | 2001-07-23 | 2003-12-30 | Samsung Electronics Co., Ltd. | Nonvolatile memory device with page buffer having dual registers and methods of using the same |
JP2003162377A (en) * | 2001-11-28 | 2003-06-06 | Hitachi Ltd | Disk array system and method for taking over logical unit among controllers |
JP4325275B2 (en) * | 2003-05-28 | 2009-09-02 | 株式会社日立製作所 | Semiconductor device |
KR100498508B1 (en) * | 2003-09-16 | 2005-07-01 | 삼성전자주식회사 | Dual buffering memory system for reducing data transmission time and control method thereof |
US7200693B2 (en) * | 2004-08-27 | 2007-04-03 | Micron Technology, Inc. | Memory system and method having unidirectional data buses |
KR100672122B1 (en) * | 2005-03-10 | 2007-01-19 | 주식회사 하이닉스반도체 | Page buffer circuit of flash memory device with reduced consumption power |
JP2007164355A (en) * | 2005-12-12 | 2007-06-28 | Matsushita Electric Ind Co Ltd | Non-volatile storage device, data reading method therefor, and data writing method therefor |
KR100673023B1 (en) * | 2005-12-28 | 2007-01-24 | 삼성전자주식회사 | Semiconductor memory device using pipelined-buffer programming scheme |
JP5002201B2 (en) * | 2006-06-30 | 2012-08-15 | 株式会社東芝 | Memory system |
US8549236B2 (en) * | 2006-12-15 | 2013-10-01 | Siliconsystems, Inc. | Storage subsystem with multiple non-volatile memory arrays to protect against data losses |
ITMI20070787A1 (en) * | 2007-04-17 | 2008-10-18 | St Microelectronics Srl | NON-VOLATILE MEMORY |
WO2008131058A2 (en) * | 2007-04-17 | 2008-10-30 | Rambus Inc. | Hybrid volatile and non-volatile memory device |
JP5317690B2 (en) * | 2008-12-27 | 2013-10-16 | 株式会社東芝 | Memory system |
KR20100082185A (en) * | 2009-01-08 | 2010-07-16 | 삼성전자주식회사 | User device including flash memory, cache memory and controller |
US8149622B2 (en) * | 2009-06-30 | 2012-04-03 | Aplus Flash Technology, Inc. | Memory system having NAND-based NOR and NAND flashes and SRAM integrated in one chip for hybrid data, code and cache storage |
US8180994B2 (en) * | 2009-07-08 | 2012-05-15 | Sandisk Technologies Inc. | Optimized page programming order for non-volatile memory |
US8144512B2 (en) * | 2009-12-18 | 2012-03-27 | Sandisk Technologies Inc. | Data transfer flows for on-chip folding |
US8868852B2 (en) * | 2010-07-07 | 2014-10-21 | Marvell World Trade Ltd. | Interface management control systems and methods for non-volatile semiconductor memory |
JP5756622B2 (en) * | 2010-11-30 | 2015-07-29 | 株式会社日立製作所 | Semiconductor device |
US8625345B2 (en) * | 2011-07-27 | 2014-01-07 | Micron Technology, Inc. | Determining and transferring data from a memory array |
-
2013
- 2013-09-30 US US14/041,334 patent/US20150095551A1/en not_active Abandoned
-
2014
- 2014-09-22 KR KR1020187009298A patent/KR101940963B1/en active IP Right Grant
- 2014-09-22 EP EP14849641.7A patent/EP3053168B1/en active Active
- 2014-09-22 KR KR1020167011108A patent/KR101847315B1/en active IP Right Grant
- 2014-09-22 WO PCT/US2014/056840 patent/WO2015047962A1/en active Application Filing
- 2014-09-22 CN CN201480053468.5A patent/CN105593942B/en active Active
- 2014-09-22 JP JP2016517307A patent/JP6142081B2/en active Active
- 2014-09-29 TW TW106109441A patent/TWI625731B/en active
- 2014-09-29 TW TW103133797A patent/TWI582785B/en active
-
2018
- 2018-01-30 US US15/883,273 patent/US20180158527A1/en not_active Abandoned
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2001075896A2 (en) * | 2000-03-30 | 2001-10-11 | Micron Technology, Inc. | Flash with consistent latency for read operations |
US20100103723A1 (en) * | 2007-08-01 | 2010-04-29 | Ken Kawai | Nonvolatile memory apparatus |
US20110208905A1 (en) * | 2008-12-09 | 2011-08-25 | Rambus Inc. | Non-Volatile Memory Device For Concurrent And Pipelined Memory Operations |
Non-Patent Citations (1)
Title |
---|
See also references of WO2015047962A1 * |
Also Published As
Publication number | Publication date |
---|---|
TW201721640A (en) | 2017-06-16 |
CN105593942A (en) | 2016-05-18 |
US20180158527A1 (en) | 2018-06-07 |
US20150095551A1 (en) | 2015-04-02 |
EP3053168B1 (en) | 2022-11-30 |
TW201535407A (en) | 2015-09-16 |
CN105593942B (en) | 2019-11-29 |
KR20160062119A (en) | 2016-06-01 |
KR101847315B1 (en) | 2018-04-09 |
TWI582785B (en) | 2017-05-11 |
WO2015047962A1 (en) | 2015-04-02 |
TWI625731B (en) | 2018-06-01 |
KR101940963B1 (en) | 2019-01-21 |
KR20180037320A (en) | 2018-04-11 |
WO2015047962A8 (en) | 2016-01-07 |
EP3053168A1 (en) | 2016-08-10 |
JP2016536732A (en) | 2016-11-24 |
JP6142081B2 (en) | 2017-06-07 |
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