EP3041019B1

EP3041019B1 - Time relay used for metal halide lamps and similar loads

Info

Publication number: EP3041019B1
Application number: EP13892350.3A
Authority: EP
Inventors: Xuefeng Yu; Min SU; Guangshu Zheng
Original assignee: Zhejiang Chint Electrics Co Ltd
Current assignee: Zhejiang Chint Electrics Co Ltd
Priority date: 2013-08-26
Filing date: 2013-11-29
Publication date: 2024-05-01
Anticipated expiration: 2033-11-29
Also published as: WO2015027592A1; EP3041019A4; AU2013398767B2; EP3041019A1; CN103426683B; CN103426683A; TN2016000071A1; AU2013398767A1; ES2981711T3

Description

Technical Field

The invention relates to the field of a low-voltage electrical apparatus, and more particularly to a time relay.

Background Art

As everyone knows the metal halide lamp as a new light source has many advantages. But the second electrification starting must be performed after cooling in order to increase the service life; otherwise, the high voltage generated by a trigger is likely to burn out lead wires of a trigger electrode and main electrode of the lamp. This is because the air pressure in the metal halide lamp is very high in the kindling state, and the air pressure is extremely low in the cooling state. There exists a multiplication relationship among the kindle breakdown voltage, the air pressure and the electrode distance. The higher the air pressure is, the higher the starting voltage is, and it is more difficult to start. If re-electrifying under the condition that it is not cooled, the light source cannot be lightened until the voltage generated from the trigger is high enough. Therefore, the service life of the light source will be shortened due to frequent starting. The test cycle of the service life is turning on for 11 hours and turning off 1 hour according to the requirements of IEC standard. In order to prolong the service life of the metal halide lamp, a time delay used for the metal halide lamp is needed to control the on/off of the power supply of the metal halide lamp and has a function of automatically entering a long time delay timekeeping after outage and close on an output loop of the relay after the time delay is over, so as to achieve the control of the secondary electrification starting after a period of time as required for cooling after the metal halide lamp turns off. Of course, the time delay used for the metal halide lamp is used for not only the metal halide lamp, but also can be used to other loads that have the same time delay control process with the metal halide lamp. The time delay used for such loads as the metal halide lamp is called as the time relay used for the metal halide lamp and similar loads. Obviously, the time relay used for the metal halide lamp and similar loads has the time delay control process as follows: when the time relay receives a power discontinuity signal, which with its output contacts are synchronized disconnection occurred, a timing control circuit starts keeping time and passes through a period of longer time delay process, the output contact always keeps disconnected no matter whether the electrification is reset in the time delay process. After the time delay process is over, the output contact continues to keep disconnected if it is still in the outage state at present, and the output contact is converted to be connected if it is still in the electrification state at present.
A known control circuit of time relay is described for example in document CN-A-103149852 .
But the existing time relay cannot be directly used for the metal halide lamp and similar loads. This is because: the logic function fails to meet the time delay requirement of the secondary electrification starting of the metal halide lamp and similar loads, the logic requirement of the time delay control of the metal halide lamp starts time delay timekeeping after the Lamp turns off (i.e., the output contact of the time relay is disconnected), the relay output circuit is allowed to be close on after the time delay is finished (i.e., the output contact of the time relay is allowed to be connected), the logic function is as shown in a logic time sequence diagram as required for the metal halide lamp and similar loads shown in Fig. 2, while the logic function of the existing time relay is generally that the time delay timekeeping is started after receiving an action signal (the action signal is not always related to the on/off of the output contact of the time relay), the on/off state of the output circuit of the relay (i.e., the close-up/ breaking state of the output contact of the time relay) generates a jump conversion after the time delay is over, the logic function is as shown in the logic time sequence diagram of the existing time delay type time relay shown in Fig. 1; the delay time of the existing time relay is short, the time delay control within 3 minutes can only be achieved generally, but the cooling time of the metal halide lamp costs 20 minutes, so the shorter time delay cannot meet the cooling requirement of the metal halide lamp; the working current of the output contact of the existing time relay is low (generally below 5A) and cannot be directly used for controlling the large-power metal halide lamp; and the existing products are provided with no state indicator lamps in the time delay control process after outage, so it is inconvenient to use and is not intuitive.

Summary of the Invention

The object of the invention is to overcome the deflects of the prior art and to provide a time relay used for metal halide lamp and similar loads.
In order to realize said purpose, the present invention adopts the following technical solution.
A time relay used for metal halide lamp and similar loads is according to appended claim 1 and comprises a power side phase wire terminal L, a power side neutral wire terminal N, a load side live wire terminal 4, a load side ground wire terminal 3, and a control circuit, wherein the neutral wire terminal N is connected with the ground wire terminal 3, an output contact K1 of the relay is connected between the phase wire terminal L and the live wire terminal 4 in series, wherein the control circuit comprises a buck regulator rectifier circuit A, an outage detection circuit B, a timing control circuit C, a tank circuit D and a relay output circuit E; two poles of an AC input end of the buck regulator rectifier circuit A are respectively connected with the phase wire terminal L and the neutral wire terminal N, and loading voltage or unloading voltage at a DC output end of the buck regulator rectifier circuit A is controlled by electrification or outage of the phase wire terminal L and the neutral wire terminal N; the buck regulator rectifier circuit A is connected with the relay output circuit E to supply electricity, a detection signal input end of the outage detection circuit B is connected with a positive pole node A1 of the direct current output end of the buck regulator rectifier circuit A, and its output end is connected with a processing signal input end of the timing control circuit C to provide a detection signal whether the power supply is normal for the timing control circuit C; an electric energy input end of the tank circuit D is connected with a voltage regulating node (A2) and a voltage-stabilizing node (A3) of the direct current output end of the buck regulator rectifier circuit A, and its output end is connected with the power input end of the timing control circuit C, energy is stored when voltage is loaded at the direct current output end, and the electricity is supplied for the timing control circuit C when the voltage is unloaded; and a control signal output end of the timing control circuit C is connected with a control signal input end of the relay output circuit E, at the instant that the direct current output end is converted from loading into unloading voltage, the tank circuit D supplies electricity to the timing control circuit C, the outage detection circuit B outputs a voltage unloading signal to the timing control circuit C, the timing control circuit C enters a long time delay timekeeping process, and relay output circuit E controlled by the control circuit C, so that the relay output contacts K1 is inhibited to be closed until the timekeeping process of the timing control circuit C is over.
Further, at a normal state that the voltage is loaded at the direct current output end, a detection signal output end of the outage detection circuit B maintains at a high level, a control signal output end of the timing control circuit C maintains at a high level, the relay output circuit E close on an input loop of the relay under the control of the high level, and the relay output contact K1 keeps closed under the drive control of the loading voltage of the direct current output end, and the tank circuit D is in a energy storage state; at the instant that the voltage is unloaded at the direct current output end, the detection signal output end of the outage detection circuit B is converted into the low level, the timing control circuit C enters the long time delay timekeeping process under the control of the low level and the control signal output end is converted into the low level, the relay output circuit E enables the output loop of the relay to cut off under the control of the low level, at the same time, the output contact K1 of the relay is converted in be disconnected under the control that the voltage is unloaded at the direct current output end, and the tank circuit D is converted into the electricity supply state; and at the instant that the voltage is loaded at the direct current output end, the detection signal output end of the outage detection circuit B is converted into the high level, the timing control circuit C automatically detects whether the previous long time delay timekeeping process comes to an end under the control of the high level, if the long time delay timekeeping process does not come to an end, the control signal output end continues to keep the low level, if the long time delay timekeeping process comes to an end, the control signal output end is converted into the high level, and the input loop of the relay close on under the drive control of the high level and the loaded voltage, and the output contact K1 of the relay is converted in be closed, and the tank circuit D returns to the energy storage state.
Further, the buck regulator rectifier circuit A comprises a step-down resistor R4, a fourth capacitor C4, a rectifier bridge IC3, a voltage-stabilizing diode set (VD1, VD2), a rectifier diode D6, a third voltage-stabilizing diode VD3, a sixth capacitor C6 and a seventh capacitor C7, the step-down resistor R4 is connected between the power side live wire terminal L and one pole of the alternating current input end of the rectifier bridge IC3 in series, the fourth capacitor C4 is connected to both ends of the step-down resistor R4 in parallel, the positive pole of the direct current output end of the rectifier bridge IC3 is used as a positive pole node A1 of the direct current output end of the buck regulator rectifier circuit A and is connected with the detection signal output end of the outage detection circuit B, the negative pole of the first voltage-stabilizing diode VD1 of the voltage-stabilizing diode set (VD1, VD2), the positive pole of the sixth capacitor C6 and the positive pole node A1 are connected in parallel, the positive pole of the first voltage-stabilizing diode VD 1 is connected with the negative pole of the second voltage-stabilizing diode VD2, the positive pole of the second voltage-stabilizing diode VD2 is used as a voltage regulating node A2 of the direct current output end of the buck regulator rectifier circuit A and is connected with the energy storage positive pole of the electric energy input end of the tank circuit D, the positive pole of the rectifier diode D6 is connected with the voltage regulating node A2, the negative pole of the rectifier diode D6, the negative pole of a third voltage-stabilizing diode VD3 and the positive pole of the seventh capacitor C7 are connected in parallel and used as a voltage-stabilizing node A3 of the direct current output end of the buck regulator rectifier circuit A, the voltage-stabilizing node A3 is connected with the positive pole of the power supply of the electric energy input end of the tank circuit D or the power input end of the timing control circuit C, the negative pole of the sixth capacitor C6, the negative pole of the seventh capacitor C7 and the positive pole of the third voltage-stabilizing diode VD3 are connected with the earth pole of the direct current output end of the rectifier bridge IC3, and the earth pole of the direct current output end of the rectifier bridge IC3 is used as the earth pole of the direct current output end of the buck regulator rectifier circuit A.
Further, the outage detection circuit B comprises a photoelectric coupler IC1, a first resistor R1, a second resistor R2, a second capacitor C2 and a first light emitting diode D1, one end of the first resistor R1 is used as the detection signal input end of the outage detection circuit B and is connected with the positive pole node A1 of the direct current output end of the buck regulator rectifier circuit A, the other end of the first resistor R1 is connected with the positive pole of the input end of the photoelectric coupler IC1, the negative pole of the input end of the photoelectric coupler IC1 is connected with the positive pole of the first light emitting diode D1, the positive pole of the output end of the photoelectric coupler IC1 is connected with the electric energy output end of the tank circuit D, the negative pole of the output end of the photoelectric coupler IC1 is used as the detection signal output end of the outage detection circuit B and is connected with one end of the second resistor R2 and one end of the second capacitor C2 in parallel, and the other end of the second resistor R2, the other end of the second capacitor C2 and the negative pole of the first light emitting diode D1 are connected with the earth pole of the direct current output end of the buck regulator rectifier circuit A in parallel.
Further, the timing control circuit C comprises a time delay control chip IC2, a crystal oscillator Y1,a first capacitor C1,a third capacitance C3,a ninth resistor R9 and a second light emitting diode D2, the first pin VDD of the time delay control chip IC2 is used as the power input end of the time delay control circuit C and is connected with the electric energy output end of the tank circuit D, the second pin OSC1 of the time delay control chip IC2 is connected with one end of the crystal oscillator Y1 and one end of the first capacitor C1 in parallel, and the third pin OSC2 of the time delay control chip IC2 is connected with the other end of the crystal oscillator Y1 and one end of the third capacitor C3 in parallel. The fifth pin RC5 of the time delay control chip IC2 is used as the processing signal input end of the timing control circuit C and is connected with the detection signal output end of the outage detection circuit B, the sixth pin RC4 of the time delay control chip IC2 is used as the control signal output end of the timing control circuit C and is connected with the control signal input end of the relay output circuit E, the ninth pin RC1 of the time delay control chip IC2 is connected with one end of the ninth resistor R9, the other end of the ninth resistor R9 is connected with the positive pole of the second light emitting diode D2.The other end of the first capacitor C1, the other end of the third capacitor C3 as well as the negative pole of the second light emitting diode D2 and the fourteen pin VSS of the time delay control chip IC2 are connected with the earth pole of the direct current output end of the buck regulator rectifier circuit A in parallel.
Further, the tank circuit D comprises a third resistor R3, a third diode D3, a forth diode D4, a fifth diode D5 and a super-capacitor C5, one end of the third resistor R3 is used as the energy storage positive pole of the electric energy input end of the tank circuit D and is connected with the voltage regulating node A2 of the direct current output end of the buck regulator rectifier circuit A, one end of the third resistor R3 is connected with the positive pole of the forth diode D4, the negative pole of the forth diode D4 is connected with the positive pole of the super-capacitor C5 and the positive pole of the fifth diode D5 in parallel, the positive pole of the third diode D3 is used as the power positive pole of the electric energy input end of the tank circuit D and is connected with the voltage-stabilizing node A3 of the direct current output end of the buck regulator rectifier circuit A, the negative pole of the super-capacitor C5 is connected with the earth pole of the direct current output end of the buck regulator rectifier circuit A, the negative pole of the fifth diode D5 is connected with the negative pole of the third diode D3 to form an electric energy output end of the tank circuit D, and this electric energy output end and the positive pole of the output end of the outage detection circuit B are connected with the power input end of the timing control circuit C in parallel.
Further, the relay output circuit E comprises a fifth resistor R5, a sixth resistor R6, a seventh resistor R7 an eighth resistor R8, as well as a first triode Q1, a second triode Q2 and a seventh diode D7, the emitter of the first triode Q1 is connected with one end of the fifth resistor R5 and the positive pole node A1 of the direct current output end of the buck regulator rectifier circuit A in parallel, the other end of fifth resistor R5 is connected with the base of the first triode Q1 and one end of the sixth resistor R6 in parallel, the collector of the first triode Q1 is connected with the negative pole of the seventh diode D7 and one end of the input loop of the relay in parallel, the other end of the relay input loop is connected with the positive pole of the seventh diode D7 and the voltage-stabilizing node A3 of the direct current output end of the buck regulator rectifier circuit A in parallel, the other end of the sixth resistor R6 is connected with the collector of the second triode Q2, the emitter of the second triode Q2 is connected with one end of the seventh resistor R7 and the earth pole of the direct current output end of the buck regulator rectifier circuit A in parallel, the other end of the seventh resistor R7 is connected with the base of the second triode Q2 and one end of the eighth resistor R8 in parallel, and the other end of the eighth resistor R8 is used as the control signal input end of the relay output circuit E and is connected with the control signal output end of the timing control circuit C.
Further, the relay is an electromagnetic relay.
Further, the timing control circuit C further comprises a time setting circuit, the time setting circuit comprises a tenth resistor R10, a potentiometer R11, an eighth diode D8 and an eighth capacitor C8, one end of the tenth resistor R10 is connected with the tenth pin RC0 of the time delay control chip IC2, the other end of the tenth resistor R10 is connected with the positive pole of the eighth diode D8, the sliding end of the potentiometer R11 and one end of the eighth capacitor C8 in parallel, the negative pole of the eighth diode D8 is connected with one fixed end of the potentiometer R11 and the first pin VDD of the time delay control chip IC2 in parallel, and one end of the eighth capacitor C8 is connected with the other fixed end of the potentiometer R11 and the earth pole of the direct current output end of the buck regulator rectifier circuit A in parallel.
The time relay used for the metal halide lamp and similar loads according to the invention meets the requirements of the time delay control process and the time delay feature of the metal halide lamp and similar loads, can take the place of manual guard, automatically controls the connection of the load power circuit according to the preset delay time, can effectively protect the metal halide lamp and similar loads, and prolongs the service life of the metal halide lamp and similar loads. Further, the direct control ability of the output contact in the invention can meet the requirements of large power of the metal halide lamp and similar loads. The state indicator lamp in the time delay control process after outage can always keep working, which is convenient for the user to learn about the current running state.

Brief Description of the Drawings

Fig. 1 is a logic time sequence diagram of the existing time delay type time relay.
Fig. 2 is a logic time sequence diagram as required for the metal halide lamp and similar loads.
Fig. 3 is a schematic diagram of a circuit of the embodiment of the time relay used for the metal halide lamp and similar loads according to the invention.
Fig. 4 is an enlarged drawing of a timing control circuit C of the invention.

Detailed Description of the Preferred Embodiments

The detailed description of the preferred embodiments of the time delay used for the metal halide lamp and similar loads according to the invention is further described hereinafter with reference to the embodiments given in the drawing 3. The time delay used for the metal halide lamp and similar loads according to the invention is not limited to the description of the embodiments as follows.
See Fig. 3, the time delay used for the metal halide lamp and similar loads according to the invention includes a power side phase wire terminal L, a power side neutral wire terminal N, a load side live wire terminal 4, a load side ground wire terminal 3, a control circuit and a relay. The power side phase wire terminal L and the power side neutral wire terminal N are used for connecting with a phase wire and a neutral wire of an alternating current network. Required a conventional practices when using a switch device (without being shown in the figure) needs to be arranged between the phase wire terminal L and the phase wire of the alternating current network and between the neutral wire terminal N and the neutral wire of the alternating current network. The phase wire terminal L and the neutral wire terminal N are powered on or powered off by turning on or off the switch device. The neutral wire terminal N is connected with the ground wire terminal 3, the output contact K1 of the relay is connected between the phase wire terminal L and the live wire terminal 4 in series, and the load side live wire terminal 4 and the ground wire terminal 3 are used for connecting with the metal halide lamp and similar loads. Therefore, the electrification/outage of the live wire terminal 4 and the ground wire terminal 3 for connecting the metal halide lamp and similar loads is controlled by the switch device and the output contact K1 in series, the electrification of the metal halide lamp and similar loads must meet the condition that the switch device and the output contact K1 are closed at the same time, and the outage of the metal halide lamp and similar loads will be caused if any one of the switch device and the output contact K1 is disconnected.
The control circuit includes five sub-circuits of a buck regulator rectifier circuit A, an outage detection circuit B, a timing control circuit C, a tank circuit D and a relay output circuit E. Two poles of an AC input end of the buck regulator rectifier circuit A are respectively connected with the phase wire terminal L and the neutral wire terminal N, loading voltage or unloading voltage at a DC output end of the buck regulator rectifier circuit A is controlled by electrification or outage of the phase wire terminal L and the neutral wire terminal N, i.e.: the voltage is loaded at the direct current output end of the buck regulator rectifier circuit A via the on operation of the switch device, and the voltage is unloaded at the direct current output end of the buck regulator rectifier circuit A via the off operation of the switch device, the buck regulator rectifier circuit A is connected with the relay output circuit E to supply electricity, a detection signal input end of the outage detection circuit B is connected with the direct current output end of the buck regulator rectifier circuit A, and this output end is connected with a processing signal input end of the timing control circuit C to provide a detection signal whether the power supply is normal for the timing control circuit C; an electric energy input end of the tank circuit D is connected with the direct current output end of the buck regulator rectifier circuit A, and the output end is connected with the power input end of the timing control circuit C, energy is stored when voltage is loaded at the direct current output end, and the electricity is supplied for the timing control circuit C when the voltage is unloaded; a control signal output end of the timing control circuit C is connected with a control signal input end of the relay output circuit E, at the instant that the direct current output end is converted from loading into unloading voltage, the tank circuit D supplies electricity to the timing control circuit C, the outage detection circuit B outputs a voltage unloading signal to the timing control circuit C, the timing control circuit C enters a long time delay timekeeping process, and the situation that the output contact K1 of the relay is prohibited to be closed until the timekeeping process is finished is controlled by the relay output circuit E and the timing control circuit C.
In the control circuit according to the invention, the tank circuit D and the buck regulator rectifier circuit A can be designed separately, the tank circuit D does not affect the voltage value output by the buck regulator rectifier circuit A in the charging process, and the tank circuit D can also effectively store the energy to add the energy storage capacity, which can meet the electricity demand of the long time delay control.
The circuit structure of the control circuit, the control mode, the control process and the control relationship among various sub-circuits are as follows: in the process that the voltage is loaded at the direct current output end, the buck regulator rectifier circuit A provides a direct current power supply for the outage detection circuit B, the timing control circuit C, the tank circuit D and the relay output circuit E, and the tank circuit D stores the energy; in the process that the voltage is unloaded at the direct current output end, the buck regulator rectifier circuit A stops providing the power supply for the outage detection circuit B, the timing control circuit C, the tank circuit D and the relay output circuit E, but the tank circuit D provides the direct current power supply for the timing control circuit C; at the instant that the voltage is unloaded at the direct current output end, the outage detection circuit B controls the timing control circuit C to automatically enter the long time delay timekeeping process, the timing control circuit C controls output contact K1 of the relay to be converted to be disconnected via the relay output circuit E, at the same time, the relay output circuit E is directly controlled by unloading the voltage at the direct current output end to enable the output contact K1 to be converted to be disconnected, and the output contact K1 always keeps disconnected in the process that the voltage is unloaded at the direct current output end; if the voltage is loaded at the direct current output end before the long time delay timekeeping process of the timing control circuit C is finished, the timing control circuit C controls the output contact K1 of the relay to continuously keep disconnected via the relay output circuit E; if the voltage is loaded at the direct current output end after the long time delay timekeeping process of the timing control circuit C is finished, the relay output circuit E enables the output contact K1 of the relay to be converted to be closed under the double control of the timing control circuit C and the voltage loaded at the direct current output end. Said instant that the voltage is unloaded means the instant the voltage loading state is converted into the voltage unloading state; the process that the voltage is unloaded means the full process from the instant that the voltage is unloaded to the voltage unloading state is maintained; the process that the voltage is loaded means the full process from the instant that the voltage is loaded to the voltage loading state is maintained, and the instant that the voltage is loaded means the instant that the voltage unloading state is converted into the voltage loading state. The long time delay timekeeping process means the time delay timekeeping process that the time delaying range can be longer than 4 minutes.
The input-output mode of electric signals among various sub-circuits of the control circuit under various working states can have several schemes, one preferred scheme of which is as follows: at a normal state that the voltage is loaded at the direct current output end, a detection signal output end of the outage detection circuit B maintains a high level, a control signal output end of the timing control circuit C maintains the high level, the relay output circuit E close on an input loop of the relay under the control of the high level, and the output contact K1 keeps closed under the drive control of the loading voltage of the direct current output end, and the tank circuit D is in a energy storage state; at the instant that the voltage is unloaded at the direct current output end, the detection signal output end of the outage detection circuit B is converted into the low level, the timing control circuit C enters the long time delay timekeeping process under the control of the low level and the control signal output end is converted into the low level, the relay output circuit E enables the output loop of the relay to cut off (not close on) under the control of the low level, at the same time, the output contact K1 of the relay is converted to be disconnected under the control that the voltage is unloaded at the direct current output end, and the tank circuit D is converted into the electricity supply state; when the timing control circuit C is located in the long time delay timekeeping process, the control signal output end of the timing control circuit C always keeps at the low level no matter whether the voltage at the direct current output end and the level at the detection signal output end are changed or not, the relay output circuit E enables the input loop of the relay to cut off under the control of the low level, the cut-off enable the output contact K1 of the relay not to close; at the instant that the long time delay timekeeping process is finished, the control signal output end of the timing control circuit C is converted into the high level, the relay output circuit E allows the input loop of the relay to close on under the control of the high level, at this time, the input loop of the relay is closed on and the output contact K1 of the relay is converted to be closed under the drive control of the voltage if the voltage has been loaded at the direct current output end, the relay output circuit E enables the output contact K1 of the relay to continuously keep disconnected without the drive voltage if the voltage has been unloaded at the direct current output end, the tank circuit D continues to supply the electricity until the electric energy is exhausted; at the instant that the voltage is loaded at the direct current output end, the detection signal output end of the outage detection circuit B is converted into the high level, the timing control circuit C automatically detects whether the previous long time delay timekeeping process comes to an end under the control of the high level, if the long time delay timekeeping process does not come to an end, the control signal output end continues to keep the low level, if the long time delay timekeeping process comes to an end, the control signal output end is converted into the high level, and the input loop of the relay close on under the drive control of the high level and the loaded voltage and the output contact K1 of the relay is converted to be closed, and the tank circuit D returns to the energy storage state. At the instant that the voltage is loaded at the direct current output end, there can be several specific modes of the long time delay timekeeping process automatically detected by the timing control circuit C. These different modes will lead to tiny distinction among the use functions of the time relay. The tiny distinction is mainly reflected in performing electrification/outrage operation for many times in the same long time delay timekeeping process. This problem will be descried hereinafter by giving examples. Example 1, the long time delay timekeeping process automatically detected by the timing control circuit C is a mode of a previous outage long time delay timekeeping process. It is assumed that one time delay process is 60-minute, once outage is performed in 40-minute after starting the process and then the electrification operation is performed again, the time that the output contact K1 of the relay is converted to be closed is the time that the previous outage long time delay timing process is finished, i.e., the 60th-minute after the previous outage long time delay timekeeping process. Example 2, the long time delay timekeeping process automatically detected by the timing control circuit C is a mode of this outage long time delay timekeeping process. Similarly, it is assumed that one time delay process is 60-minute, once outage is performed in 40-minute after starting the process and then the electrification operation is performed again, the time that the output contact K1 of the relay is converted to be closed is the time that this outage long time delay timing process is finished, i.e., the 100th-minute after the previous outage long time delay timekeeping process. The preferred mode of the invention is the mode of the example 1, i.e.: at the instant that the voltage is loaded at the direct current output end, the long time delay timekeeping process automatically detected by the timing control circuit C is the previous outage long time delay timekeeping process.
The specific circuit structure of various sub-circuits can have several schemes, and one preferred scheme of five sub-circuits is as follows:
The buck regulator rectifier circuit A includes a step-down resistor R4, a capacitor C4, a rectifier bridge IC3, a voltage-stabilizing diode set (VD1, VD2), a rectifier diode D6, a voltage-stabilizing diode VD3, a capacitor C6 and a capacitor C7. The step-down resistor R4 is connected between the power side live wire terminal L and one pole of the alternating current input end of the rectifier bridge IC3 in series, the capacitor C4 is connected to both ends of the step-down resistor R4 in parallel, the positive pole of the direct current output end of the rectifier bridge IC3 is used as a positive pole node A1 of the direct current output end of the buck regulator rectifier circuit A and is connected with the detection signal input end of the outage detection circuit B, the negative pole of the voltage-stabilizing diode VD1 of the voltage-stabilizing diode set (VD1, VD2), the positive pole of the capacitor C6 and the positive pole node A1 are connected in parallel, the positive pole of the voltage-stabilizing diode VD1 is connected with the negative pole of the voltage-stabilizing diode VD2, the positive pole of the voltage-stabilizing diode VD2 is used as a voltage regulating node A2 of the direct current output end of the buck regulator rectifier circuit A and is connected with the energy storage positive pole of the electric energy input end of the tank circuit D, the positive pole of the rectifier diode D6 is connected with the voltage regulating node A2, the negative pole of the rectifier diode D6, the negative pole of a voltage-stabilizing diode VD3 and the positive pole of the capacitor C7 are connected in parallel and used as a voltage-stabilizing node A3 of the direct current output end of the buck regulator rectifier circuit A, the voltage-stabilizing node A3 is connected with the positive pole of the power supply of the electric energy input end of the tank circuit D or the power input end of the timing control circuit C, the negative pole of the capacitor C6, the negative pole of the capacitor C7 and the positive pole of the voltage-stabilizing diode VD3 are connected with the earth pole of the direct current output end of the rectifier bridge IC3, and the earth pole of the direct current output end of the rectifier bridge IC3 is used as the earth pole of the direct current output end of the buck regulator rectifier circuit A. It can be seen from the preferred embodiment of the buck regulator rectifier circuit A, the direct current output end of the rectifier bridge IC3 includes a positive pole and an earth pole, a positive pole node A1, a voltage regulating node A2 and a voltage-stabilizing node A3 at the positive pole of the direct current output are formed via the partial voltage of the voltage-stabilizing diode VD1, the voltage-stabilizing diode VD2 and the voltage-stabilizing diode VD3 on the positive pole. The voltage among these three nodes can be adapted according to the requirements of various sub-circuits, and the voltage to earth of the voltage regulating node A2 and the voltage-stabilizing node A3 is less than the positive pole node A1. The positive pole node A1 is used as not only the electrifying node of the relay output circuit E, but also a signal gathering node at the detection signal input end of the outage detection circuit B. The voltage loaded at the direct current output end of the buck regulator rectifier circuit A means that the positive pole node A1 has a working voltage to earth, and the voltage unloaded at the direct current output end of the buck regulator rectifier circuit A means that the voltage to earth of the positive pole node A1 is zero. The voltage regulating node A2 is used as the electrifying node of the energy storage loop of the tank circuit D, and the voltage-stabilizing node A3 is used as the electrifying node of the changing connection power loop of the energy storage loop D. Of course, one equivalent circuit structure is that the voltage-stabilizing node A3 is directly used as the electrifying node of the timing control circuit C. Thus it can be seen that through the positive pole node A1, the voltage regulating node A2 and the voltage-stabilizing node A3, in the process that the voltage is loaded at the direct current output end, the buck regulator rectifier circuit A provides the direct current power supply for the outage detection circuit B, the timing control circuit C, the tank circuit D and the relay output circuit E, and the tank circuit D stores the energy; of course, in the process that the voltage is unloaded at the direct current output end, the buck regulator rectifier circuit A stops providing the power supply for the outage detection circuit B, the timing control circuit C, the tank circuit D and the relay output circuit E. The voltage-stabilizing diode set adopts a structure formed by connecting the voltage-stabilizing diode VD1 and the voltage-stabilizing diode VD2 in series. The object of using two voltage-stabilizing diodes is to reduce the voltage at both ends of each voltage-stabilizing diode, so the equivalent scheme can be one or more than two voltage-stabilizing diodes. A voltage division circuit formed by the voltage-stabilizing diode VD1, the voltage-stabilizing diode VD2 and the voltage-stabilizing diode VD3 has a perfect voltage-stabilizing effect. One adverse scheme is to use a resistor to take the place of the voltage-stabilizing diode. Obviously, the adverse scheme does not have the voltage-stabilizing function. Another adverse scheme is to omit the rectifier diode D6 and/or the capacitor C7, which does not affect the work of the circuit, but affect the performance of the circuit, for example, failing to prevent the damage of the impact voltage of the input loop of the relay to the circuit.
The outage detection circuit B includes a photoelectric coupler IC1, a resistor R1, a resistor R2, a capacitor C2 and a light emitting diode D1, one end of the first resistor R1 is used as the detection signal input end of the outage detection circuit B and is connected with an positive pole node A1 of the direct current output end of the buck regulator rectifier circuit A, the other end of the resistor R1 is connected with the positive pole of the input end of the photoelectric coupler IC1, the negative pole of the input end of the photoelectric coupler IC1 is connected with the positive pole of the light emitting diode D1, the positive pole of the output end of the photoelectric coupler IC1 is connected with the electric energy output end of the tank circuit D, the negative pole of the output end of the photoelectric coupler IC1 is used as the detection signal output end of the outage detection circuit B and is connected with one end of the resistor R2 and one end of the capacitor C2 in parallel, and the other end of the resistor R2, the other end of the capacitor C2 and the negative pole of the light emitting diode D1 are connected with the earth pole of the direct current output end of the buck regulator rectifier circuit A in parallel. Under the normal state that the voltage is loaded at the direct current output end, the current is flowed from the positive pole node A1 at the direct current output end of the buck regulator rectifier circuit A to the earth pole through the resistor R1, the input loop of the photoelectric coupler IC1 and the light emitting diode D1 to turn on the light emitting diode D1, that is to say the power supply close on the indicator lamp and the output loop of the photoelectric coupler IC1 is close on at the same time, the voltage at the electric energy output end of the tank circuit D is loaded at one end of the resistor R1 through the output loop of the photoelectric coupler IC1, and one end of the resistor R1 as the detection signal output end of the outage detection circuit B keeps the high level. At the instant that the voltage is unloaded at the direct current output end and under the state that unloading the voltage is kept, as the input loop of the photoelectric coupler IC1 has no current to flow through, the light emitting diode D1 turns off and the output loop of the photoelectric coupler IC1 is cut off (not close on), the voltage at the electric energy output end of the tank circuit D cannot be loaded to one end of the resistor R1 as the detection signal output end of the outage detection circuit B, and the detection signal output end of the outage detection circuit B is converted into and kept at the low level.
The timing control circuit C includes a time delay control chip IC2, a crystal oscillator Y1, a capacitor C1, a capacitor C3, a resistor R9 and a light emitting diode D2, the pin 1 VDD of the time delay control chip IC2 is used as the power input end of the time delay control circuit C and is connected with the electric energy output end of the tank circuit D, the pin 2 OSC1 of the time delay control chip IC2 is connected with one end of the crystal oscillator Y1 and one end of the capacitor C1 in parallel, the pin 3 OSC2 of the time delay control chip IC2 is connected with the other end of the crystal oscillator Y1 and one end of the capacitor C3 in parallel, the pin 5 RC5 of the time delay control chip IC2 is used as the processing signal input end of the timing control circuit C and is connected with the detection signal output end of the outage detection circuit B, the pin 6 RC4 of the time delay control chip IC2 is used as the control signal output end of the timing control circuit C and is connected with the control signal input end of the relay output circuit E, the pin 9 RC1 of the time delay control chip IC2 is connected with one end of the resistor R9, the other end of the resistor R9 is connected with the positive pole of the light emitting diode D2, the other end of the capacitor C1, the other end of the capacitor C3, the negative pole of the light emitting diode D2 and the pin 14 VSS of the time delay control chip IC2 are connected with the earth pole of the direct current output end of the buck regulator rectifier circuit A in parallel. The time delay control chip IC2 is a single chip SCM. The PIC single chip with the model of PIC16F684 is selected in the embodiment, the pin 1 VDD and the pin 14 VSS are respectively the positive pole and the negative pole of the power input end of the time delay control IC2 and also the positive pole and the negative pole of the power input end of the timing control circuit C. In addition, the invention further applies the following features of the time delay control chip IC2 to form a circuit structure meeting the control requirement of the time delay according to the invention. The time delay control feature and the structure of the time delay control chip IC2 are applied. A clock source circuit formed by the crystal oscillator Y1, the capacitor C1 and the capacitor C3 connected between the pin 2 OSC1 and the pin 3 OSC2 of the time delay control chip IC2 is a clock providing a program run for the time delay control chip IC2, and the precision of the clock is high and the stability is good. The time delay control chip IC2 can further select the commonly-used RC clock circuit as the program run providing clock, or select the single chip with an internal clock. When the internal clock is used as the clock for program run, the pin 2 OSC1 and the pin 3 OSC2 of the time delay control chip IC2 can be suspended. The RC clock circuit has a big error and a low frequency, and the internal clock has a low precision and is easily affected by temperature, so the clock source circuit of the embodiment is preferred. The clock source is provided for time delay and timekeeping of the time delay control chip IC2. As the scope of the duration of the crystal oscillator Y1 is extremely large, the long time delay can be achieved. The pin 5 RC5 of the time delay control chip IC2 can also be used as the processing signal input end of the timing control circuit C (also the detection signal output end of the outage detection circuit B), the pin 6 RC4 of the time delay control chip IC2 is used as the control signal output end of the timing control circuit C (also the control signal input end of the relay output circuit E), the pin 9 RC1 of the time delay control chip IC2 is used as the light emitting diode D2, i.e., the power supply of the time delay indicator lamp to form the control relationship achieving the control requirement of the invention as follows: under the control that the high level is input at the pin 5 RC5, the high level is output at the pin 6 RC4; at the instant that the high level is converted into the low level at the pin 5 RC5, the time delay control chip IC2 enters the long time delay timekeeping process, at the same time, the pin 6 RC4 is also converted into the low level, the pin 9 RC1 outputs an impulse voltage to enable the light emitting diode D2 to twinkle; at the instant that the long time delay timekeeping process is finished, the pin 6 RC4 is converted into the high level and outputs a control signal to the relay output circuit E, while the output voltage of the pin 9 RC1 is converted into the direct current voltage to enable the light emitting diode D2 to turn on normally. One optionally preferred scheme is to apply the reference voltage of the pin 10 RC0 of the time delay control chip IC2 to achieve the control of the time delay duration of the time delay control chip IC2. The specific circuit structure is as follows: the timing control circuit C further includes a time setting circuit, the time setting circuit includes a resistor R10, a potentiometer R11, a diode D8 and a capacitor C8, one end of the resistor R10 is connected with the pin 10 RC0 of the time delay control chip IC2, the other end of the resistor R10 is connected with the positive pole of the diode D8, the sliding end of the potentiometer R11 and one end of the capacitor C8 in parallel, the negative pole of the diode D8 is connected with one fixed end of the potentiometer R11 and the pin 1 VDD of the time delay control chip IC2 in parallel, and one end of the capacitor C8 is connected with the other fixed end of the potentiometer R11 and the earth pole of the direct current output end of the buck regulator rectifier circuit A in parallel. When one mechanical displacement is input into the sliding end of the potentiometer R11 through manual operation, the reference voltage value of the pin 10 RC0 can be changed, and the time duration of time delay and timekeeping of the time delay control chip IC2 is set by changing the reference voltage value of the pin 10 RC0. Obviously, the time setting circuit cannot only provide the self-setting of the time delay duration for the user, but also can provide an accurate time delay duration precision and the great time delay duration scope, so as to expand the use function of the product, such as: for the electrification/outage control of the metal halide lamp, the user can autonomously set the time delay duration according to the model of the metal halide lamp, the season or the usage occasion; and for the power control, the accurate control of the electrification/outage time can be performed according to the actual requirement of power consumption management.
The tank circuit D comprises a resistor R3, a diode D3, a diode D4, a diode D5 and a super-capacitor C5, one end of the resistor R3 is used as the energy storage positive pole of the electric energy input end of the tank circuit D and is connected with the voltage regulating node A2 of the direct current output end of the buck regulator rectifier circuit A, one end of the resistor R3 is connected with the positive pole of the diode D4, the negative pole of the diode D4 is connected with the positive pole of the super-capacitor C5 and the positive pole of the diode D5 in parallel, the positive pole of the diode D3 is used as the power positive pole of the electric energy input end of the tank circuit D and is connected with the voltage-stabilizing node A3 of the direct current output end of the buck regulator rectifier circuit A, the negative pole of the super-capacitor C5 is connected with the earth pole of the direct current output end of the buck regulator rectifier circuit A, the negative pole of the diode D5 is connected with the negative pole of the diode D3 to form an electric energy output end of the tank circuit D, and said electric energy output end and the positive pole of the output end of the outage detection circuit B are connected with the power input end of the timing control circuit C in parallel. When the voltage is loaded at the direct current output end of the buck regulator rectifier circuit A, the current flow out from the voltage regulating node A2 through the resistor R3 and the diode D4 and to the super-capacitor C5 and charges for the super-capacitor C5, i.e., the buck regulator rectifier circuit A provides the direct current power supply for the tank circuit D while the tank circuit D is in the energy storage state; during the charging period of the super-capacitor C5, when the voltage at both ends of the super-capacitor C5 is very low (even zero), the resistor R3 plays a role in limiting current and dividing voltage to ensure the voltage of the voltage regulating node A2 and the voltage stabilizing node A3 is not lowered by the charging of the super-capacitor C5, thereby ensuring the voltage supplying the electricity for the IC2 in the circuit C is normal at the instant of electrifying; the current of the voltage-stabilizing node A3 flows through the diode D3 into the positive pole of the output end of the photoelectric coupler IC1 of the outage detection circuit B and the power input end (pin 1 VDD) of the timing control circuit C, i.e., the buck regulator rectifier circuit A provides the direct current power supply for the outage detection circuit B and the timing control circuit C; due to the reverse cut-off feature of the diode D5, the current from the voltage-stabilizing node A3 will not flow into the super-capacitor C5. When the voltage is unloaded at the direct current output end of the buck regulator rectifier circuit A: the voltage regulating node A2 and the voltage-stabilizing node A3 are the low level, while the positive pole of the super-capacitor C5 is high level, so the super-capacitor C5 discharges, the current flowing from the positive pole of the super-capacitor C5 flows through the diode D5 into the power input end (pin 1) of the timing control circuit C, i.e., the tank circuit D is used as the power supply to continuously provide the power supply for the timing control circuit C; under the control that the voltage is unloaded at the direct current output end, the output loop of the photoelectric coupler IC1 of the outage detection circuit B is cut off (not close on), so the current flowing from the positive pole of the super-capacitor C5 will not flow into the output loop of the photoelectric coupler IC1; and due to the reverse cut-off feature of the diode D4 and the diode D3, the current flowing from the positive pole of the super-capacitor C5 will not flow back to the voltage regulating node A2 and the voltage-stabilizing node A3. Due to the ultra-large capacity feature, the super-capacitor C5 is equivalent to one battery, which can meet the power requirement for the long time delay timekeeping run of the timing control circuit C.
The relay output circuit E comprises a resistor R5, a resistor R6, a resistor R7, a resistor R8, a triode Q1, a triode Q2, a diode D7 and a relay, the emitter of the triode Q1 is connected with one end of the resistor R5 and the positive pole node A1 of the direct current output end of the buck regulator rectifier circuit A in parallel, the other end of resistor R5 is connected with the base of the triode Q1 and one end of the resistor R6 in parallel, the collector of the triode Q1 is connected with the negative pole of the diode D7 and one end of the input loop of the relay in parallel, the other end of the relay input loop is connected with the positive pole of the diode D7 and the voltage-stabilizing node A3 of the direct current output end of the buck regulator rectifier circuit A in parallel, the other end of the resistor R6 is connected with the collector of the triode Q2, the emitter of the triode Q2 is connected with one end of the resistor R7 and the earth pole of the direct current output end of the buck regulator rectifier circuit A in parallel, the other end of the resistor R7 is connected with the base of the triode Q2 and one end of the resistor R8 in parallel, and the other end of the resistor R8 is used as the control signal input end of the relay output circuit E and is connected with the control signal output end of the timing control circuit C. Under the current situation that the control signal output end of the timing control circuit C outputs the high level (i.e., the base of the triode Q2 is the high level): if the voltage has been loaded at the direct current output end, the triode Q1 is close on under the control of the high level, to enable the voltage to earth (i.e., the loading voltage) of the positive pole node A1 at the direct current output end to load at both ends of the input loop of the relay, so that the relay is actuated and the output contact K1 is closed; if the voltage has been unloaded at the direct current output end, the high level cannot control the triode Q1 to close on, at the same time, no voltage can motivate the contact of relay to sticking, so the output contact K1 of the relay is disconnected. Under the current situation that the control signal output end of the timing control circuit C outputs the low level (i.e., the base of the triode Q2 is the low level): if the voltage has been loaded at the direct current output end, the triode Q1 is cut off (not close on) under the control of the low level, to enable the voltage to earth (i.e., the loading voltage) of the positive pole node A1 at the direct current output end can not load at both ends of the input loop of the relay, so that the input loop of the relay enables the output contact K1 to cut off as no drive voltage is provided; of course, under the current situation that the voltage has been unloaded at the direct current output end, the output contact K1 is disconnected as the triode Q1 is cut off (not close on) and the input loop of the relay is not provided with the drive voltage.
The relay is preferred as a general electromagnetic relay, with the advantages that the working current of the output contact K1 is high, the breaking capacity is strong and the cost performance is better. It should be understood that as the invention adopts the above control circuit, it is likely to select the general electromagnetic relay, or, the conventional magnetic latching relay cannot be adopted to obtain the effect of the high working current of the output contact and directly control many high-power metal halide lamps.
As you can see from the above, the time relay used for the metal halide lamp and similar loads according to the invention can better meet the special use requirements of the metal halide lamp and similar loads. These special use requirements are as follows: e.g. only if two conditions that the voltage is loaded at the direct current output end and the long time delay timekeeping process is finished are met at the same time, the control circuit can close the output contact K1 of the relay, i.e., electrifying the metal halide lamp and similar loads; if two conditions that the voltage is loaded at the direct current output end and the long time delay timekeeping process is finished are not met, or one of conditions is not met, the output contact K1 of the relay cannot be closed, i.e., failing to electrify the metal halide lamp and similar loads; the instant that the voltage is unloaded at the direct current output end of the buck regulator rectifier circuit A is used as the starting point of the long time delay timekeeping, the reliability and accuracy of the time interval between two starting actions are ensured; the instant that the long time delay timekeeping process is finished is used as the control condition of allowing the input loop of the relay to close on, which can enable the secondary starting of the time relay product to have two starting modes of time delay control starting and manual starting; due to the time setting circuit, the time delay range of the relay product is large and regulated, the timing is accurate and reliable, so the multi-purpose requirement is met. The so-called time delay control starting means firstly performing outage operation for the switch device, and then performing the electrification operation before the time delay is finished. In this way, the control circuit automatically electrifies the load when the time delay is finished. The electrifying operation performed immediately for the product in the manual operation starting means firstly performing the outage operation for the switch device and then performing the electrification operation after the time delay is finished. In this way, the load will be electrified immediately due to the operation at this time.

Claims

A time relay suitable to be used in a metal halide lamp and similar loads, comprising a power side phase wire terminal (L), a power side neutral wire terminal (N), a load side live wire terminal (4), a load side ground wire terminal (3), and a control circuit, wherein the neutral wire terminal (N) is connected with the ground wire terminal (3), an output contact (K1) of the relay is connected between the phase wire terminal L and the live wire terminal (4) in series, wherein:
the control circuit comprises a buck regulator rectifier circuit (A), an outage detection circuit (B), a timing control circuit (C), a tank circuit (D) and a relay output circuit (E); two poles of an AC input end of the buck regulator rectifier circuit (A) are respectively connected with the phase wire terminal (L) and the neutral wire terminal (N), and loading voltage or unloading voltage at a direct current (DC) output end of the buck regulator rectifier circuit (A) is controlled by electrification or outage of the phase wire terminal (L) and the neutral wire terminal (N);

wherein the buck regulator rectifier circuit (A) is connected with the relay output circuit (E) to supply electricity, a detection signal input end of the outage detection circuit (B) is connected with a positive pole node (A1) of the direct current output end of the buck regulator rectifier circuit (A), an output end of the outage detection circuit (B) is connected with a processing signal input end of the timing control circuit (C) to provide a detection signal of loading voltage or unloading voltage of the positive pole node (A1) of the DC output end of the buck regulator rectifier circuit (A); an electric energy input end of the tank circuit (D) is connected with a voltage regulating node (A2) and a voltage-stabilizing node (A3) of the direct current output end of the buck regulator rectifier circuit (A), an output end of the tank circuit (D) is connected with a power input end of the timing control circuit (C), such that energy is stored when voltage is loaded at the direct current output end, and the electricity is supplied for the timing control circuit (C) when the voltage is unloaded; and

wherein a control signal output end of the timing control circuit (C) is connected with a control signal input end of the relay output circuit (E), such that at the instant that the direct current output end is converted from loading into unloading voltage, the tank circuit (D) is configured to supply electricity to the timing control circuit (C), the outage detection circuit (B) is configured to output a voltage unloading signal to the timing control circuit (C), the timing control circuit (C) is configured to enter a long time delay timekeeping process, and the situation that the output contact (K1) of the relay is prohibited to be closed until the timekeeping process is finished is controlled by the control circuit (C) through the relay output circuit (E).
The time relay according to claim 1, wherein: the buck regulator rectifier circuit (A) comprises a step-down resistor (R4), a fourth capacitor (C4), a rectifier bridge (IC3), a voltage-stabilizing diode set (VD1, VD2), a rectifier diode (D6), a third voltage-stabilizing diode (VD3), a sixth capacitor (C6) and a seventh capacitor (C7), the step-down resistor (R4) is connected between the power side live wire terminal L and one pole of the alternating current input end of the rectifier bridge (IC3) in series, the fourth capacitor (C4) is connected to both ends of the step-down resistor (R4) in parallel, the positive pole of the direct current output end of the rectifier bridge (IC3) is used as the positive pole node (A1) of the direct current output end of the buck regulator rectifier circuit (A) and is connected with the detection signal output end of the outage detection circuit (B), the negative pole of the first voltage-stabilizing diode (VD1) of the voltage-stabilizing diode set (VD1, VD2), the positive pole of the sixth capacitor (C6) and the positive pole node (A1) are connected in parallel, the positive pole of the first voltage-stabilizing diode (VD1) is connected with the negative pole of the second voltage-stabilizing diode (VD2), the positive pole of the second voltage-stabilizing diode (VD2) is used as the voltage regulating node (A2) of the direct current output end of the buck regulator rectifier circuit (A) and is connected with the energy storage positive pole of the electric energy input end of the tank circuit (D), the positive pole of the rectifier diode (D6) is connected with the voltage regulating node (A2), the negative pole of the rectifier diode (D6), the negative pole of the third voltage-stabilizing diode (VD3) and the positive pole of the seventh capacitor (C7) are connected in parallel and used as the voltage-stabilizing node (A3) of the direct current output end of the buck regulator rectifier circuit (A), the voltage-stabilizing node (A3) is connected with the positive pole of the power supply of the electric energy input end of the tank circuit (D) or the power input end of the timing control circuit (C), the negative pole of the sixth capacitor (C6), the negative pole of the seventh capacitor (C7) and the positive pole of the third voltage-stabilizing diode (VD3) are connected with the earth pole of the direct current output end of the rectifier bridge (IC3) in parallel, and the earth pole of the direct current output end of the rectifier bridge (IC3) is used as the earth pole of the direct current output end of the buck regulator rectifier circuit (A).
The time relay according to claim 1, wherein the outage detection circuit (B) comprises a photoelectric coupler (IC1), a first resistor (R1), a second resistor (R2), a second capacitor (C2) and a first light emitting diode (D1), one end of the first resistor (R1) is used as the detection signal input end of the outage detection circuit (B) and is connected with the positive pole node (A1) of the direct current output end of the buck regulator rectifier circuit (A), the other end of the first resistor (R1) is connected with the positive pole of the input end of the photoelectric coupler (IC1), the negative pole of the input end of the photoelectric coupler (IC1) is connected with the positive pole of the first light emitting diode (D1), the positive pole of the output end of the photoelectric coupler (IC1) is connected with the electric energy output end of the tank circuit (D), the negative pole of the output end of the photoelectric coupler (IC1) is used as the detection signal output end of the outage detection circuit (B) and is connected with one end of the second resistor (R2) and one end of the second capacitor (C2) in parallel, and the other end of the second resistor (R2), the other end of the second capacitor (C2) and the negative pole of the first light emitting diode (D1) are connected with the earth pole of the direct current output end of the buck regulator rectifier circuit (A) in parallel.
The time relay according to claim 1, wherein the timing control circuit (C) comprises a time delay control chip (IC2), a ninth resistor (R9) and a second light emitting diode (D2), the first pin (VDD) of the time delay control chip (IC2) is used as the power input end of the time delay control circuit (C) and is connected with the electric energy output end of the tank circuit (D), the fifth pin (RC5) of the time delay control chip (IC2) is used as the processing signal input end of the timing control circuit (C) and is connected with the detection signal output end of the outage detection circuit (B), the sixth pin (RC4) of the time delay control chip (IC2) is used as the control signal output end of the timing control circuit (C) and is connected with the control signal input end of the relay output circuit (E), the ninth pin (RC1) of the time delay control chip (IC2) is connected with one end of the ninth resistor (R9), the other end of the ninth resistor (R9) is connected with the positive pole of the second light emitting diode (D2), the negative pole of the second light emitting diode (D2) and the fourteen pin (VSS) of the time delay control chip (IC2) are connected with the earth pole of the direct current output end of the buck regulator rectifier circuit (A) in parallel.
The time relay according to claim 1, wherein the tank circuit (D) comprises a third resistor (R3), a third diode (D3), a forth diode (D4), a fifth diode (D5) and a super-capacitor (C5), one end of the third resistor (R3) is used as the energy storage positive pole of the electric energy input end of the tank circuit (D) and is connected with the voltage regulating node (A2) of the direct current output end of the buck regulator rectifier circuit (A), one end of the third resistor (R3) is connected with the positive pole of the forth diode (D4), the negative pole of the forth diode (D4) is connected with the positive pole of the super-capacitor (C5) and the positive pole of the fifth diode (D5) in parallel, the positive pole of the third diode (D3) is used as the power positive pole of the electric energy input end of the tank circuit (D) and is connected with the voltage-stabilizing node (A3) of the direct current output end of the buck regulator rectifier circuit (A), the negative pole of the super-capacitor (C5) is connected with the earth pole of the direct current output end of the buck regulator rectifier circuit (A), the negative pole of the fifth diode (D5) is connected with the negative pole of the third diode (D3) to form an electric energy output end of the tank circuit (D), and the electric energy output end and the positive pole of the output end of the outage detection circuit (B) are connected with the power input end of the timing control circuit (C) in parallel.
The time relay according to claim 1, wherein the relay output circuit (E) comprises a fifth resistor (R5), a sixth resistor (R6), a seventh resistor (R7), an eighth resistor (R8), a first triode (Q1), a second triode (Q2) and a seventh diode (D7), the emitter of the first triode (Q1) is connected with one end of the fifth resistor (R5) and the positive pole node (A1) of the direct current output end of the buck regulator rectifier circuit (A) in parallel, the other end of fifth resistor (R5) is connected with the base of the first triode (Q1) and one end of the sixth resistor (R6) in parallel, the collector of the first triode (Q1) is connected with the negative pole of the seventh diode (D7) and one end of the input loop of the relay in parallel, the other end of the relay input loop is connected with the positive pole of the seventh diode (D7) and the voltage-stabilizing node (A3) of the direct current output end of the buck regulator rectifier circuit (A) in parallel, the other end of the sixth resistor (R6) is connected with the collector of the second triode (Q2), the emitter of the second triode (Q2) is connected with one end of the seventh resistor (R7) and the earth pole of the direct current output end of the buck regulator rectifier circuit (A) in parallel, the other end of the seventh resistor (R7) is connected with the base of the second triode (Q2) and one end of the eighth resistor (R8) in parallel, and the other end of the eighth resistor (R8) is used as the control signal input end of the relay output circuit (E) and is connected with the control signal output end of the timing control circuit (C).
The time relay according to claim 1, wherein the relay is an electromagnetic relay.
The time relay according to claim 4, wherein the timing control circuit (C) further comprises a time setting circuit, the time setting circuit comprises a tenth resistor (R10), a potentiometer (R11), an eighth diode (D8) and an eighth capacitor (C8), one end of the tenth resistor (R10) is connected with the tenth pin (RC0) of the time delay control chip (IC2), the other end of the tenth resistor (R10) is connected with the positive pole of the eighth diode (D8), the sliding end of the potentiometer (R11) and one end of the eighth capacitor (C8) in parallel, the negative pole of the eighth diode (D8) is connected with one fixed end of the potentiometer (R11) and the first pin (VDD) of the time delay control chip (IC2) in parallel, and one end of the eighth capacitor (C8) is connected with the other fixed end of the potentiometer (R11) and the earth pole of the direct current output end of the buck regulator rectifier circuit (A) in parallel.
The time relay according to claim 4, wherein the timing control circuit (C) further comprises a clock source circuit formed by a crystal oscillator (Y1), a first capacitor (C1) and a third capacitor (C3), the second pin (OSC1) of the time delay control chip (IC2) is connected with one end of the crystal oscillator (Y1) and one end of the first capacitor (C1) in parallel, the third pin (OSC2) of the time delay control chip (IC2) is connected with the other end of the crystal oscillator (Y1) and one end of the third capacitor (C3) in parallel, and the other end of the first capacitor (C1), the other end of the third capacitor (C3) are connected with the earth pole of the direct current output end of the buck regulator rectifier circuit (A) in parallel.
Method for using a time relay suitable to be used for the metal halide lamp and similar loads according to anyone of claims 1 to 9, wherein:
at a normal state that the voltage is loaded at the direct current output end, the method comprises the steps of: maintaining a high level of a detection signal output end of the outage detection circuit (B); maintaining a high level of a control signal output end of the timing control circuit (C); closing the relay output circuit (E) on an input loop of the relay under the control of the high level; and keeping the output contact (K1) closed under the drive control of the loading voltage of the direct current output end, wherein the tank circuit (D) is in a energy storage state;

at the instant that the voltage is unloaded at the direct current output end, the method comprises the steps of: converting the detection signal output end of the outage detection circuit B into the low level, wherein the timing control circuit (C) is configured to enter the long time delay timekeeping process under the control of the low level and the control signal output end is converted into the low level and wherein the relay output circuit (E) enables the input loop of the relay to cut off under the control of the low level; at the same time, converting to be disconnected the output contact (K1) of the relay under the control that the voltage is unloaded at the direct current output end and converting the tank circuit (D) into the electricity supply state; and

at the instant that the voltage is loaded at the direct current output end, the method comprises the steps of: converting the detection signal output end of the outage detection circuit (B) into the high level, wherein the timing control circuit (C) is configured to automatically detect whether the previous long time delay timekeeping process comes to an end under the control of the high level: if the long time delay timekeeping process does not come to an end, continuing to keep the low level of the control signal output end; if the long time delay timekeeping process comes to an end, converting the control signal output end into the high level, and closing on the input loop of the relay under the drive control of the high level and the loaded voltage, converting to be closed the output contact (K1) of the relay, and returning the tank circuit (D) to the energy storage state.