EP2963793A1 - SMPC, Steuerung dafür, Netzteil und Verfahren zur Steuerung des SMPC - Google Patents

SMPC, Steuerung dafür, Netzteil und Verfahren zur Steuerung des SMPC Download PDF

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Publication number
EP2963793A1
EP2963793A1 EP14175764.1A EP14175764A EP2963793A1 EP 2963793 A1 EP2963793 A1 EP 2963793A1 EP 14175764 A EP14175764 A EP 14175764A EP 2963793 A1 EP2963793 A1 EP 2963793A1
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EP
European Patent Office
Prior art keywords
peak current
leading edge
run
away
edge blanking
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP14175764.1A
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English (en)
French (fr)
Inventor
Johannes Scholten
Bobby Jacob Daniel
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NXP BV
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NXP BV
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Filing date
Publication date
Application filed by NXP BV filed Critical NXP BV
Priority to EP14175764.1A priority Critical patent/EP2963793A1/de
Publication of EP2963793A1 publication Critical patent/EP2963793A1/de
Withdrawn legal-status Critical Current

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/32—Means for protecting converters other than automatic disconnection
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33507—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0003—Details of control, feedback or regulation circuits
    • H02M1/0038—Circuits or arrangements for suppressing, e.g. by masking incorrect turn-on or turn-off signals, e.g. due to current spikes in current mode control

Definitions

  • This invention relates to switch mode power converters (SMPCs) to controllers therefor, to power supplies using such converters, and to methods of controlling such converters.
  • SMPCs switch mode power converters
  • SMPCs A wide variety of different types of SMPCs are known, and a similarly wide variety of modes of operation of such SMPCs is also known.
  • One mode of operation which is commonly used, for example with flyback converters, due in part to its relative simplicity, is fixed frequency operation with peak current control.
  • a non-limiting example of a switched mode power converter to which the present disclosure relates is a flyback converter.
  • a generic flyback converter 100 is shown in figure 1 .
  • the converter 100 comprises a power switch 110 in series with the primary winding 122 of a transformer 120 having a N:1 turns ratio.
  • the primary winding 122 of the transformer is connected to an input voltage Vin, and the switch is grounded via a sense resistor 130 Rsense.
  • the secondary winding 124 on the output side of the transformer 120 is connected to a smoothing capacitor 150 Cout, via a blocking diode 160.
  • the output appears across the smoothing capacitor 150.
  • the flyback converter includes a controller 170, which in this instance may provide fixed frequency with peak current control, the level being provided by a control input 180.
  • Figure 2 shows such a flyback converter in more detail, in particular with the controller elements being explicitly shown.
  • this figure shows a parasitic inductance Lleak 212 and capacitance Cdrain 214 of the power switch 110.
  • the switch is driven by the drive level 222 from a switch driver 220, the on/off status of which is determined by the output (Q) of a set-reset flip-flop through 230.
  • the set (S) input to the flip-flop is provided by the output from an oscillator 235.
  • the reset (R) input to the flip-flop 230 is provided from a comparator 240 which compares the voltage across the sense resistor Rsense 130 with the control input 180.
  • circuitry is included, depicted generically as a zener diode, to the control input 180 in order to provide an overcurrent protection (V OCP ).
  • Overcurrent protection may be provided, for instance as shown by limiting the voltage on the control input to a value V OCP , as a result of which the current through the primary winding is limited to V OCP x Rsense.
  • the input to the comparator 240 from the sense resistor 130 may be disabled during the start of an on-period by a switch 250 under the control of a leading-edge blanking (LEB) circuit 260.
  • LEB leading-edge blanking
  • Power for the controller is provided by the circuit shown at 295: an auxiliary winding on the primary side which is used to charge an auxiliary capacitor 270 (Caux) through a diode (Daux) 280; the voltage 275 across the capacitor is supplied to the supply input of the flyback.
  • An SMPS controller often has an overvoltage protection (not shown) on its own supply voltage pin: if the transformer saturates, its inductance decreases and as a result the primary current increases even more.
  • Lleak and Cdrain start to oscillate. If the primary current increases, the amplitude of this oscillation, also referred to as ringing, also increases.
  • the ringing also appears on the auxiliary winding and is rectified by Daux. If the voltage on 275 becomes too high it can damage the controller or trigger its overvoltage protection.
  • Peak current runaway may also occur during a start-up phase, when the output capacitor (Cout) 150 is not charged and thus the controller sees a low output voltage, similar to a short-circuit.
  • Peak current runaway may be accommodated by using ruggedised components; however this results in significant additional expense for the converter.
  • Provision of an overcurrent protection circuit such as is widely used to switch off the driver after a maximum peak current level has been reached may be effective to limit peak current under conditions with low enough input voltage, to prevent transformer saturation. But at high input voltage and/or shorted output it may not be possible thereby to avoid the peak current runaway effect.
  • Some protection may be offered by switching the converter off in the event that it has been running with minimum on time for a certain number of cycles; however, such a solution would need to be disabled during start-up and therefore may be complex and not ideal.
  • a controller configured to operate a switched mode converter, the switched mode converter comprising a power switch operable with a fixed normal switching frequency; the controller comprising a peak current control circuit configured to switch the power switch in dependence on a peak current in a primary side of the switched mode converter; an oscillator configured to derive the fixed normal switching frequency, a peak current run-away detector configured to detect an on-set of a run-away of the peak current, and a frequency adjustor coupled to the oscillator and configured to instruct the oscillator to temporarily reduce the switching frequency in response to detection of on-set of a run-away of the peak current.
  • the fixed normal switching frequency may be derived from the oscillator in a variety of ways; non-limiting examples are as follow: the oscillator may, under normal conditions, oscillate directly with the fixed normal switching frequency; alternatively, the oscillator may oscillate under normal conditions with a higher frequency, the oscillator output being frequency-divided to produce the fixed normal switching frequency; alternatively, the oscillator may oscillate with a lower frequency, the oscillator output being frequency-doubled to produce the fixed normal switching frequency.
  • the fixed normal switching frequency is related to, or derived from, the normal frequency of oscillation of the oscillator.
  • the controller may, by means of only a few additional components, detect the potential on-set of peak-current runaway, and modify the operation of the converter to prevent such run-away from saturating the transformer coil.
  • the controller temporarily reduces the operating frequency of the power switch, after which the frequency returns to the normal operating frequency: full frequency control, such as is associated with relatively complex, and thus expensive, controllers, thus may not be required.
  • the peak current run-away detector comprises: an on-time minimum detector, configured to detect that the on-time of the power switch does not exceed a threshold on-time; and a high power demand detector, configured to detect a power demand which exceeds a threshold power.
  • the controller comprises a leading edge blanking circuit for providing a leading edge blanking period and configured to prevent the power-switch from opening, in operation, before a minimum on-time has elapsed, and a leading edge blanking stretcher circuit, wherein the on-time minimum detector is configured to detect an on/off status of the power switch at the end of a stretched leading edge blanking period.
  • the controller comprises a leading edge blanking circuit for providing a leading edge blanking period and configured to prevent the power-switch from opening, in operation, before a minimum on-time has elapsed, and a leading edge blanking stretcher circuit, wherein the on-time minimum detector is configured to detect an opening of the power switch during a stretched leading edge blanking period.
  • the frequency adjustor is configured to reduce the switching frequency by a predetermined amount for a single switching cycle.
  • One or more embodiments may further comprise a counter, wherein the frequency adjustor is configured to reduce the frequency by skipping a number of switching cycles determined by a status of the counter.
  • a counter may be configured to increment by one in response to the peak current run-away detector detecting an on-set of a run-away of the peak current, on a switching cycle immediately following the skipped switching cycles.
  • a counter may be configured to decrement by one in response to the peak current run-away detector detecting an absence of an on-set of a run-away of the peak current on the switching cycle immediately following the skipped switching cycles.
  • a switched mode converter comprising a controller as described above, a power switch and a transformer.
  • the switched mode converter may be a flyback converter. Flyback converters are generally inexpensive relative to other types of converter, and are relatively simple to operate.
  • a power supply comprising such a switched mode converter.
  • a method of controlling a switched mode converter comprising a power switch operable with a fixed normal switching frequency; the method comprising switching the power switch in dependence on a peak current in a primary side of the switched mode converter, operating an oscillator to derive the fixed normal switching frequency, detecting an on-set of a run-away of the peak current, and instructing the oscillator to temporarily reduce the switching frequency in response to detection of on-set of a run-away of the peak current.
  • One or more embodiments comprise detecting an on-set of a run-away of the peak current comprises: detecting that the on-time of the power switch does not exceed a threshold on-time; and detecting a power demand which exceeds a threshold power.
  • the controller comprises a leading edge blanking circuit for providing a leading edge blanking period and configured to prevent the power-switch from opening, in operation, before a minimum on-time has elapsed.
  • the method may further comprise determining a stretched leading edge blanking period, and detecting an on/off status of the power switch at the end of the stretched leading edge blanking period.
  • the method may comprise determining a stretched leading edge blanking period, and detecting an opening of the power switch during the stretched leading edge blanking period.
  • switch-off delay - after switching off the driver signal it still takes some time to switch off the switch (which is typically a MOSFET or bipolar transistor).
  • propagation delay - sense signals take time to propagate, so there will always be some delay between detecting that the peak current has passed the target level and actually switching off the driver signal.
  • the peak current sense signal is intentionally blanked to prevent false triggering on the discharge spike caused by parasitic capacitances (discharge of drain-source capacitance, capacitance of the primary transformer winding, and any deliberately added capacitance, which are, in combination, represented by Cdrain 214 in figure 2 ).
  • a controller configured to operate a switched mode converter, the switched mode converter comprising a power switch operable with a fixed normal switching frequency; the controller comprising a peak current control circuit configured to switch the power switch in dependence on a peak current in a primary side of the switched mode converter; an oscillator configured to derive the fixed normal switching frequency, a peak current run-away detector configured to detect an on-set of a run-away of the peak current, and a frequency adjustor coupled to the oscillator and configured to instruct the oscillator to temporarily reduce the switching frequency in response to detection of on-set of a run-away of the peak current.
  • Such a controller is shown in Figure 4 , which shows a switched mode converter as described above, but in this instance the controller 470 has a controllable oscillator 440, which is controllable by means of a control signal 442.
  • the converter is a flyback converter.
  • the controller includes a peak current runaway detector 410, and a frequency adjuster 450.
  • the peak current run-away detector 410 comprises an on-time minimum detector configured to detect that the on-time of the power switch does not exceed a threshold on-time, and a high power demand detector configured to detect a power demand exceeding a threshold power.
  • the threshold on-time may typically be the minimum possible on-time allowed by the converter - limited by propagation and switching delays and LEB, as discussed above; alternatively, the threshold may be set to be just above this minimum possible time - to account for process variation and similar variable factors.
  • the high power demand detector may be implemented, as shown in figure 4 , by comparing the control input voltage180 with a reference voltage Vref in a comparator 430: if the control input voltage 180 is greater than the reference voltage, then there is a high power demand, and the output of comparator 430 is positive.
  • the converter is switching at minimum on-time if the driver switches off within a certain (short) time interval after the end of the leading edge blanking (LEB) time. So, by stretching the LEB pulse by means of a leading-edge blanking stretcher 462 as shown in figure 4 , and by detecting if the driver is already low at the down going slope of the stretched LEB pulse, it may be determined whether the converter is switching at its minimum on-time.
  • LEB leading edge blanking
  • the latch 450 operates as the frequency adjustor, by sending a control signal 462 to the oscillator in the event that the drive level 222 is low at the trigger moment.
  • the trigger moment is defined by the falling edge of the output of an "AND" logic gate 420 combining the high power demand signal and the stretched LEB signal. That is to say, the latch 450 clocks only on a negative slope of the clock input. Thus, if a high power demand is not detected by the comparator 430, there is no falling edge to the output of the AND gate 420, the latch 450 is not triggered, and no control signal 442 is supplied to the oscillator 440.
  • the on-time minimum detector may be implemented in other ways: as an example of another, non-limiting, embodiment it may be implemented by detecting a negative driver slope during the stretched LEB pulse.
  • Figure 5 shows signal waveforms corresponding to the controller configuration shown in figure 4 . From the top, the figure shows the signal 510 for the driver for the power switch, signal 520 for the leading edge blanking output; the signal 530 for the stretched leading edge blanking signal; and the run-away detected signal 540.
  • the power switch driver signal 510 is high for a period which is longer than not only the leading-edge blanking signal 520 but also the stretched leading-edge blanking signal 530. This corresponds to normal operation, and no peak current runaway is detected.
  • the switch driver signal 510 falls very shortly after the end of the LEB pulse 520, and before the end of the stretched LEB pulse 530.
  • the circuit detects that peak current runaway has commenced and so the peak current runaway detected signal 540 goes high.
  • the driver signal 510 is still high after the end of the stretched LEB signal 530, from which the detector circuit detects that there is no longer a peak current runaway situation, and the runaway detected signal 540 returns low.
  • Adjustment of the frequency may be implemented in various ways. For example in some embodiments it may be implemented using a circuit which limits the maximum switching frequency to a value at which no peak current run-away can occur: after detecting the first run-away event, the frequency may be reduced to a level at which no run-away can occur, for instance to 25% of the normal operating frequency.
  • oscillator 440 may comprise a voltage controlled oscillator and the oscillator control signal may be the voltage control signal. By suitably arranging that signal, it may be arranged that, in response to detection of on-set of a run-away of the peak current, the signal may control the oscillator to run at 25% of its normal frequency.
  • the drive frequency for the power switch will be reduced to 25% of its normal operating frequency.
  • the oscillator may include a switched frequency divider and in response to detection of onset of a runaway of the peak current, the frequency divider may be switched into the circuit, such that the oscillator continues to oscillate at its normal frequency, but the output signal from the oscillator supplied to the driver is frequency divided, in this instance by a factor of four.
  • the frequency is set back to its nominal value. The result is that during start-up and shorted output the frequency keeps hopping between two frequencies.
  • the frequency adjuster may reduce the switching frequency by leaving the oscillator oscillation frequency undisturbed but simply skipping (or blanking) the next driver pulse each time run-away is detected. This effectively reduces the switching frequency by 50%.
  • FIG. 1 may depict an up/down counter: if the peak current runaway detection circuit determines that the converter still switches at the minimum on-time for the cycle immediately subsequent to skipping one cycle, the counter may be incremented such that the next two cycles are skipped. Of course this can be extended to skipping even more cycles, by incrementing the counter whenever it is discovered that the converter is still switching at the minimum on-time immediately after some cycles are skipped. Conversely, in the event that, for the cycle immediately following skipped cycles, the converter switches with an on-time which is greater than the minimum on-time - that is to say, peak current runaway is not occurring - the counter may be arranged to decrement by one, or in other embodiments the counter may immediately be reset to zero.
  • the counter may be arranged to decrement by one, or in other embodiments the counter may immediately be reset to zero.
  • Figure 6 shows the primary current 610 (solid thick line) and secondary current 630 (thin line) for methods according to an aspect of the present disclosure.
  • the figure shows a switching cycling 621 for which the on-time is a minimum, and the peak current 641 at the end of the on-time is greater than the overcurrent protection level 650.
  • the controller detects the onset of a possible peak current run-away, and as a result the controller temporarily reduces the switching frequency, in this case to 25% of its normal value. There is thus a longer gap 622 before the next switching cycle. As described above, this longer gap may be achieved in various ways, such as running the oscillator slower, or skipping cycles (in this case 3 cycles are skipped).
  • the next subsequent cycle 623 has an on-time which is longer than the minimum on-time, so the controller deems it to be regular or normal operation. Thus the controller sets the normal fixed switching frequency. Due to the low output voltage the secondary current does not fall significantly during the secondary stroke, or off-period, of this normal-frequency switching cycle 624. As a result, the controller detects that the on-time 625 of the next cycle is the minimum on-time, and once again implements the temporary reduction in switching frequency for the next cycle 626.
  • one or more embodiments according to the present disclosure may be effective at preventing or reducing saturation of the transformer core at both start-up-when the output capacitor Cout may not be charged and thus the output voltage is low - and on the occurrence of a shorted output.
  • Switched mode converters and in particular flyback converters, operating with peak current control at fixed frequency are commonly found in applications with output powers ranging from less than 5 W to greater than 250 W. Due to the relative simplicity of design, flyback converters are most frequently used in low-power applications - that is to say for applications with output powers from less than 5 W to around 75 W. Without limitation, methods and controllers as described herein may be used to effect in such flyback converters.
  • a controller configured to operate a flyback converter and comprising a peak current control circuit; an oscillator; a peak current run-away detector; and a frequency adjustor, each as described in one or more embodiments mentioned above.
  • the controller is configured to operate one of a buck converter, a boost converter, and a boost-buck converter.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)
EP14175764.1A 2014-07-04 2014-07-04 SMPC, Steuerung dafür, Netzteil und Verfahren zur Steuerung des SMPC Withdrawn EP2963793A1 (de)

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EP14175764.1A EP2963793A1 (de) 2014-07-04 2014-07-04 SMPC, Steuerung dafür, Netzteil und Verfahren zur Steuerung des SMPC

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EP14175764.1A EP2963793A1 (de) 2014-07-04 2014-07-04 SMPC, Steuerung dafür, Netzteil und Verfahren zur Steuerung des SMPC

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3301801A1 (de) * 2016-08-09 2018-04-04 NXP USA, Inc. Schaltleistungswandler
IT201700022236A1 (it) * 2017-02-28 2018-08-28 St Microelectronics Srl Circuito di controllo, alimentatore, apparecchiatura e procedimento corrispondenti

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070008756A1 (en) * 2005-07-08 2007-01-11 Djenguerian Alex B Method and apparatus to limit maximum switch current in a switching power supply
US20070008753A1 (en) * 2005-07-08 2007-01-11 Kroes Derek J Method and apparatus to limit maximum switch current in a switch of a switching power supply
US20100008106A1 (en) * 2008-07-09 2010-01-14 Panasonic Corporation Switching control circuit, semiconductor device and switching power source apparatus

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070008756A1 (en) * 2005-07-08 2007-01-11 Djenguerian Alex B Method and apparatus to limit maximum switch current in a switching power supply
US20070008753A1 (en) * 2005-07-08 2007-01-11 Kroes Derek J Method and apparatus to limit maximum switch current in a switch of a switching power supply
US20100008106A1 (en) * 2008-07-09 2010-01-14 Panasonic Corporation Switching control circuit, semiconductor device and switching power source apparatus

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3301801A1 (de) * 2016-08-09 2018-04-04 NXP USA, Inc. Schaltleistungswandler
US10050526B2 (en) 2016-08-09 2018-08-14 Nxp Usa, Inc. Switching power converter
IT201700022236A1 (it) * 2017-02-28 2018-08-28 St Microelectronics Srl Circuito di controllo, alimentatore, apparecchiatura e procedimento corrispondenti

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