EP2880588A1 - Systeme de detection de modification d'une pile d'appel de sous-programme - Google Patents
Systeme de detection de modification d'une pile d'appel de sous-programmeInfo
- Publication number
- EP2880588A1 EP2880588A1 EP13756638.6A EP13756638A EP2880588A1 EP 2880588 A1 EP2880588 A1 EP 2880588A1 EP 13756638 A EP13756638 A EP 13756638A EP 2880588 A1 EP2880588 A1 EP 2880588A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- stack
- address
- subroutine
- memory location
- call
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000004048 modification Effects 0.000 title claims abstract description 14
- 238000012986 modification Methods 0.000 title claims abstract description 14
- 238000000034 method Methods 0.000 claims abstract description 8
- 238000001514 detection method Methods 0.000 claims description 6
- 230000008859 change Effects 0.000 claims description 3
- 230000006870 function Effects 0.000 description 38
- 239000011800 void material Substances 0.000 description 12
- 238000012795 verification Methods 0.000 description 3
- 238000009825 accumulation Methods 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000000146 jump and return pulse sequence Methods 0.000 description 1
- 238000010329 laser etching Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 238000005192 partition Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 238000000638 solvent extraction Methods 0.000 description 1
- 230000009897 systematic effect Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/50—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems
- G06F21/52—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems during program execution, e.g. stack integrity ; Preventing unwanted data erasure; Buffer overflow
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/70—Software maintenance or management
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/36—Preventing errors by testing or debugging software
- G06F11/3668—Software testing
- G06F11/3672—Test management
- G06F11/3688—Test management for test execution, e.g. scheduling of test suites
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/56—External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/25—Using a specific main memory architecture
- G06F2212/251—Local memory within processor subsystem
Definitions
- the invention relates to the detection of untimely modifications of the contents of a routine call stack in a processor system, in particular for detecting fraud attempts.
- a subroutine call stack is a reserved area in the memory of a processor system, used to store the "return" address, an address at which a program must continue to run at the end of the program. execution of a subroutine.
- the imaged "stack” reflects a "last-in-first-out” (LIFO) management mode of the memory area, which is particularly well-suited for handling subprogram nesting.
- LIFO last-in-first-out
- An inadvertent modification of the call stack may cause, when the routine ends, the jump of the program execution to an arbitrary location, identified by the changed value of the stack.
- the change may be due to an attempted fraud, where the fraudster seeks to divert the execution to a piece of malicious code or to bypass security checks.
- a modification of the stack can be made by laser etching, directing a pulsed laser beam on the memory zone of the stack, or on the data bus at the moment when the data of the stack is read. It is also possible to disturb the value conveyed by the bus by generating pulses on the supply voltage at the time of this reading.
- FIG. 1 illustrates the execution of this pseudo-code.
- the contents of the call stack are shown above each block illustrating the execution of a subroutine, or function. It is assumed that the stack fills from below in this representation.
- the main () function calls a funcl () function; the return address @ 1 is then placed on the stack, while the funcl () function is executed.
- the funcl () function calls a function func2 (); the corresponding return address @ 2 is placed on the stack.
- the function func2 () calls a function func3 (); a new return address @ 3 is placed on the stack.
- the completion of the function func3 () is identified by the execution of the dedicated statement "return". This instruction causes the removal of address @ 3 from the stack, and the continuation of the execution from this address, in this case the continuation of the execution of function func2 ().
- the function func2 () then calls a function VerifyPIN (), whose role is, for example, to verify the entry of a secret code.
- the corresponding return address @ 4 is placed on the stack.
- the VerifyPIN () function completes, the @ 4 address is removed from the stack and execution continues from that address, in this case in function func2 ().
- patent US7581089 proposes to use two redundant call stacks. Each return address is placed on both stacks during subroutine calls. At the end of the execution of a subroutine, it is verified that the same return address is in both stacks. Although a fraudster can manage to modify the addresses contained in the two stacks, the chances of success of such modifications remain rather uncertain: it is particularly difficult to modify the two stacks simultaneously in the same way.
- a method for detecting modification of a subroutine call stack comprising the steps of, upon a call of a routine, setting a return address to top of the pile; at the end of the routine, use the address at the top of the stack as the return address, and remove the address of the battery; when calling the routine, accumulate the return address in a memory location according to a first operation; at the end of the subroutine, accumulate the address of the top of the stack in the memory location according to a second operation, reciprocal of the first; and detect a change when the contents of the memory location differ from its initial value.
- the first and second operations are the exclusive-OR operation bit by bit.
- the first and second operations are addition and subtraction.
- the return address and the address of the top of the stack are values taken from a memory bus during access phases to the stack.
- the initial value is random.
- a modification detection device of a subroutine call stack comprising, associated with a processor, a memory location storing an initial value, accessible for reading and writing by program instructions; an operator configured to replace the value of the memory location with the result of an operation between the contents of the memory location and a current value exchanged with the call stack; and a detection circuit configured to identify the instruction being executed and, if the identified instruction is a subroutine call, commanding the operator to perform a first type of operation, and if the instruction identified is a subroutine return, command the operator to perform a second type of operation, reciprocal of the first type.
- FIG. 1, previously described, represents an execution of an exemplary pseudo-code, illustrating the evolution of the contents of the call stack
- FIG. 3 represents an embodiment of a device for detecting changes in the call stack.
- stacking and removal sequences have the same addresses.
- the order of the retrieval sequence is not necessarily the inverse order of the stacking sequence, as shown by the @ 3 and @ 4 addresses, since several subroutines can be called in the same function .
- a recursive operation performed at each write and read in the stack to accumulate the successive addresses in a dedicated memory location, preferably a register.
- the recursive operation is such that the second operation made on the same address cancels the effect of the first operation made on the address. This can be done using two reciprocal operations, one used at each writing, and the other used at each reading.
- the first operation is for example the addition, and the second the subtraction.
- the first operation could be multiplication, and the second division.
- the initial value REGo is preferably random, and regenerated at each call of the function to check. If it were fixed, the fraudster could be tempted to modify the contents of the register by laser attack, in order to restore it to its initial value at the moment when the return of the subroutine takes place.
- the REG register is made accessible by software, allowing the programmer to insert before the subroutine call to protect register initialization instructions and, after returning the subroutine, instructions to read the contents of the register and check whether it has changed.
- function func2 (so all functions nested under function func2 ()) in Figure 1
- pseudo-code in the definition of function funcl ():
- REG: REG 0 ;
- FIG. 3 schematically shows an embodiment of verification device associated with a processor.
- the processor comprises an arithmetic and logic unit ALU which is controlled by an instruction decoder 10.
- the decoder 10 receives instruction codes by an instruction acquisition unit 12.
- a memory interface 14 provides, from a central memory MEM, instruction codes to the unit 12.
- the current instruction to seek in the memory is identified by the address contained in a dedicated register PC called "program counter", address that the unit ALU communicates to the memory interface 14 by a bus B.
- the bus B is also used for the exchange of data between the ALU unit and the MEM memory.
- the subroutine call stack CS is materialized in a reserved area of the memory MEM.
- the data it stores are addresses pointing into an area of the MEM memory containing the instructions of the program to be executed.
- a subroutine call is made by executing a CALL statement in the ALU.
- the ALU calculates and puts on the stack the return address, usually the address of the instruction immediately after the call, defined for example by adding a fixed offset to the current value of the PC program counter.
- the CALL instruction conveys as a parameter the address of the first instruction of the subroutine; the ALU unit updates the PC program counter with this address.
- the return of a subroutine is made by executing a RET instruction.
- the ALU then removes the last address from the stack and updates the PC program counter with that address.
- the address put on the stack at the execution of the CALL instruction and the address removed from the stack at the execution of the RET instruction are present in turn on the data lines of the bus B , in writing for the first, and in reading for the second.
- the verification device, 16 comprises a REG register for accumulating these written addresses and read in the call stack. Accumulation is done using an OP operator, configured to preferably calculate an exclusive-OR bit-by-bit between the contents of the REG register and the value present on the bus B data lines.
- a detection circuit 18 is provided to identify whether the executing instruction is a subroutine call or return. It receives for this purpose the instruction code available in the instruction decoder 10. Whenever such an instruction is detected, the circuit 18 validates (EN) an accumulation in the register REG. If one chooses to use reciprocal operations other than exclusive-OR, the circuit 18 also selects the operation depending on whether the instruction is a call or a return.
- the contents of the REG register are accessible in writing and reading via the ALU, as the content of work registers typically provided in a processor.
- the REG register thus becomes accessible by program instructions.
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Security & Cryptography (AREA)
- Software Systems (AREA)
- General Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Quality & Reliability (AREA)
- Executing Machine-Instructions (AREA)
- Debugging And Monitoring (AREA)
Abstract
Description
Claims
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR1257635A FR2994290B1 (fr) | 2012-08-06 | 2012-08-06 | Systeme de detection de modification d'une pile d'appel de sous-programme |
PCT/FR2013/051854 WO2014023894A1 (fr) | 2012-08-06 | 2013-07-31 | Systeme de detection de modification d'une pile d'appel de sous-programme |
Publications (2)
Publication Number | Publication Date |
---|---|
EP2880588A1 true EP2880588A1 (fr) | 2015-06-10 |
EP2880588B1 EP2880588B1 (fr) | 2020-10-28 |
Family
ID=47594871
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP13756638.6A Active EP2880588B1 (fr) | 2012-08-06 | 2013-07-31 | Systeme de detection de modification d'une pile d'appel de sous-programme |
Country Status (5)
Country | Link |
---|---|
US (1) | US9268559B2 (fr) |
EP (1) | EP2880588B1 (fr) |
CN (1) | CN104520868B (fr) |
FR (1) | FR2994290B1 (fr) |
WO (1) | WO2014023894A1 (fr) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9767272B2 (en) | 2014-10-20 | 2017-09-19 | Intel Corporation | Attack Protection for valid gadget control transfers |
CN109446798A (zh) * | 2018-09-21 | 2019-03-08 | 中国科学院信息工程研究所 | 检测堆栈中返回地址被篡改历史的装置 |
CN109446797A (zh) * | 2018-09-21 | 2019-03-08 | 中国科学院信息工程研究所 | 检测堆栈中返回地址被篡改的装置 |
CN109508539A (zh) * | 2018-09-21 | 2019-03-22 | 中国科学院信息工程研究所 | 检测堆栈中返回地址被篡改的链式堆栈结构 |
CN109508538A (zh) * | 2018-09-21 | 2019-03-22 | 中国科学院信息工程研究所 | 一种检测堆栈中返回地址被篡改的堆栈结构 |
US11314855B2 (en) * | 2018-12-05 | 2022-04-26 | Webroot Inc. | Detecting stack pivots using stack artifact verification |
US11720471B2 (en) * | 2021-08-09 | 2023-08-08 | International Business Machines Corporation | Monitoring stack memory usage to optimize programs |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7752459B2 (en) * | 2001-12-06 | 2010-07-06 | Novell, Inc. | Pointguard: method and system for protecting programs against pointer corruption attacks |
US20040168078A1 (en) * | 2002-12-04 | 2004-08-26 | Brodley Carla E. | Apparatus, system and method for protecting function return address |
CN1447244A (zh) * | 2003-04-03 | 2003-10-08 | 杭州中天微系统有限公司 | 一种设计在cpu里的侦测缓冲区溢出的方法 |
US7546587B2 (en) * | 2004-03-01 | 2009-06-09 | Microsoft Corporation | Run-time call stack verification |
US7467272B2 (en) * | 2004-12-16 | 2008-12-16 | International Business Machines Corporation | Write protection of subroutine return addresses |
DE602005024514D1 (de) * | 2005-03-31 | 2010-12-16 | Texas Instruments Inc | Verfahren und System zum Vereiteln und Neutralisieren von Pufferüberläufangriffen |
JP5090661B2 (ja) * | 2006-04-12 | 2012-12-05 | 株式会社エヌ・ティ・ティ・ドコモ | ソフトウェア動作モデル化装置、ソフトウェア動作監視装置、ソフトウェア動作モデル化方法及びソフトウェア動作監視方法 |
US7581089B1 (en) * | 2006-04-20 | 2009-08-25 | The United States Of America As Represented By The Director Of The National Security Agency | Method of protecting a computer stack |
US8141163B2 (en) * | 2007-07-31 | 2012-03-20 | Vmware, Inc. | Malicious code detection |
CN101866406A (zh) * | 2010-06-18 | 2010-10-20 | 中国科学院软件研究所 | 一种栈溢出攻击防御方法 |
FR2977694A1 (fr) * | 2011-07-08 | 2013-01-11 | St Microelectronics Rousset | Microprocesseur protege contre un debordement de pile |
-
2012
- 2012-08-06 FR FR1257635A patent/FR2994290B1/fr not_active Expired - Fee Related
-
2013
- 2013-07-31 EP EP13756638.6A patent/EP2880588B1/fr active Active
- 2013-07-31 CN CN201380041553.5A patent/CN104520868B/zh active Active
- 2013-07-31 WO PCT/FR2013/051854 patent/WO2014023894A1/fr active Application Filing
- 2013-07-31 US US14/417,639 patent/US9268559B2/en active Active
Non-Patent Citations (1)
Title |
---|
See references of WO2014023894A1 * |
Also Published As
Publication number | Publication date |
---|---|
FR2994290B1 (fr) | 2018-04-06 |
US20150220328A1 (en) | 2015-08-06 |
CN104520868A (zh) | 2015-04-15 |
EP2880588B1 (fr) | 2020-10-28 |
WO2014023894A1 (fr) | 2014-02-13 |
US9268559B2 (en) | 2016-02-23 |
FR2994290A1 (fr) | 2014-02-07 |
CN104520868B (zh) | 2017-08-08 |
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