EP2788874A1 - Formatage différentiel entre une transmission de données normale et une retransmission de données - Google Patents
Formatage différentiel entre une transmission de données normale et une retransmission de donnéesInfo
- Publication number
- EP2788874A1 EP2788874A1 EP20120854899 EP12854899A EP2788874A1 EP 2788874 A1 EP2788874 A1 EP 2788874A1 EP 20120854899 EP20120854899 EP 20120854899 EP 12854899 A EP12854899 A EP 12854899A EP 2788874 A1 EP2788874 A1 EP 2788874A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- ephit
- crc
- information
- frame
- frames
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/12—Arrangements for detecting or preventing errors in the information received by using return channel
- H04L1/16—Arrangements for detecting or preventing errors in the information received by using return channel in which the return channel carries supervisory signals, e.g. repetition request signals
- H04L1/18—Automatic repetition systems, e.g. Van Duuren systems
- H04L1/1809—Selective-repeat protocols
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0061—Error detection codes
Definitions
- the disclosed invention pertains to computers and, more specifically, to protocols for data transmission between chips; in particular, protocols that use error detection and retransmission of data received erroneously.
- LLI Mobile Industry Processor Interface
- LLI Low Latency Interface
- the LLI interface protocol standard is designed to achieve low latency communication between chips.
- LLI comprises a data link layer (DL) and physical adaptation layer (PA).
- DL data link layer
- PA physical adaptation layer
- LLI provides DL lossless error transmission over a lossy physical communication channel.
- LLI ensures correct data transmission by using error detection and a scheme of the transmitter resending data when the receiver detects an error and signals a transmission error notification (NACK).
- NACK transmission error notification
- LLI transmitted atomic data units are small in order to improve latency, but this implies that the protection information is a significant throughput and power consumption overhead.
- An improved protocol can use longer atomic data units for data that is less latency-sensitive.
- multiple DL frames are losslessly compressed into an extended PHIT (ePHIT) if they comprise certain redundancy, such as they belong to the same channel, they are of the same type, or they have the same transaction ID field.
- single DL frames can be taken to which frame sequence number and cyclic redundancy check (CRCs) fields to form PHITs.
- groups of four DL frames can be compressed. Sequence numbers and CRC fields are appended to form ePHITs. Whether frames are combined and transmitted as ePHITs or transmitted as separate PHITs depends on the properties of the frames. When frames are combined into ePHITs, they carry the same DL data as four PHITs but with less overhead. That results in greater data throughput. In one embodiment the throughput improvement is 25%. Frame combining is the more common case with normal traffic patterns.
- the disclosed invention stores only PHITs in the retry buffer. This requires no change to prior art retry buffer design. Retry reliability is fully preserved. Furthermore, the use of the prior art CRC format for normal PHITs is backward compatible. This is achieved by using a prior art retry mechanism and retrying the transmission of the frames of errant ePHITs as PHITs. Furthermore, to reduce the number of bits required to provide sequence number and sufficient CRC protection, the sequence numbers of ePHITs are hashed with ePHIT CRCs, such as by using a simple exclusive or function (XOR), to form physical adaptation (PA) layer CRCs that are appended to the compressed DL frames.
- XOR simple exclusive or function
- PA physical adaptation
- FIG. 1 illustrates a transmitter for transmitting PHITs and ePHITs in accordance with the teachings of the present invention.
- FIG. 2 is a timeline illustrating a transmission and retry transmission of two ePHITs and one PHIT where an error is detected on the second ePHIT in accordance with the teachings of the present invention.
- FIG. 3 illustrates a receiver for receiving PHITs in accordance with the teachings of the present invention.
- FIG. 4 illustrates a receiver capable of receiving ePHITs in accordance with the teachings of the present invention.
- FIG. 5 illustrates the format of a PHIT in accordance with the teachings of the present invention.
- FIG. 6 illustrates the transformation of the PA CRC of an ePHIT into an ePHIT CRC in accordance with the teachings of the present invention.
- FIG. 1 One embodiment of a transmitter, according to an aspect of the present invention, is depicted in FIG. 1 .
- DL logic 120 indicates with signal 1 10, for each data frame, whether it is combinable.
- Frame data is transferred on bus 102 to mux 122 and retry buffer 124 where it is stored for some time.
- Mux 122 transfers data on bus 106 to PHIT/ePHIT formatter 126.
- Parallel signal 1 14 indicates whether each frame is to be combined with others into an ePHIT or else sent individually in a PHIT.
- mux 122 switches to select its frame input from the retry buffer 124 on bus 104.
- the retry buffer stores only information necessary for sending frames as PHITs. As a result, all frames read into mux 122 on input bus 104 are indicated as no combinable by signal 1 12.
- the timeline of a transmission and retry sequence is shown in FIG. 2.
- a sequence of 9 DL frames is sent.
- Frames 0-3 are formatted as an ePHIT to be decoded with an expected sequence number of 0 and transmitted.
- Frames 4-7 are formatted as an ePHIT to be decoded with an expected sequence number of 4 and transmitted.
- Frame 8 is formatted as a PHIT with sequence number field 8 and transmitted.
- the first ePHIT is received and decoded with no error detected.
- the second ePHIT incurs corruption and it fails the ePHIT CRC check in the receiver.
- the receiver signals NACK to the transmitter.
- the PHIT with sequence number 8 is received and discarded since its sequence number is greater than that of the expected sequence number that failed.
- the NACK signal is eventually received by the transmitter, at which time the transmitter starts its retry sequence. Every frame stored in the retry buffer is retransmitted as a non-combinable frame. As a result, each is formatted and sent as a unique PHIT. When the PHITs of retransmitted frames are received, those with a sequence number field less than 4 are discarded by the receiver, it having already received them correctly. Those with a sequence number greater than or equal to 4 are decoded and passed to the receiver data link module.
- the sequence number is used by the receiver to differentiate, in case retry data is received, between frames that were already successfully received and frames that were not. If an ePHIT would increase the sequence number by 1 , the protocol would not work because the numbering would differ between the retry and the original transmission.
- the invention increases sequence number for each ePHIT by the number of frames encoded in the ePHIT (four in this embodiment). Thereby, the sequence numbering is consistent.
- This invention is superior to one in which the formatter lets the retried frames to be combined into ePHITs in part because:
- FIG. 3 shows a receiver for PHITs 300.
- PHIT decoder 310 extracts DL frame data and sequence numbers from PHITs and forwards them to DL logic 350.
- the decoder outputs the CRC field, which is used by CRC logic 320 to determine whether to assert a NACK signal.
- FIG. 4 shows a receiver for ePHITs 400.
- ePHIT decoder 410 extracts DL frame data from ePHITs and forwards it to DL logic 350.
- ePHIT decoder 410 forwards the PA CRC to hash module 430.
- Sequence number generator 440 indicates the next expected sequence number to a gate 370 and then to DL logic 350 and hash module 430.
- Hash module 430 hashes the value of the next expected sequence number with the PA CRC using an XOR function to produce an ePHIT CRC.
- the ePHIT CRC is used by CRC module 320 to determine whether to assert a NACK signal.
- an ePHIT requires more CRC information than a PHIT to be sufficiently protected by error detection. This leaves too few bits in an ePHIT format to encode a sequence number.
- This is solved, according to an aspect of the invention, by applying a logical XOR function of the CRC and the sequence number. This allows the use of a PA layer CRC to format a frame into an ePHIT.
- In normal operation there is no disadvantage to using an XOR hash function of the sequence number with the CRC. The receiver knows the expected sequence number based on the sequence number of the previously correctly received PHIT or ePHIT.
- the receiver applies a corresponding XOR hash function with its expected sequence number to the PA layer CRC of the received PHIT before testing the resulting ePHIT CRC against the frame. If the CRC test is good, then the ePHIT is good. If this CRC test is bad, then the receiver can not know if it is the sequence number or the CRC that is erroneous. In either case the ePHIT is deemed erroneous, NACK is signaled, and retry is initiated.
- the transmitter may resend data that was already properly received, as depicted in FIG. 2.
- the receiver must drop any retried frames that were already correctly received. This means dropping any frames with a sequence number less than that of the expected sequence number for which an error was detected.
- the receiver does not know which DL frames will be resent. In the case depicted in FIG. 2 the DL frames from the ePHIT with expected sequence number 0 are resent, even though they were already properly received. To know which DL frames are resent, the receiver must be able to extract the sequence number directly, without relying on an expected sequence number. This means that resent frames must be resent as PHITs, not ePHITs. Because ePHITs have hashed sequence numbers, the actual sequence numbers can only be accurately extracted from PHITs.
- CRC is applied to a portion of each ePHIT that contains all of the redundant DL information, plus the unique information of the first frame. This allows minimum latency for the first frame of the ePHIT.
- the remainder of the ePHIT can have CRCs applied with a single code for each quantity of data comprising a single frame or portions of the ePHIT in regular size quantities can have CRCs applied.
- the various aspects of the present invention may be implemented in software, hardware, application logic, or a combination of software, hardware, and application logic.
- the software, application logic and/or hardware may reside on a server, an electronic device, or a service. If desired, part of the software, application logic and/or hardware may reside on an electronic device, part of the software, application logic and/or hardware may reside on a server.
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
Abstract
L'invention concerne un système et un procédé permettant la transmission de données avec correction d'erreurs au moyen un protocole de détection d'erreur et de retransmission. Des trames de données sont envoyées d'une puce d'émission à une puce de réception, soit formatées comme des PHIT, soit combinées, comprimées et formatées comme des ePHIT. Le formatage ePHIT comprend le hachage d'un ou de plusieurs CRC avec un numéro de séquence qui est produit dans le récepteur. Lorsqu'une erreur est détectée, une opération de retransmission permet de retransmettre les données dans un format différent de celui de la transmission initiale.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US201161630391P | 2011-12-08 | 2011-12-08 | |
PCT/US2012/068625 WO2013086456A1 (fr) | 2011-12-08 | 2012-12-07 | Formatage différentiel entre une transmission de données normale et une retransmission de données |
Publications (2)
Publication Number | Publication Date |
---|---|
EP2788874A1 true EP2788874A1 (fr) | 2014-10-15 |
EP2788874A4 EP2788874A4 (fr) | 2015-06-03 |
Family
ID=51494655
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP12854899.7A Withdrawn EP2788874A4 (fr) | 2011-12-08 | 2012-12-07 | Formatage différentiel entre une transmission de données normale et une retransmission de données |
Country Status (1)
Country | Link |
---|---|
EP (1) | EP2788874A4 (fr) |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8090857B2 (en) * | 2003-11-24 | 2012-01-03 | Qualcomm Atheros, Inc. | Medium access control layer that encapsulates data from a plurality of received data units into a plurality of independently transmittable blocks |
JP2008053854A (ja) * | 2006-08-22 | 2008-03-06 | Fujitsu Ltd | データの再送方法、通信装置、およびコンピュータプログラム |
US7864792B2 (en) * | 2007-04-20 | 2011-01-04 | Cray, Inc. | Load balancing for communications within a multiprocessor computer system |
KR20100021957A (ko) * | 2008-08-18 | 2010-02-26 | 삼성전자주식회사 | 무선통신시스템에서 자동 재전송 요청 피드백 메시지 생성 장치 및 방법 |
-
2012
- 2012-12-07 EP EP12854899.7A patent/EP2788874A4/fr not_active Withdrawn
Also Published As
Publication number | Publication date |
---|---|
EP2788874A4 (fr) | 2015-06-03 |
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