EP2596575A2

EP2596575A2 - Reversible universal bridge

Info

Publication number: EP2596575A2
Application number: EP11752613.7A
Authority: EP
Inventors: David Summerland
Original assignee: LED Lighting Consultants Ltd
Current assignee: LED Lighting Consultants Ltd
Priority date: 2010-07-20
Filing date: 2011-07-20
Publication date: 2013-05-29
Also published as: WO2012010900A3; WO2012010900A2; GB201012182D0

Abstract

A full bridge circuit is disclosed, which comprises a pair of AC terminals and a pair of DC terminals. The full bridge circuit is adapted in a first mode of operation to receive an AC voltage input at its AC terminals and provide a rectified voltage output at its DC terminals. In addition, the full bridge circuit is adapted in a second mode of operation either to receive a DC voltage input at its DC terminals and provide an AC voltage output at its AC terminals, or to receive a DC voltage input at its DC terminals and act as a bi-directional switch across the AC terminals.

Description

Title - Reversible Universal Bridge

This invention relates to full bridge circuits that can act in multiple modes allowing for low loss power controlled rectification from AC to DC, and either generating AC outputs from DC input, or acting as a bi-directional switch, all using the same bridge and control circuit.

A full wave bridge can be used as a rectifier circuit to convert an AC input voltage to a DC output voltage, usually using four diodes. In particular, a common circuit for achieving full-wave rectification of an AC input voltage is a diode bridge.

A disadvantage of a conventional diode bridge is that there is a forward voltage drop (V_f) of two diodes between the input and the output of the rectifier circuit. With conventional silicon diodes, this voltage drop is likely to be at least around 1 .5-3.0V. Even with more expensive Schottky diodes, the voltage drop is likely to be around 0.3-0.9V.

Rectifier circuits are commonly used in power supplies, and this voltage drop would result in a loss of power between the input and the output of the power supply. In particular, where a power supply is adapted to power a low voltage load, such as one or more LEDs, the voltage drop caused by a conventional diode bridge may result in a significant loss of efficiency.

Synchronous rectifier circuits address this problem by providing electronic switching devices that by-pass one or more of the diodes in the diode bridge with a low impedance path, when the current is flowing in the desired direction for producing a rectified output. Another form of circuit that addresses this problem is an active rectifier, in which the diodes are replaced by electronic switching devices, such as MOSFETs, and control circuitry activates the electronic switching devices to provide a rectified output. These conventional synchronous rectifier circuits and active rectifier circuits require the additional cost of control circuitry and yet carry out only one basic task, that being the rectification of AC to DC at reduced loss. There have now been devised improved circuits and power adaptors which overcome or substantially mitigate the above-mentioned and/or other

disadvantages associated with the prior art.

According to a first aspect of the invention, there is provided a full bridge circuit comprising a pair of AC terminals and a pair of DC terminals, the full bridge circuit being adapted in a first mode of operation to receive an AC voltage input at its AC terminals and provide a rectified voltage output at its DC terminals, and being adapted in a second mode of operation either:

(a) to receive a DC voltage input at its DC terminals and provide an AC voltage output at its AC terminals; or

(b) to receive a DC voltage input at its DC terminals and act as a bi directional switch across the AC terminals.

In presently preferred embodiments, the full bridge circuit is adapted in a second mode of operation to receive a DC voltage input at its DC terminals and provide an AC voltage output at its AC terminals, and in a third mode of operation to receive a DC voltage input at its DC terminals and act as a bi directional switch across the AC terminals The full bridge circuit preferably comprises a diode bridge in which the diodes are each adapted to be by-passed by a low-impedance path on activation of an associated electronic switching device, wherein the full bridge circuit is adapted to control activation of one or more electronic switching devices, such that the flow of current that would normally flow in one direction through the diode, can now flow in either direction, at low forward voltage drop, when the switch is on and in the same direction as the diode it bridges replaces when it is off. The full bridge circuit according to this aspect of the invention is advantageous as it can function either as a low loss rectifier or, by swapping the input for the output, as a full bridge driver or bi-directional power analogue switch. Furthermore, the full bridge circuit is advantageous because the arrangement of electronic switching devices provides rectification with a greater efficiency than a conventional diode bridge, and a capacitor may be provided across the first and second DC terminals, without the capacitor being discharged through any of the electronic switching devices of the full bridge circuit. In addition, the full bridge circuit when in rectifier mode does not require prior knowledge of the form of the input (other than its own record of the previous input signal) in order to provide efficient transfer of power from the input to the output, without the risk of damaging short-circuit conditions. In the full bridge, in particular, each diode of the diode bridge is preferably defined by the intrinsic body or parasitic diode of an electronic switching device, such as a MOSFET, such that first and second electronic switching devices having first and second diodes are connected to a first output terminal, and third and fourth electronic switching devices having third and fourth diodes are connected to a second output terminal. Where the electronic switching devices are MOSFETs, this arrangement results in the MOSFETs being connected in the opposite direction to the normal connection arrangement of a MOSFET, and makes use of the fact that the FET can conduct current in either direction when activated. The gate connections of the electronic switching devices are preferably connected to the respective input terminals via a control circuit. In particular, the full bridge circuit may include a control module, which receives an input signal from the input terminals that triggers an activation signal from the control module that is provided to the gate connection of the respective electronic switching device. Alternatively, the input signal of the control module may come from a secondary control device such as micro controller. In particular, the control module preferably senses the voltage at the input to the full bridge circuit, eg using comparators. The electronic switching devices preferably include integrated diodes, which are bypassed by a low impedance path when the electronic switching device is activated. The electronic switching devices currently available with these properties are enhancement mode MOSFETs, which include intrinsic body diodes or parasitic diodes. Hence, in presently preferred embodiments, the first electronic switching device is preferably a p-channel MOSFET having a drain connected to the first input terminal and a source connected to the first output terminal, the second electronic switching device is preferably a p-channel MOSFET having a drain connected to the second input terminal and a source connected to the first output terminal, the third electronic switching device is an n-channel MOSFET having a drain connected to the second input terminal and a source connected to the second output terminal, the fourth electronic switching device is an n-channel MOSFET having a drain connected to the first input terminal and a source connected to the second output terminal.

At least some of the electronic switching devices may be controlled by timed activation, for example by means of a timing circuit that provides a timed waveform to the gate connections of the electronic switching devices. In presently preferred embodiments, the duration of the timed waveform is based on the timing of the previous cycle minus a percentage. In particular, this timing circuit is preferably a digital counter with a register memory and two's compliment adders to allow the bridge to work in other modes, as described below.

In a preferred arrangement, a first pair of switching devices (either the first and second switching devices, or the third and fourth switching devices) is controlled by timed activation, with a duration that is derived from the previous cycle, and the other pair of switching devices is controlled by a signal derived directly from the current cycle by a connection to an input terminal. In view of a general desire to provide a control arrangement referenced to 0V, it is presently preferred that the p- channel MOSFETS (the third and fourth switching devices) are controlled by timed activation derived from the last cycle, and the n-channel MOSFETs are controlled by a logic signal derived from the current cycle. So the rectifier can handle a wide range of voltages, the control logic is preferably able to work at low voltages, eg sub-3V, and the gates of both P and N are preferably driven by level shifters allowing input voltages > 30V. The one or more electronic switching devices that are controlled in order to ensure that the flow of current relative to one of the output terminals is in one direction only, may be electronic switching devices that by-pass the one or more diodes with a low-impedance path. In particular, in a full bridge arrangement, the full bridge circuit is preferably adapted to control activation of two of the electronic switching devices that are connected to the same output terminal, such that the flow of current relative to that output terminal is in one direction only.

In particular, the full bridge circuit is preferably adapted to provide timed activation of two of the electronic switching devices, the two electronic switching devices being connected to the same output terminal, to allow flow of current relative to that output terminal in one direction only. The other two electronic switching devices may also be connected to a timed activation circuit, but in presently preferred embodiments are activated by signals timed directly from the input terminals, as discussed above, such that only one half of the rectifier bridge is activated using a timing circuit derived from the previous timed cycle minus a percentage.

The timed activation is preferably adapted to allow flow of current through the electronic switching devices in one direction only. The timed activation is preferably provided by an activation waveform that is provided to the gate connections of the electronic switching devices. For example, the timed activation circuit is preferably a monostable circuit that provides a one-shot timed waveform to the gate connections of the electronic switching devices. The timed activation is preferably triggered by a connection to an input terminal, eg using a comparator. The full bridge circuit preferably includes a logic gate arrangement that determines when each of the associated electronic switching devices is to be activated, and may enable a single timed activation circuit to activate two or more electronic switching devices.

The full bridge circuit may have the form of an integrated circuit, such that the first and second input terminals, and the first and second output terminals, of the full bridge circuit are each defined by a pin of the integrated circuit.

Where the on-time for the current cycle P channel is derived from the last input cycle width, a phase comparison circuit is preferably included that compares the widths of the positive and negative input cycles to check that they are of equal or near symmetry. In particular, the phase comparison circuit preferably determines whether any difference between the widths of the positive and negative input cycles is less than the amount subtracted from the last phase to determine the duration of the current phase. An error signal may be generated if the widths of the positive and negative input cycles are outside an acceptable level of symmetry. An error may also be generated if there is a missing pulse from the negative or positive cycle monitors.

These errors may be used to deactivate one or more of the electronic switches to prevent possible unwanted short circuit conditions, such as input to output. Once the switches have been deactivated, it is possible for the input to drop in voltage, without reducing the voltage of the output. The difference can be monitored to keep the switches deactivated until the input signal becomes high again. The above checks can be used to put the bridge into a safe state when the input is not in specification, which may occur if the bridge is powered by a resonant circuit driven from 50\60Hz mains during the valley of the 50Hz Mains.

The bridge may have some inputs that set the mode of the bridge and act as external oscillators if required. The bridge may have one or more of the following modes of operation : Full bridge driver with external controls for generating a bidirectional power flow between the AC terminals when DC power is provided at the DC terminals. Full bridge driver with a self oscillating counter for timing bidirectional power flow between the AC terminals when DC power is provided at the DC pins.

Creating a bi-directional switch across the AC terminals, whose state is controlled by the external pins.

Creating an AC to DC bridge, where the DC output of the bridge can be monitored, such that above a first threshold, the input is put into a half power mode by shorting the positive input or negative input cycle only, thus reducing the power at the output to reduce the voltage.

Creating an AC to DC bridge, where the DC output of the bridge can be monitored, such that above a second threshold, the input is put into short circuit mode, so that power is removed from the input and the output voltage is reduced.

Creating an AC to DC bridge which feeds a constant current to the DC voltage delivered to the DC pins

Use a plurality of these bridges to convert various power types.

As discussed above, the full bridge circuit is preferably adapted to control at least some of the electronic switching devices by timed activation, for example by means of a timing circuit that provides a timed waveform to the gate connections of the electronic switching devices. In presently preferred embodiments, the duration of the timed waveform is based on the timing of the previous cycle at the input (AC) terminals minus a percentage. In particular, this timing circuit is preferably a digital counter with a register memory and two's compliment adders. Where the full bridge circuit is receiving a DC input at its DC terminals, a control module of the full bridge circuit is preferably adapted to receive an oscillating signal, which preferably simulates AC+ and AC- signals, and determine for each of the AC+ and AC- signals the duration of a timed waveform based on the timing of the previous cycle minus a percentage. These timed waveforms are preferably provided to the appropriate gate connections of the electronic switching devices in order to provide an AC output at the AC terminals, with a dead-band that corresponds to the percentage subtracted from the timed waveform.

According to a further aspect of the invention, there is provided an integrated circuit comprising any combination or all of the bridge circuits described above using a total of only four power switching FETS.

The full bridge circuit and the integrated circuit discussed above are particularly suitable for use in a power adaptor, for providing power to a load. Hence, according to a further aspect of the invention, there is provided a power adaptor comprising a full bridge circuit as described above.

The power adaptor may comprise an LCL series-parallel resonant circuit that drives the full bridge circuit, at least in the first mode of operation, the full bridge circuit providing an output suitable for driving a load. This configuration of power adaptor is particularly advantageous in relation to the powering of solid state light sources, as described in WO 2008/120019.

By "LCL series-parallel resonant circuit" is meant a resonant circuit comprising a first inductor and a first capacitor in series, and a parallel load leg including a second inductor. The first inductor and first capacitor are preferably connected in series between two input terminals of the resonant circuit, and the resonant circuit preferably comprises a load leg connected in parallel across the first capacitor, wherein the load leg comprises the second inductor and an output for driving the load, which are connected in series. In particular, the LCL resonant circuit preferably has input terminals and output terminals with a first inductor L1 , connected from a first input terminal through a common point with second inductor L2, to a first output terminal, the second input terminal being directly connected to the second output terminal, and a capacitor C1 , connected between the common point between the two inductors and the direct connections between second terminals of input and output. The input terminals are preferably adapted to be driven from a high frequency inverter. Any of the first inductor, the first capacitor and the second inductor may comprise a single inductive or capacitive component or a combination of such components.

The LCL series-parallel resonant circuit is preferably adapted such that at one of its resonant frequencies, the power adaptor provides a constant current output, at a given effective input voltage, and the resonant circuit is preferably driven at that resonant frequency or a sub-harmonic thereof, or sufficiently near to that resonant frequency or a sub-harmonic thereof for the power adaptor to be suitable for use with a constant current load, such as a solid state light source. In particular, the first and second inductors are preferably selected such that the reactance Xu of the first inductor and the reactance X|_2 of the second inductor are substantially equal in magnitude, and are substantially equal in magnitude to the reactance Xci of the first capacitor. In particular, X_Li « Xi_2 ^s -Xci in presently preferred embodiments. When the chosen components satisfy these conditions, at a given input voltage, the current delivered to a load will be constant, independent of the load connected to the power adapter. Furthermore, variation of the input voltage would directly control the magnitude of the constant current delivered to the load. When driving a constant voltage load, such as LEDs, the power delivered to the load would therefore be directly proportional to the input voltage, without requiring any feedforward or feedback control.

The LCL series-parallel resonant circuit is particularly advantageous in relation to the circuit according to the invention because the LCL series-parallel resonant circuit may be adapted to provide a constant current output, and hence the full bridge circuit would be protected from peak currents that could cause damage to the circuit when converting the AC output of the LCL series-parallel resonant circuit to a DC output. Indeed, this feature of the LCL series-parallel resonant circuit would enable low current electronic switching devices (eg MOSFETs) to be used in the full bridge circuit, thereby reducing manufacturing costs. The LCL series-parallel resonant circuit may also be unaffected by any short periods during which the input to the full bridge circuit is shorted, for example during start-up.

The LCL series-parallel resonant circuit inherently boosts the input voltage during the valleys of the mains waveform (as discussed in WO 2008/120019), such that the voltage at the input terminals of the full bridge circuit has a substantially constant amplitude, thereby ensuring that the full bridge circuit is working substantially throughout each mains cycle. In addition, the resonant frequency of the LCL series-parallel resonant circuit does not vary with input voltage, unlike the LC resonant circuit, and hence active control of the electronic switching devices is more feasible. It has also been found that a short-circuit across the AC terminals of the full bridge circuit does not have any negative effect on the LCL series-parallel resonant circuit, due to the constant current output of the resonant circuit and the lack of any potential difference between the output terminals of the resonant circuit in this configuration. Hence, the power adaptor may include a controller that activates at least some of the electronic switching devices to create a short-circuit condition in the full bridge circuit.

The full bridge circuit may be adapted to create a short-circuit across the AC terminals of the full bridge circuit in at least part of the input cycle, such that the power provided at the DC terminals is reduced or removed.

The short-circuit across the input terminals of the full bridge circuit may be present in both half-cycles of the input to the full bridge circuit, which would cause the output to fall to zero, or it may be present in only one half-cycle of the input to the full bridge circuit, which would cause the output to fall to approximately 50% of full power. Alternatively, a controller may be provided that controls the output of the full bridge circuit using a modulated activation of at least some of the electronic switching devices to create modulated short-circuits across the input terminals of the full bridge circuit.

When it is desired to provide a short-circuit across the input terminals of the full bridge circuit in both half-cycles of the input to the full bridge circuit, which would cause the output to fall to zero, the full bridge circuit is preferably adapted to activate two of the switching devices that are connected to the same output terminal, and different input terminals, and keep these switching devices activated to maintain the short-circuit condition. In addition, the full bridge circuit is preferably adapted to simultaneously deactivate the switching devices that are connected to the other output terminal, and keep these switching devices deactivated while the short-circuit condition is present, in order to prevent the creation of a short-circuit across the output terminals of the full bridge circuit. In particular, the full bridge circuit may be adapted to activate either the first and second switching devices, or the third and fourth switching devices, and

simultaneously deactivate the other two switching devices.

When it is desired to provide a short-circuit across the input terminals of the full bridge circuit in only one half-cycle of the input to the full bridge circuit, which would cause the output to fall to approximately 50% of full power, the full bridge circuit may be adapted to activate one of the switching devices, and keep this switching device activated during the half-cycle in which the other switching device that is connected to the same output terminal is activated, or its associated diode is conducting, in order to provide a short-circuit condition in one half-cycle. In this arrangement, the full bridge circuit is preferably adapted to simultaneously deactivate the switching device that is connected to the same input terminal, and keep this switching device deactivated while the short-circuit condition in one half- cycle is present, in order to prevent the creation of a short-circuit across the output terminals of the full bridge circuit. In order to ensure that the other half-cycle of the input to the full bridge circuit is transferred to the output terminals efficiently, the switching devices that are connected to the other input terminal are preferably activated, either by a direct gate connection or a control circuit, when current is following through the electronic switching devices in the direction required for the desired rectified output.

In the arrangement in which a short-circuit is provided across the input terminals of the full bridge circuit in only one half-cycle of the input to the full bridge circuit, which would cause the output to fall to approximately 50% of full power, the full bridge circuit is preferably adapted to provide efficient transfer of power in the half cycle in which the short-circuit condition is not present. In particular, the full bridge circuit is preferably adapted to activate the electronic switching device to provide a low impedance path in the half cycle in which the short-circuit condition is not present. This is most conveniently achieved by providing a direct connection between the switching device and the input terminal during at least the half cycle in which the short-circuit condition is not present. The full bridge circuit may include a protection circuit that activates at least some of the electronic switching devices of the full bridge circuit, when a fault condition exists, to create a short-circuit across the input terminals of the full bridge circuit that reduces or removes the power provided at the output terminals, as discussed above. The fault condition may be an increase in a voltage above a pre- determined value. Alternatively, the fault condition may be an increase in other parameters, such as temperature, above a pre-determined value.

Since the short-circuit condition in the full bridge circuit will cause the input voltage to fall, the protection circuit preferably also includes an energy storage device that maintains the protection circuit in its activated state for a period of time, for example until the energy storage device has been discharged. The protection circuit may be adapted to deactivate, once the energy storage device has been discharged. If the fault condition has been removed, the full bridge circuit may be adapted to continue normal operation. However, if the fault condition is still present, the full bridge circuit may be adapted to reactivate, and continue to reactivate each time the energy storage device is discharged, until the fault condition is removed. For example, since an open circuit condition would cause a catastrophic failure of an LCL series-parallel resonant circuit, and would also cause the voltage in the full bridge circuit to rise above normal operating voltages, the full bridge circuit preferably includes protection against an open circuit condition. In particular, the full bridge circuit is preferably adapted to detect any increase of the output voltage above a pre-determined voltage, and activate at least some of the electronic switching devices to create a short-circuit across the input terminals of the full bridge circuit that reduces or removes the power provided at the output terminals. In this application, the short-circuit across the input terminals of the full bridge circuit is preferably present in both half-cycles of the input to the full bridge circuit, such that the power provided at the output terminals is removed, ie falls to zero.

Similarly, the full bridge circuit may include a protection circuit that detects when the voltage at the input to a drive circuit, such as the LCL series-parallel resonant circuit discussed above, is above a pre-determined level, and activates at least some of the electronic switching devices to create a short-circuit across the input terminals of the full bridge circuit that reduces or removes the power provided at the output terminals. This protection circuit may be adapted to prevent damage to the load, at the output of the full bridge circuit. In this application, it may only be necessary for the short-circuit across the input terminals of the full bridge circuit to be present in one half-cycle of the input to the full bridge circuit, such that the power provided at the output terminals falls to approximately 50% of full power.

The 50% power mode may also be utilised to adapt the circuit for use with either 1 10V or 230V mains power.

The full bridge circuit preferably also includes a circuit for deactivating at least some of the electronic switching devices of the full bridge circuit, when the magnitude of the input voltage is below a particular level in each AC cycle, such that the full bridge circuit acts as a diode bridge.

Preferred embodiments of the invention will now be described in greater detail, by way of illustration only, with reference to the accompanying drawings, in which Figure 1 shows a conventional full-wave rectifier bridge;

Figure 2 shows a resonant universal bridge (RUB) circuit, which is a first embodiment of a full bridge circuit according to the invention;

Figure 3 shows a low loss full wave bridge rectifier, which includes the RUB circuit of Figure 2, driving a constant current load; Figure 4 shows a low loss full wave bridge rectifier providing voltage regulation, which includes the RUB circuit of Figure 2;

Figure 5 shows a full bridge circuit, which includes the RUB circuit of Figure 2, for generating bi directional power;

Figure 6 shows a bi-directional switch, which includes the RUB circuit of Figure 2;

Figure 7 shows a self oscillating full bridge circuit, which includes the RUB circuit of Figure 2, driving an AC LCL resonant load from a DC power source;

Figure 8 shows a DC voltage to DC constant current, LED drive, which includes the RUB circuit of Figure 2 at both the input and the output;

Figure 9 shows a summary of the various operating modes of the RUB circuit of Figure 2;

Figure 10 is a schematic illustration of a full bridge circuit providing conventional synchronous rectification; Figure 1 1 shows the RUB circuit of Figure 2 working as a low loss, full wave bridge rectifier during the negative cycle; Figure 12 shows the RUB circuit of Figure 2 working as a low loss, full wave bridge rectifier during the positive cycle;

Figure 13 shows the RUB circuit of Figure 2 working as a low loss, full wave bridge rectifier with the negative input cycle shorting the AC1 to AC2 input;

Figure 14 shows the RUB circuit of Figure 2 with the AC1 and AC2 terminals shorted together for both negative and positive input cycles at the AC1 and AC2 terminals of the RUB;

Figure 15 shows the RUB circuit of Figure 2 used as a switch, with the AC1 to AC2 terminals of the RUB circuit closed;

Figure 15b shows the RUB Figure 2 used as a switch, with the AC1 to AC2 terminals of the RUB open;

Figure 16 shows the RUB circuit of Figure 2 working as full bridge, with the output current flowing in a positive direction from AC1 to AC2; Figure 17 shows the RUB circuit of Figure 2 working as full bridge, with the output current flowing in a negative direction from AC1 to AC2;

Figure 18 is an illustration of the internal waveforms of the RUB circuit of Figure 2, when working as a low loss full wave bridge rectifier; and

Figure 19 is an illustration of an error generated when comparing the previous times of the AC1 and AC2 inputs of the RUB circuit of Figure 2.

Figure 1 shows a conventional full-wave rectifier bridge, which is adapted to receive an AC voltage at its input, and provide a full-wave rectified DC voltage at its output. This circuit is shown with conventional silicon diodes, but these could be replaced by more expensive Schottky diodes, which have a lower forward voltage. A disadvantage of the conventional diode bridge shown in Figure 1 is that there is a forward voltage drop (V_f) of two diodes between the input and the output of the rectifier circuit. With conventional silicon diodes, this voltage drop is likely to be around 1 .5-3.0V. Even with more expensive Schottky diodes, the voltage drop is likely to be around 0.3-0.9V.

Figure 2 shows a full bridge circuit according to a first embodiment of the invention, which is adapted to provide full-wave rectification and full wave bridge drive and act as a bidirectional switch. In particular, each diode of the conventional diode bridge has been replaced by an enhanced mode MOSFET (M1 ,M2, M3, M4) capable of conducting in either direction.

The four MOSFETs are connected to conduct in opposing pairs. The pair of MOSFETs that is conducting is dependent upon the polarity of the input voltage. The conducting pairs of MOSFETs are arranged to steer the input voltage to the appropriate DC terminals so as to always maintain the same polarity at the DC terminals, in a similar manner to the arrangement of a conventional diode bridge. Each enhanced mode MOSFET has an intrinsic body diode (parasitic diode), when the MOSFET is turned off. These intrinsic diodes are shown in Figure 2. The MOSFETS are connected with the intrinsic diodes having the configuration of a conventional full-wave rectifier bridge. The MOSFETs are each arranged to conduct electric current between a particular input terminal and a particular output terminal or between an output terminal and an input terminal of the full bridge circuit.

Once the appropriate pair of MOSFETs have been turned-on, these MOSFETs will have a conducting channel that will effectively by-pass their intrinsic body diodes. The voltage drop will then be a function of the drain-to-source resistance of the conducting MOSFETs, which is typically very low, and certainly much lower than the forward voltage drop of a diode. When the full bridge is acting in rectifier mode and the polarity of the AC input voltage reverses, the other pair of MOSFETs will be turned on, and will also pass through the diode and conducting stages described above when the device is used in rectifier mode.

It is envisaged that the full bridge circuit shown in Figure 2 would be embodied in an integrated circuit with eight pins, two pins for the AC input, two pins for the DC output, one logic power pin and three control pins .

The full bridge circuit of Figure 2 is particularly suitable for use in the supply of power to a solid state light source as a low loss full bridge rectifier, such as one or more LEDs, for example as an output stage of a power adaptor for a solid state light source. In this application, indeed in many other applications, it is preferable to smooth the DC output, for example to reduce the peak current.

The logic gates are adapted to cause the timing circuit to be triggered by the input to the circuit, and act as a time compare and record circuit. The time is compared to the last recorded - x%. On compare, the p-channel MOSFET that would have received a gate signal for this input is turned off, following being turned on at the start of the signal, such that the timed waveform is timed to be shorter than the period of the input cycle during which the flow of current through the p-channel MOSFET is from the negative output terminal in the direction of the appropriate input terminal. The p-channel MOSFET is therefore turned off by the timing circuit before the direction of current is reversed, thereby preventing discharge of the output capacitor.

The logic gate arrangement therefore receives inputs from the respective input terminals and the two p-channels have a compare and record circuit each. In this embodiment, the logic gates are connected to the respective input terminals via resistors feeding comparators. This circuit may also be arranged with the two n-channel MOSFETs being the MOSFETs that are controlled by the monostable circuit. However, the circuit shown in Figure 2 would typically be preferable. The rectifier circuits discussed above are particularly suitable for use in the supply of power to a solid state light source, such as one or more LEDs, for example as an output stage of a power adaptor for a solid state light source.

This rectifier circuit also includes an arrangement for phase error detection. As the on time for the current cycle P channel is derived from the last input cycle width, a phase comparison circuit has been added that compares the widths of the positive and negative input cycles to check that they are of equal or near symmetry. Any difference must be less than the amount subtracted from the last phase to time the current phase. An error signal can be generated if out of acceptable symmetry. An error can also be generated if there is a missing pulse from the negative or positive cycle monitors. These errors can be used to deactivate switches to prevent possible unwanted short circuit conditions such as input to output. Once the switches have been deactivated, it is possible for the input to drop in voltage of without reducing the voltage of the output. The difference can be monitored to keep the switches deactivated until the input signal becomes high again. The above checks can be used to put the bridge into a safe state when the input is not in specification which may occur if the bridge is powered by a resonant circuit driven from 50\60Hz mains during the valley of the 50Hz Mains. Figure 2 is a schematic diagram of a full bridge circuit in which each MOSFET M1 - M4 is controlled by a level shifting driver D1 -D4 so all the MOSFETS can be controlled by the logic. This allows the logic to control and change the various modes of the full bridge as described on the above figure explanations.

The mode change pins inputs feed comparators that look for various analogu voltages to control the various functions. The ESD protection structure at the input pin may be able to handle a higher voltage than required by the comparators to allow the device to be co packaged or linked directly to a device uses higher voltages during part of the use, e.g. during the programming of a PIC. The full bridge would require a secondary circuit such as a current limiting resistor and over voltage protection diode to protect the comparator input from the higher external voltages.

One of the input pins also doubles as the pin to which a capacitor is connected, to form a soft start or on-board oscillator for the self oscillating full bridge mode. As such, the pin also has a FET able to ground the pin by the control logic.

Figure 3 shows the RUB (1 ) being used as a low loss full wave bridge rectifier driving constant current. The input is from an LCL resonant source (2) and the RUB (1 ) uses this input as the switching frequency in this mode.

Figure 4 shows the RUB (1 ) being used as a low loss full wave bridge rectifier with voltage regulation. The input is from an LCL resonant source (2) and the RUB (1 ) uses this input as the switching frequency in this mode. Figure 5 shows the RUB being used as a full bridge diver with external control signals to generate bi directional power at the AC1 and AC2 terminals. The external control signals HP_EN and HP_EN2_n generate the switching frequency in this mode. Figure 6 shows the RUB (1 ) being used as a bi-directional switch. The external controls HP_EN and HP_EN2_n control if the switch is on or off.

Figure 7 shows the RUB (1 ) being used to as a self oscillating full bridge driving an AC LCL resonant load from a DC power source. In this mode the frequency is set by the 10pF capacitor.

Figure 8 shows two RUBs being used as a DC voltage to DC constant current LED drive with no feedback requirement. The first RUB (1 ) is driving an AC LCL resonant load (2) from a DC power source. The switching frequency of RUB (1 ) is self oscillating and set by the 10pF capacitor. The LCL (2) is then feeding the second RUB (3) being used as a low loss full wave bridge rectifier driving constant current. The switching frequency of the second RUB (3) is set by the AC input AC1 .AC2.

Figure 9 shows a summary of the various operating modes of the RUB, Figure 2. Column 1 is "1 " if the RUB output has gone too high in voltage due to an open circuit. Column 2-4 are the control signals for the RUB that sets the mode shown in column 5. The last column refers to further figures that show how the mode is working.

Figure 10 illustrates a basic full bridge with synchronous rectification. Figures 1 1 to 17 are similar illustrations of the different possible modes of the RUB circuit of Figure 2. In particular, Figure 1 1 shows the RUB of Figure 2 working as a low loss full wave bridge rectifier during the negative cycle. Figure 12 shows the RUB Figure 2 working as a low loss full wave bridge rectifier during the positive cycle. Figure 13 shows the RUB Figure 2 working as a low loss full wave bridge rectifier with the negative input cycle shorting the AC1 to AC2 input. Figure 14 shows the RUB Figure 2 with the AC1 and AC2 terminals shorted together for both negative and positive input cycles at AC1 and AC2 terminals of the RUB. Figure 15a shows the RUB Figure 2 used as a switch and AC1 to AC2 terminals of the RUB closed. Figure 15b shows the RUB Figure 2 used as a switch and AC1 to AC2 terminals of the RUB open. Figure 16 shows the RUB working as full bridge with the output current flowing in a positive direction from AC1 to AC2. Figure 17 shows the RUB working as full bridge with the output current flowing in a negative direction from AC1 to AC2.

In addition, Figure 18 shows the internal waveforms of the RUB when working as a low loss, full wave bridge rectifier. The last trace for M4 is used to generate the wave form shown in Figure 13. Figure 19 shows the error generated when comparing the previous times of the AC1 and AC2 inputs of the RUB circuit of Figure 2. When there is a large difference, the Phase Error goes active, turning off the FETs of the RUB circuit of Figure 2.

Claims

1 . A full bridge circuit comprising a pair of AC terminals and a pair of DC

terminals, the full bridge circuit being adapted in a first mode of operation to receive an AC voltage input at its AC terminals and provide a rectified voltage output at its DC terminals, and being adapted in a second mode of operation either:

(b) to receive a DC voltage input at its DC terminals and act as a bi-directional switch across the AC terminals.

2. A full bridge circuit as claimed in Claim 1 , where the full bridge circuit is adapted in a second mode of operation to receive a DC voltage input at its DC terminals and provide an AC voltage output at its AC terminals, and in a third mode of operation to receive a DC voltage input at its DC terminals and act as a bi-directional switch across the AC terminals.

3. A full bridge circuit as claimed in Claim 1 or 2, which has the form of a full wave rectifier comprising a diode bridge in which the diodes are each adapted to be by-passed by a low-impedance path on activation of an associated electronic switching device, wherein the full bridge circuit is adapted to control activation of one or more electronic switching devices, such that the flow of current relative to any one of the DC terminals is in one direction only.

4. A full bridge circuit as claimed in Claim 3, wherein the one or more

electronic switching devices that are controlled in order to ensure that the flow of current relative to any one of the DC terminals is in one direction only are electronic switching devices that by-pass the one or more diodes with a low-impedance path.

5. A full bridge circuit as claimed in Claim 3 or Claim 4, wherein the electronic switching devices are arranged in two pairs, with each pair being connected to one of the DC terminals, and the full bridge circuit is adapted to control activation of each pair of electronic switching devices such that the flow of current relative to the associated DC terminal is in one direction only.

6. A full bridge circuit as claimed in any one of Claims 3 to 5, wherein the full bridge circuit is adapted to provide timed activation of at least two of the electronic switching devices, the at least two electronic switching devices being connected to the same DC terminal, to allow flow of current relative to that DC terminal in one direction only.

7. A full bridge circuit as claimed in any one of Claims 3 to 6, wherein the

circuit is adapted in its first mode of operation to store the duration of the AC input signal as a time value, with an amount subtracted from it, such that on the next AC cycle, the time value is used to determine the duration of the on-time of at least one of the electronic switching devices, such that the at least one of the electronic switching device switches off before current flows in a negative direction.

8. A full bridge circuit as claimed in Claim 7, wherein the calculation and

storage of the time value is achieved using digital hardware, digital software, a timer and/or an adder.

9. A full bridge circuit as claimed in Claim 7 or Claim 8, wherein a start trigger is provided by an internal oscillator, and a timer drives the electronic switching devices in a manner that creates a full bridge output at the AC terminals with the subtracted time being dead band time.

10. A full bridge circuit as claimed in Claim 9, wherein the start trigger internal oscillator has an external timing capacitor and/or an external timing resistor.

1 1 . A full bridge circuit as claimed in any preceding claim, wherein the power input to the bridge is provided at the DC terminals in a second mode of operation in which a DC voltage input is received at its DC terminals and an AC voltage output is provided at its AC terminals.

12. A full bridge circuit as described in Claim 1 1 , wherein the electronic

switching devices are controlled in the second mode of operation in a manner that uses external control pins to create a full bridge output at the AC terminals, and preferably allow for dead band time.

13. A full bridge circuit as claimed in any preceding claim, wherein the rectified output in the first mode of operation is monitored by a feedback circuit in the device to regulate the DC voltage output at the DC terminals.

14. A full bridge circuit as claimed in any one of Claims 3 to 10, wherein at least some of the electronic switching devices are controlled by timed activation, which is provided by an activation waveform that is provided to the gate connections of the electronic switching devices.

15. A full bridge circuit as claimed in Claim 14, wherein the timed activation is triggered by a connection to an input terminal.

16. A full bridge circuit as claimed in any preceding claim wherein the full bridge circuit includes a logic gate arrangement that controls activation of the electronic switching devices.

17. A full bridge circuit as claimed in any preceding claim, wherein each diode of the diode bridge is defined by the intrinsic body diode of an electronic switching device, such that first and second electronic switching devices having first and second diodes are connected to a first output terminal, and third and fourth electronic switching devices having third and fourth diodes are connected to a second output terminal.

18. A full bridge circuit as claimed in Claim 17, wherein the first and second electronic switching devices are controlled by timed activation, and the third and fourth electronic switching devices are controlled by logic only.

19. A full bridge circuit as claimed in Claim 18, wherein the electronic switching devices that are controlled by timed activation are p-channel MOSFETS, and the electronic switching devices that are controlled by logic only are n- channel MOSFETs.

20. A full bridge circuit as claimed in any preceding claim, wherein one or more external control signals are used to control the modes of the full bridge circuit.

21 . A full bridge circuit as claimed in any preceding claim, wherein the mode changes of the bridge are synchronised with the AC input waveform, if present, when used as a rectifier.

22. A full bridge circuit as claimed in any preceding claim, wherein the circuit is adapted to deactivate at least some of the electronic switching devices, in each AC input cycle, to cause the electronic switching devices to act as a conventional diode bridge, in a period of each input cycle in which the input cycles at the AC terminals are not of similar duration.

23. A full bridge circuit as claimed in any preceding claim, wherein the full bridge circuit includes a connection to a drive circuit that provides an AC input to the circuit in its first mode of operation, and is adapted to deactivate at least some of the electronic switching devices when the magnitude of a voltage in the drive circuit is below a pre-determined voltage in each AC cycle.

24. An integrated circuit comprising a full bridge circuit as claimed in any

preceding claim.

25. An integrated circuit as claimed in Claim 24 wherein the AC terminals and the DC terminals are each defined by a pin of the integrated circuit.

26. An integrated circuit as claimed in Claim 24 or Claim 25 where the

electrostatic discharge (ESD) structure of the pins is higher than required for the function of the pin, with a second protection within the integrated circuit to limit higher voltages to a safe level, so it can be co-packaged or used directly with a part that requires higher voltages on its pins, such as a programmable integrated circuit (PIC) during programming.

27. An integrated circuit as claimed in Claim 26 where the PIC shares some of the pins used by the full bridge circuit.

28. A power adaptor comprising a full bridge circuit as claimed in any one of Claims 1 to 23.

29. A power adaptor as claimed in Claim 28, wherein the power adaptor

comprising an input for connection to an AC power supply, a resonant circuit driven by a first full bridge circuit in its first mode of operation, and a second full bridge circuit in its first mode of operation connected to the output of the resonant circuit, such that the output is suitable for driving a DC source.

30. A power adaptor as claimed in Claim 28 or Claim 29, wherein the resonant circuit is an LCL series-parallel resonant circuit.

31 . A power adaptor as claimed in any one of Claims 28 to 30, wherein the power adaptor is suitable for driving a solid state light source.