EP2591414A4 - Procédé de quantification et d'analyse du parallélisme intrinsèque d'un algorithme - Google Patents

Procédé de quantification et d'analyse du parallélisme intrinsèque d'un algorithme

Info

Publication number
EP2591414A4
EP2591414A4 EP11804255.5A EP11804255A EP2591414A4 EP 2591414 A4 EP2591414 A4 EP 2591414A4 EP 11804255 A EP11804255 A EP 11804255A EP 2591414 A4 EP2591414 A4 EP 2591414A4
Authority
EP
European Patent Office
Prior art keywords
quantifying
algorithm
intrinsic parallelism
analyzing intrinsic
analyzing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP11804255.5A
Other languages
German (de)
English (en)
Other versions
EP2591414A1 (fr
Inventor
Gwo-Giun Chris Lee
He-Yuan Lin
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Cheng Kung University NCKU
Original Assignee
National Cheng Kung University NCKU
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from TW099122162A external-priority patent/TWI501168B/zh
Priority claimed from US12/832,557 external-priority patent/US20120011186A1/en
Application filed by National Cheng Kung University NCKU filed Critical National Cheng Kung University NCKU
Publication of EP2591414A1 publication Critical patent/EP2591414A1/fr
Publication of EP2591414A4 publication Critical patent/EP2591414A4/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
    • G06F17/14—Fourier, Walsh or analogous domain transformations, e.g. Laplace, Hilbert, Karhunen-Loeve, transforms
    • G06F17/147—Discrete orthonormal transforms, e.g. discrete cosine transform, discrete sine transform, and variations therefrom, e.g. modified discrete cosine transform, integer transforms approximating the discrete cosine transform
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00—Arrangements for software engineering
    • G06F8/40—Transformation of program code
    • G06F8/41—Compilation
    • G06F8/45—Exploiting coarse grain parallelism in compilation, i.e. parallelism between groups of instructions
    • G06F8/456—Parallelism detection
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Software Systems (AREA)
  • Data Mining & Analysis (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Computational Mathematics (AREA)
  • Algebra (AREA)
  • Databases & Information Systems (AREA)
  • Discrete Mathematics (AREA)
  • Complex Calculations (AREA)
  • Stored Programmes (AREA)
EP11804255.5A 2010-07-06 2011-07-05 Procédé de quantification et d'analyse du parallélisme intrinsèque d'un algorithme Withdrawn EP2591414A4 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
TW099122162A TWI501168B (zh) 2010-07-06 2010-07-06 演算法本質平行度之量化及分析方法
US12/832,557 US20120011186A1 (en) 2010-07-08 2010-07-08 Method for quantifying and analyzing intrinsic parallelism of an algorithm
PCT/US2011/042962 WO2012006285A1 (fr) 2010-07-06 2011-07-05 Procédé de quantification et d'analyse du parallélisme intrinsèque d'un algorithme

Publications (2)

Publication Number Publication Date
EP2591414A1 EP2591414A1 (fr) 2013-05-15
EP2591414A4 true EP2591414A4 (fr) 2014-08-06

Family

ID=45441539

Family Applications (1)

Application Number Title Priority Date Filing Date
EP11804255.5A Withdrawn EP2591414A4 (fr) 2010-07-06 2011-07-05 Procédé de quantification et d'analyse du parallélisme intrinsèque d'un algorithme

Country Status (4)

Country Link
EP (1) EP2591414A4 (fr)
JP (1) JP5925202B2 (fr)
KR (1) KR20130038903A (fr)
WO (1) WO2012006285A1 (fr)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10593080B2 (en) 2017-04-27 2020-03-17 Daegu Gyeongbuk Institute Of Science And Technology Graph generating method and apparatus
KR101998020B1 (ko) * 2017-04-27 2019-07-08 재단법인대구경북과학기술원 그래프 생성 방법 및 장치
CN111061150B (zh) * 2019-10-23 2020-11-27 南京大学 一种拉普拉斯频率响应的硬件实现方法

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011163223A1 (fr) * 2010-06-22 2011-12-29 National Cheng Kung University Procédé d'analyse de parallélisme intrinsèque d'algorithme

Family Cites Families (8)

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Publication number Priority date Publication date Assignee Title
US5587922A (en) * 1993-06-16 1996-12-24 Sandia Corporation Multidimensional spectral load balancing
US7418470B2 (en) * 2000-06-26 2008-08-26 Massively Parallel Technologies, Inc. Parallel processing systems and method
US6615211B2 (en) * 2001-03-19 2003-09-02 International Business Machines Corporation System and methods for using continuous optimization for ordering categorical data sets
US7171397B1 (en) * 2002-08-21 2007-01-30 Ncr Corp. Method and system for measuring parallelism of a database system execution step
US7724256B2 (en) * 2005-03-21 2010-05-25 Siemens Medical Solutions Usa, Inc. Fast graph cuts: a weak shape assumption provides a fast exact method for graph cuts segmentation
US8548238B2 (en) * 2007-05-03 2013-10-01 Carnegie Mellon University Method for partitioning combinatorial graphs
US8201171B2 (en) * 2007-06-27 2012-06-12 Microsoft Corporation Adjacent data parallel and streaming operator fusion
US7406200B1 (en) * 2008-01-08 2008-07-29 International Business Machines Corporation Method and system for finding structures in multi-dimensional spaces using image-guided clustering

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011163223A1 (fr) * 2010-06-22 2011-12-29 National Cheng Kung University Procédé d'analyse de parallélisme intrinsèque d'algorithme

Non-Patent Citations (5)

* Cited by examiner, † Cited by third party
Title
"Multimedia Image and Video Processing, Second Edition", vol. 23, March 2012, CRC PRESS, ISSN: 1045-9219, article LEE G G ET AL: "Chapter 23 - Algorithm/Architecture Coexploration", pages: 573 - 608, XP055126066 *
LEE G G ET AL: "Algorithm/architecture co-exploration of visual computing on emergent platforms: Overview and future prospects", IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY, vol. 19, no. 11, November 2009 (2009-11-01), pages 1576 - 1587, XP011275966, ISSN: 1051-8215, DOI: 10.1109/TCSVT.2009.2031376 *
LEE G G ET AL: "Quantifying intrinsic parallelism using linear algebra for algorithm/architecture coexploration", IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS, vol. 23, no. 5, May 2012 (2012-05-01), pages 944 - 957, XP011440406, ISSN: 1045-9219, DOI: 10.1109/TPDS.2011.230 *
LIN H-Y ET AL: "Quantifying intrinsic parallelism via eigen-decomposition of dataflow graphs for algorithm/architecture co-exploration", 2010 IEEE WORKSHOP ON SIGNAL PROCESSING SYSTEM (SIPS 2010), 6-8 OCTOBER 2010, SAN FRANCISCO, CA, USA, 6 October 2010 (2010-10-06), pages 317 - 322, XP031792428, ISBN: 978-1-4244-8932-9 *
See also references of WO2012006285A1 *

Also Published As

Publication number Publication date
JP5925202B2 (ja) 2016-05-25
WO2012006285A1 (fr) 2012-01-12
KR20130038903A (ko) 2013-04-18
EP2591414A1 (fr) 2013-05-15
JP2013530477A (ja) 2013-07-25

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