EP2582047A2 - Matrix-stages solid state ultrafast switch - Google Patents
Matrix-stages solid state ultrafast switch Download PDFInfo
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- EP2582047A2 EP2582047A2 EP12188079.3A EP12188079A EP2582047A2 EP 2582047 A2 EP2582047 A2 EP 2582047A2 EP 12188079 A EP12188079 A EP 12188079A EP 2582047 A2 EP2582047 A2 EP 2582047A2
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- switch
- triggered
- auto
- stage
- control
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- 239000007787 solid Substances 0.000 title description 30
- 239000004065 semiconductor Substances 0.000 claims abstract description 154
- 230000001960 triggered effect Effects 0.000 claims abstract description 117
- 239000003990 capacitor Substances 0.000 claims abstract description 36
- 238000004146 energy storage Methods 0.000 claims description 31
- 230000004044 response Effects 0.000 claims description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 3
- 229910052710 silicon Inorganic materials 0.000 claims description 3
- 239000010703 silicon Substances 0.000 claims description 3
- 230000008878 coupling Effects 0.000 claims description 2
- 238000010168 coupling process Methods 0.000 claims description 2
- 238000005859 coupling reaction Methods 0.000 claims description 2
- 230000005669 field effect Effects 0.000 claims description 2
- 229910044991 metal oxide Inorganic materials 0.000 claims description 2
- 150000004706 metal oxides Chemical class 0.000 claims description 2
- 238000000034 method Methods 0.000 description 12
- 230000007423 decrease Effects 0.000 description 9
- 238000007599 discharging Methods 0.000 description 3
- 230000003287 optical effect Effects 0.000 description 3
- 238000002955 isolation Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000004804 winding Methods 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000007667 floating Methods 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/53—Generators characterised by the type of circuit or by the means used for producing pulses by the use of an energy-accumulating element discharged through the load by a switching device controlled by an external signal and not incorporating positive feedback
- H03K3/57—Generators characterised by the type of circuit or by the means used for producing pulses by the use of an energy-accumulating element discharged through the load by a switching device controlled by an external signal and not incorporating positive feedback the switching device being a semiconductor device
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/04—Modifications for accelerating switching
- H03K17/0403—Modifications for accelerating switching in thyristor switches
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/10—Modifications for increasing the maximum permissible switched voltage
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/10—Modifications for increasing the maximum permissible switched voltage
- H03K17/105—Modifications for increasing the maximum permissible switched voltage in thyristor switches
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/12—Modifications for increasing the maximum permissible switched current
- H03K17/125—Modifications for increasing the maximum permissible switched current in thyristor switches
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/60—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being bipolar transistors
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
- H03K17/6871—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors the output circuit comprising more than one controlled field-effect transistor
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/74—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of diodes
Definitions
- the present invention relates to a solid state switch and, more specifcally, to a solid state switch having a plurality of switch levels connected in series, each level having a plurality of semiconductors connected in parallel and to a method of triggering the solid state switch.
- Switching high current and high voltage is required in some applications in military, medical, and commercial devices and systems.
- a switching device may be required to switch tens of kilovolts and tens of kiloamperes.
- Devices for switching such high current and high voltage have been proposed to include a plurality of levels connected in series, each level having a plurality of high-power semiconductor switching devices connected in parallel.
- Each semiconductor includes a gate and a driver of the gate.
- the gate driver has special requirements such as high voltage isolation between levels, minimum delay time in gate pulses from one level to another, overvoltage protection, and sharing voltage protection.
- pulse transformers in the gate circuitry to isolate one level of the switch from another. Because the switch comprises many semiconductors in series and in parallel, these pulse transformers become very large, costly, and impractical. In addition pulse transformers must be shielded to avoid external magnetic field pick up which could create unwanted low level gate pulses and, as a result, cause misfiring, which may destroy devices connected to the switch.
- U.S. Pat. Nos. 6,396.672 and 6,710,994 describe a power electronic switch circuit that includes a silicon-controlled rectifier and a gate trigger circuit coupled to the gate of the silicon-controlled rectifier (SCR).
- a snubber capacitor is coupled to the anode and cathode of the SCR. Energy stored in the snubber capacitor provides the necessary energy to power the gate trigger circuit to trigger the SCR.
- U.S. Pat. No. 6,624,684 describes a compact method for triggering thyristors connected in series using energy stored in a pulse forming network coupled to the gate of each thyristor.
- Each pulse forming network is coupled to a snubber circuit that, together with the pulse forming network, acts as a snubber capacitor to limit the dv/dt imposed on the thyristor, thereby preventing spurious turn-on of the thyristor.
- the pulse forming network provides current to the gate of the thyristor through a gate switch to turn on the thyristor while the snubber circuit provides a source of fast rising current to the anode of the thyristor to speed up turn-on as it discharges through the anode of the thyristor.
- Either a low-power electrical signal through a pulse transformer or an optical signal can be used to trigger the gate switch.
- U.S. Pat. Nos. 5,933,335 and 5,180,963 provide examples of an optically triggered switch.
- U.S. Pat. 5,180,963 there is described an optically triggered solid state switch.
- the switch uses an optical signal for each set of two high power solid state devices.
- the optical signal triggers a phototransistor, which in turn triggers a low power solid state device.
- the low power solid state device then discharge a capacitor through a pulse transformer, producing signals in the gates of two high power solid state devices to turn on the devices.
- U.S. Pat. No. 7,072,196 describes a method of turning on a high voltage solid state switch that comprises a set of solid state devices, such as thyristors, connected in series.
- the switch comprises a snubber circuit coupled to the anode and cathode of each solid state device to speed up turn-on.
- a semiconductor switching device having a control-triggered stage and one or more auto-triggered stages connected in series.
- the control-triggered stage includes one or more semiconductor switches connected in parallel, a breakover switch comprising a first end and a second end, and a control switch connected across the breakover switch.
- Each semiconductor switch includes a power input, a power output, and a control input.
- the first end of the breakover switch is coupled to the power input of each semiconductor switch, and the second end of the breakover switch is coupled to the control input of each semiconductor switch.
- Each auto-triggered stage includes one or more semiconductor switches connected in parallel and a breakover switch comprising a first end and a second end.
- Each semiconductor switch of each auto-triggered stage includes a power input, a power output, and a control input.
- the first end of the breakover switch of the each auto-triggered stage is coupled to the power input of each semiconductor switch of the each auto-triggered stage, and the second end of the breakover switch of the each auto-triggered stage is coupled to the control input of each semiconductor switch of the each auto-triggered stage.
- the control-triggered stage is connected in series with the one or more auto-triggered stages.
- a high voltage circuit having an energy storage device, a load, a power supply coupled across the energy storage device, and a semiconductor switching device for coupling the energy storage device across the load.
- the semiconductor switching device includes a control-triggered stage and one or more auto-triggered stages connected in series.
- the control-triggered stage includes one or more semiconductor switches connected in parallel, a breakover switch comprising a first end and a second end, and a control switch connected across the breakover switch.
- Each of the semiconductor switches includes a power input, a power output, and a control input.
- the first end of the breakover switch is coupled to the power input of each semiconductor switch, and the second end of the breakover switch is coupled to the control input of each semiconductor switch.
- Each auto-triggered stage includes one or more semiconductor switches connected in parallel and a breakover switch comprising a first end and a second end.
- Each semiconductor switch of each auto-triggered stage includes a power input, a power output, and a control input.
- the first end of the breakover switch of the each auto-triggered stage is coupled to the power input of each semiconductor switch of the each auto-triggered stage, and the second end of the breakover switch of the each auto-triggered stage is coupled to the control input of each semiconductor switch of the each auto-triggered stage.
- the control-triggered stage is connected in series with the one or more auto-triggered stages.
- FIG. 1 illustrates an exemplary embodiment of a system for providing pulsed power to a load, the system comprising a power source, an energy storage device, and a semiconductor switching device, in accordance with an exemplary embodiment of the present invention
- FIG. 2 illustrates an exemplary embodiment of the semiconductor switching device of FIG. 1 , in accordance with an exemplary embodiment of the present invention
- FIG. 3 illustrates exemplary waveforms for voltage and current provided by the energy storage device of FIG. 1 during turn-on of the semiconductor switching device, in accordance with an exemplary embodiment of the present invention
- FIG. 4 illustrates exemplary waveforms for voltage and current provided by the energy storage device of FIG. 1 during turn-off of the semiconductor switching device, in accordance with an exemplary embodiment of the present invention.
- Some of the conventional high voltage, high current solid state switches comprise one or more solid state devices, such as thyristors, across which a snubber circuit is coupled.
- the snubber circuit facilitates turn-on of the solid state device but limits using an insulated-gate bipolar transistor (IGBT) or a metal oxide field effects transistor (MOSFET) as the solid state devices because IGBTs and MOSFETs are normally used in snubberless circuits.
- IGBT insulated-gate bipolar transistor
- MOSFET metal oxide field effects transistor
- pulse transformers to drive the one or more solid state devices. Pulse transformers, however, are not desirable as they increase the inductance of the solid state switches. Further, the primary winding wire of the trigger transformer conducts the same current that the one or more solid state devices conduct. With wide pulse duration and high load current, the primary winding wire becomes very thick, and the trigger transformer becomes very big and insufficient.
- the conventional solid state switches which use snubber circuits or pulse transformers are disadvantageous for additional reasons.
- a solid state switch operates in a very narrow range of voltage, usually between V switch - V switch /N levels and V switch .
- the value of the snubber parameters and the design of the trigger transformer must be selected to avoid auto triggering of the switch during the charging phase. Unwanted turn-on may happen if any unexpected voltage spikes in initial dv/dt occur.
- pulse transformers In all of the above-mentioned switches, pulse transformers, multiple phototransistors, and other components are required for each high power solid state device being triggered. With many semiconductors in series and in parallel, the multitude of triggering devices required become very large, thereby increasing the cost, size, and expense of the solid state switch. The size and expense may become impractical if the number of solid state devices is large. Furthermore, if pulse transformers are use, the pulse transformers must be shielded to avoid external magnetic field pick-up, which could create unwanted low-level gate pulses and, as a result, cause misfiring and destroy the solid state devices. Shielding further increases the size and expense of the solid state switch.
- the system 100 comprises a power source 110, an energy storage device 120, a load 130, and a switch 200.
- the power source 110 is coupled to the energy storage device 120 and to ground 140.
- the switch 200 is coupled to the energy storage device 120 and to ground 140.
- the load is coupled to the energy storage device 120 and to ground 140.
- the switch 200 is initially open, and the power source 110 charges the energy storage device 120.
- the power source 110 may be disabled or disconnected from the device 120.
- the switch 200 When power is desired to be delivered to the load 130, the switch 200 is closed, and the charge stored in the energy storage device 120 discharges into the load 130.
- the charging time of the energy storage device 120 may be two or more orders of magnitude greater than the discharge time thereof.
- the current supplied to the load via the switch 200 may be many times that of the current supplied to the energy storage device 120 during charge up by the power source 110.
- Exemplary embodiments of the energy storage device 120 include one or more capacitors, one or more transmission lines, or a pulse forming network. Exemplary values of the voltage and current provided by the energy storage device 120 during discharge are, respectively, tens of kilovolts and ten of kiloamperes, making the system 100 a high voltage, high current circuit.
- each of the power source 110, the switch 200, and the load 130 is connected to ground 140. It is to be understood from FIG. 1 that alternative embodiments of the system 100 are contemplated. For example, in an exemplary alternative embodiment, the positions of the switch 200 and the energy storage device 120 are switched.
- FIG. 2 Illustrated in FIG. 2 is a circuit diagram for the switch 200 of FIG. 1 , in accordance with an exemplary embodiment of the present invention.
- the switch 200 is used for switching a current Is provided by the energy storage device 120 at a voltage V S .
- the current Is may be tens of kiloamperes
- the voltage V S may be tens of kilovolts.
- the switch 200 comprises a plurality of levels or stages, respectively designated as 210 1 , 210 2 ,..., 210 n , connected in series. In the exemplary embodiment of the switch 200 illustrated in FIG. 2 , there are n stages 210 1 through 210 n . By using a plurality of stages 210 1 through 210 n , the switch 200 divides the source voltage V S over n stages so that V S /n is less than the maximum permissible voltage across any of the stages 210 1 through 210 n . Thus, the switch 200 has a higher voltage hold-off capability than it would have had it had only one stage, and each stage is protected from overvoltage.
- Each stage comprises a plurality of solid state semiconductor switches or devices, respectively designated as S x,y , connected in parallel, where x refers to any of stages 210 1 through 210 n and y refers to the semiconductor devices in each stage.
- S x,y solid state semiconductor switches or devices
- the first stage 210 1 comprises m semiconductor devices S 1,1 through S 1,m connected in parallel (herein, "S 1 " is used as shorthand to refer to the plurality of semiconductor devices S 1,1 through S 1,m in the stage 210 1 ); the second stage 210 2 comprises m semiconductor devices S 2,1 through S 2,m connected in parallel (herein, “S 2 " is used as shorthand to refer to the plurality of semiconductor devices S 2,1 through S 2,m in the stage 210 1 ); and the nth stage 210 n comprises m semiconductor devices S n,1 through S n,m connected in parallel (herein, "S n " is used as shorthand to refer to the plurality of semiconductor devices S n,1 through S n,m in the stage 210 n ).
- the switch 200 divides the input current Is by m.
- each stage 210 1 through 210 n and, specifically, each semiconductor device S x,y is protected from overcurrent.
- the first stage 210 1 is a control-triggered stage used to control the turn-on and turn-off of the stages 210 2 through 210 n and thereby of the switch 200.
- FIG. 2 illustrates that the control-triggered stage 210 1 is the first or bottommost stage and connected to ground 140. It is to be understood that the control-triggered stage 210 1 need not be so located and could be positioned in the place of any of the other stages 210 2 through 210 n in the switch 200.
- the control-triggered stage 210 1 comprises the semiconductor devices S 1,1 through S 1,m having respective control inputs CI 1,1 through CI 1,m power inputs PI 1,1 through PI 1,m , and power outputs PO 1,1 through PO 1,m .
- the power outputs PO 1,1 through PO 1,m are connected to an output 211 1 of the control-triggered stage 210 1 which is at ground 140.
- the control-triggered stage 210 1 further comprises a capacitor C 1 , a turn-off circuit 215, and a suppressor Z 1 .
- a first side or end of the suppressor Z 1 is connected to the output 211 1 , as is a first side or end of the capacitor C 1 and a first end 215A of the turn-off circuit 215.
- a second side or end of the capacitor C 1 is connected to the control inputs CI 2,1 through CI 2,m of the semiconductor devices S 2,1 through S 2,m of the second stage.
- a second side or end of the suppressor Z 1 is connected to the control inputs CI 1,1 through CI 1,m of the semiconductor devices S 1,1 through S 1,m , as is a second end 215B of the turn-off circuit 215.
- the control-triggered stage 210 1 further comprises a breakover switch BOS 1 , a second side or end of which is coupled to the second side of the suppressor Z 1 .
- a first side or end of the breakover switch BOS 1 is coupled to the power inputs PI 1,1 through PI 1,m of the semiconductor devices S 1,1 through S 1,m via a resistor R 1 .
- the power inputs PI 1,1 through PI 1,m , of the semiconductor devices S 1,1 through S 1,m are connected to an input 212 1 of the control-triggered stage 210 1 .
- a switch SW 1 is disposed in the control-triggered stage 210 1 across the breakover switch BOS 1 .
- the suppressor Z 1 is a Zener diode
- the breakover switch BOS 1 is a breakover diode
- the switch SW 1 is a MOSFET
- the turn-off circuit 215 is a MOSFET.
- the first side of the Zener diode Z 1 is connected to the output 211 1 of the stage 210 1
- the second side of the Zener diode Z 1 is connected to the control inputs CI 1,1 through CI 1,m of the semiconductor devices S 1,1 through S 1,m .
- the first side of the breakover switch BOS 1 is connected to the resistor R 1
- the second side of the breakover switch BOS 1 is connected to the control inputs CI 1,1 through CI 1,m of the semiconductor devices S 1,1 through S 1,m .
- the collector of the MOSFET SW 1 is connected to the anode of the breakover diode BOS 1 , and the emitter is connected to the cathode of the breakover diode BOS 1 .
- the gate of the MOSFET SW 1 serves as a control input to selectively turn on the switch 200.
- the collector of the MOSFET 215 is connected to the control inputs CI 1,1 through CI 1,m of the semiconductor devices S 1,1 through S 1,m , and the emitter is connected to the output 211 1 of the control-triggered stage 210 1 .
- the gate of the MOSFET 215 serves as a control input to selectively turn off the switch 200.
- the control inputs into the MOSFETS SW 1 and 215 are low-power inputs, which allows for low-power control of the switch 200.
- the second through nth stages, 210 2 through 210 n are auto-triggered stages triggered by the control-triggered stage 210 1 .
- the stages 210 2 through 210 n are constructed similarly to the stage 210 1 but differ in that they do not include the switch SW 1 or the turn-off circuit 215.
- the second stage 210 2 comprises the semiconductor devices S 2,1 through S 2,m having respective control inputs CI 2,1 through CI 2,m , power inputs PI 2,1 through PI 2,m , and power outputs PO 2,1 through PP 2,m .
- the second stage 210 2 further comprises a capacitor C 2 , a suppressor Z 2 , a breakover switch BOS 2 , and a resistor R 2 .
- the power outputs PO 2,1 through PO 2,m of the semiconductor devices S 2,1 through S 2,m are connected to an output 212 1 of the second stage 210 2 .
- the output 211 2 of the second stage 210 2 is the input 212 1 of the first stage 210 1 .
- the second stage 210 2 is connected in series to the first stage 210 1 .
- a first side or end of the suppressor Z 2 is connected to the output 211 2 of the second stage 210 2 , as is a first side or end of the capacitor C 2 .
- a second side or end of the suppressor Z 2 is connected to the control inputs CI 2,1 through CI 2,m of the semiconductor devices S 2,1 through S 2,m and to a second side or end of the breakover switch BOS 2.
- a first side or end of the breakover switch BOS 2 is coupled to the power inputs PI 2,1 through PI 2,m of the semiconductor devices S 2,1 through S 2,m via the resistor R 2 .
- a second side or end of the capacitor C 2 is connected to the control input of the semiconductor devices of the next higher stage.
- the power inputs PI 2,1 through PI 2,m of the semiconductor devices S 2,1 through S 2,m are connected to the input 212 2 of the auto-triggered stage 210 2 , which input 212 2 is an output 211 3 of the next higher stage.
- stage 201 n comprises the semiconductor devices S n,1 through S n,m having respective control inputs CI n,1 through CI n,m , power inputs PI n,1 through PI n,m , and power outputs PO n,1 through PO n,m .
- the stage 201 n further comprises a capacitor C n , a suppressor Z n , a breakover switch BOS n , and a resistor R n .
- the second side or end of the capacitor C n is not connected to the control input of the semiconductor devices of the next higher stage as there is no next higher stage. Rather, the second side or end of the capacitor C n is connected to the input 212 n of the auto-triggered stage 210 n .
- This input 212 n is connected to an input 220 of the switch 200.
- the output 211 n of the auto-triggered stage 201 n is connected to the input of the next lowest stage, in this case an input 212 n-1 of the auto-triggered stage 210 n-1 (not illustrated).
- the suppressors Z 2 through Z n are Zener diodes
- the breakover switches BOS 2 through BOS n are breakover diodes.
- the first side of each of the Zener diodes Z 2 through Z n is connected to the respective output 211 2 through 211 n of the respective stage 210 2 through 210 n
- the second side of each of the Zener diodes Z 2 through Z n is connected to the respective control inputs of the respective semiconductor devices S 2 through S n .
- each of the breakover diodes BOS 2 through BOS n is connected to the respective resistor R 2 through R n
- the second side of each of the breakover diodes BOS 2 through BOS n is connected to the respective control inputs of the respective semiconductor devices S 2 through S n .
- the breakover switches BOS 1 through BOS n are identical, as are the respective components among the stages 210 1 through 210 n .
- the breakover switches BOS 1 through BOS n have a breakover voltage equal to V S /n+ ⁇ V where V S is the maximum voltage seen across the switch 200, n is the number of stages, and ⁇ V is a minimum acceptable difference in blocking voltage between a stage and its breakover switches.
- the breakover voltage of each of the breakover switches BOS 1 through BOS n is desirably ⁇ V greater than Vs/n, so that the switch 200 does not automatically turn on when Vs is applied at its input 220.
- each breakover switches BOS 1 through BOS n desirably has a breakover voltage greater than 1,000V.
- each breakover diode BOS 1 through BOS n desirably has a breakover voltage greater than V S /n but less than V S /(n-1), so that once one stage turns on, all stages turn on.
- the voltage drop V S /n across each stage is distributed over the suppressor, the breakover switch, and the resistor of each respective stage.
- the voltage across each stage 210 1 through 210 n is, respectively, ⁇ V S1 through ⁇ V Sn , each of which is equal to V S /n when the switch 200 is off. Current Is is then zero because the switch 200 is off because the stages 210 1 through 210 n are in a non-conducting (off) state.
- the voltage ⁇ V S1 through ⁇ V Sn across each stage 210 1 through 210 n when the switch 200 is turned on is, respectively V Saturation-1 through V Saturation-n , the voltages across each of the semiconductor devices S 1 through S n while in saturation.
- control-triggered stage 210 1 begins with each of the semiconductor devices S 1,1 through S 1,m in a non-conducting (off) state such that the stage 210 1 is in a non-conducting (off) state.
- the control-triggered stage 210 1 operates as follows during turn-on:
- the voltage at the power inputs PI 1,1 through PI 1,m of the semiconductor devices S 1,1 through S 1,m decreases, thereby pulling down the voltage at the input 212 1 of the control-triggered stage 210 1 and at the output 211 2 of the auto-triggered stage 210 2 .
- the voltage ⁇ V S1 across the stage 210 1 is V Saturation-1 after turn-on. Because the remaining stages 210 2 through 210 n are still in the off state and the total voltage V S across the switch 200 remains the same, the voltages ⁇ V S2 through ⁇ V Sn across respective stages 210 2 through 210 n increase after the switch SW 1 closes and the semiconductor devices S 1,1 through S 1,m turn on.
- the voltage ⁇ V S2 through ⁇ V Sn cross each respective stage 210 2 through 210 n is (V S -V Saturation-1 )/(n-1).
- the voltage ⁇ V S2 through ⁇ V Sn across each respective stage 210 2 through 210 n increases to (V S -V Saturation-1 )/(n-1), where (V S -V Saturation-1 )/(n-1)> V S /n because V Saturation-1 ⁇ V S /n.
- This increase in voltage ⁇ V S2 through ⁇ V Sn across each respective stage 210 2 through 210 n causes the stages 210 2 through 210 n to turn on by one of two ways: via turn-on of the breakover switches BOS 2 through BOS n or via the capacitors C 2 through C n discharging into the control inputs of their respective semiconductor devices.
- ⁇ V BOS2 through ⁇ V BOSn decreases because breakover switches BOS 2 through BOS n begin conducting.
- the semiconductor devices S 2 through S n turn on and go into saturation, the voltages at the power inputs of the semiconductor devices S 2 through S n decrease, thereby pulling down the respective voltages at the respective inputs 212 2 through 212 n of the respective stages 210 2 through 210 n .
- the voltages ⁇ V S2 through ⁇ V Sn across the respective stages 210 1 through 210 n are, respectively, V Saturation-2 through V Saturation-n after turn-on.
- the voltage at the power inputs PI 2,1 through PI 2,m of the semiconductor devices S 2,1 through S 2,m decrease, thereby pulling down the voltage at the input 212 2 of the auto-triggered stage 210 2 and at the output 211 3 of the auto-triggered stage 210 3 .
- the voltage ⁇ V S2 across the stage 210 2 is V Saturation-2 after turn-on. Because the remaining stages 210 3 through 210 n are still in the off state and the total voltage V S across the switch 200 remains the same, the voltages ⁇ V S3 through ⁇ V Sn across respective stages 210 3 through 210 n increase after the auto-triggered stage 210 2 turns on.
- the capacitor C 3 begins to discharge into the control inputs CI 3,1 through CI 3,m of the semiconductor devices S 3,1 through S 3,m.
- the auto-triggered stages 210 3 through 210 n start to cascade on according to the second auto turn-on procedure. However, turn-on of any of the auto-triggered stages 210 3 through 210 n progresses according to the first turn-on procedure if the voltages across the remaining breakover switches are exceeded. Thus, cascading turn-on may shift to simultaneous turn-on once the breakover voltages of the remaining breakover switches are exceeded.
- the suppressors Z 1 through Z n provide protection for the control-input-to-power-output junctions of the semiconductor devices S 1 through S n against overcurrent and overvoltage during switching of the switch 200 on and off.
- the breakover switches BOS 1 through BOS n also provide protection for each of the levels 210 1 through 210 n from overvoltage when the switch 200 is off and while it is being turned on. Protection from overvoltage during turn-on is desirable as the voltages across levels that are not on increase as other levels are turned on. Thus, the switch 200 is able to handle voltages V S in the level of 10s of kilovolts.
- the semiconductor devices S 1 through S n are desirably distributed m per stage, although differing numbers of semiconductor devices per stage are contemplated.
- the current Is is divided across m semiconductors in each of stages 210 1 through 210 n . Accordingly, the switch 200 is able to handle currents Is in the level of 10s of kiloamps.
- the turn-off circuit 215 In response to a control signal, for example supplied to the turn-off circuit 215, the turn-off circuit 215 provides a negative-voltage signal to the control inputs CI 1,1 through GI 1,m of the semiconductor devices S 1,1 through S 1,m , for example by pulling the control inputs to ground 140.
- Negative current from the control inputs GI 2,1 through CI 2,m of the semiconductor devices S 2,1 through S 2,m charges the capacitor C 1 providing a negative-voltage signal to the control inputs CI 2,1 through CI 2,m of the semiconductor devices S 2,1 through S 2,m .
- Steps (c) through (e) repeat for each next higher stage, so that the stages 210 3 through 210 n cascade off until all of the stages of the switch 200 are turned off.
- Turn-on and turn-off of the switch 200 does not require the use of a pulse transformer for each stage 210 1 through 210 n .
- pulse transformers are bulky and require isolation from one another, increasing the size and complexity of the switch. Further, pulse transformers have non-negligible inductance, which is not desirable for high voltage, high current switches. Finally, pulse transformers provide pulses of short time periods, which may not be long enough to turn on the semiconductor devices S 1 through S n .
- the switch 200 By using breakover switches BOS 1 through BOS n and capacitors connecting the output of one level to the control inputs of the semiconductor devices of another lover, the switch 200 provides for very fast turn-on and turn-off and avoids the use of pulse transformers. Inductance in the switch 200 is reduced and the control inputs of the semiconductor devices S 1 through S n may be kept at a negative voltage for as long as is needed to turn them on. For a six level device, turn-on time may be 200 nanoseconds.
- the semiconductor devices S 1 through S n are IGBTs.
- they are MOSFETs.
- they are SCRs.
- they are gate turn-off thyristors (GTOs).
- GTOs gate turn-off thyristors
- they are MOS controlled thyristors or light-controlled thyristors.
- the anodes or collectors of such devices are the power inputs, as that term is used herein, the cathodes or emitters of such devices are the power outputs, as that term is used herein, and the gates of such devices are the control inputs, as that term is used herein.
- the semiconductor devices S 1 through S n desirably have low output impedances when on.
- the semiconductor devices S 1 through S n desirably have output impedances in the milliohm region, and, when off, they desirably have output impedances greater than 5,000 ohms.
- the input impedances of the semiconductor devices S 1 through S n depend on the type of semiconductor device employed. If the semiconductor devices S 1 through S n are MOSFETs, then the input impedances are in the megohm region. If they are thyristors, then the input impedances are in the milliohm region.
- the switch 200 may include the suppressors Z 1 through Z n to protect the semiconductor devices S 1 through S n against overcurrent and overvoltage during turn-on and turn-off.
- the semiconductor devices S 1 through S n include gate-to-cathode junctions, and the suppressors Z 1 through Z n provide protection for these gate-to-cathode junctions against overcurrent and overvoltage during switching of the switch 200 on and off. It is to be understood that other embodiments of the switch 200 are contemplated in which the suppressors Z 1 through Z n are not included.
- breakover switches BOS 1 through BOS n also provide protection for each of the levels 210 1 through 210 n from overvoltage when the switch 200 is off and while it is being turned on. Protection from overvoltage during turn-on is desirable as the voltages across levels that are not on increase as other levels are turned on. Thus, the switch 200 is able to handle voltages V S in the level of 10s of kilovolts.
- the energy storage device 120 is a capacitor.
- FIG. 3 illustrates the waves for the voltage V S across an exemplary embodiment of the energy storage device 120 and the current Is supplied by the exemplary energy storage device 120 as an exemplary embodiment of the switch 200 is turned on, in accordance with an exemplary embodiment of the present invention.
- the energy storage device 120 is a 0.15 ⁇ F capacitor.
- V S is 4.92kV and Is is 0A.
- a command signal is sent to the switch SW 1 to close, beginning the turn-on process of the exemplary switch 200.
- time t 1 corresponding to 40 ns, the exemplary switch 200 is fully turned on, and the exemplary energy storage device 120 begins discharging.
- I S increases to a maximum of 2.04kA at time t 2 , corresponding to 48 ns.
- V S and Is then oscillate until settling at zero.
- FIG. 4 illustrates the waves for the voltage V S across another exemplary embodiment of the energy storage device 120 and the current Is supplied by the exemplary energy storage device 120 as another exemplary embodiment of the switch 200 is turned on and then turned off, in accordance with an exemplary embodiment of the present invention.
- V S prior to the exemplary switch 200 closing, V S is about 1.4kV and Is is 0A.
- the exemplary switch 200 is fully turned on, and the exemplary energy storage device 120 begins discharging.
- I S increases to a maximum of 100A at time t 2 , at which time the exemplary switch 200 is provided with a turn-off signal via the turn-off circuit 215.
- the exemplary switch 200 turns off, as described above. As the exemplary switch 200 turns off, Is decreases, and V S spikes to 5.4kV at time t 3 before returning to 1.4kV when the exemplary switch 200 is fully closed.
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Abstract
Description
- The present invention relates to a solid state switch and, more specifcally, to a solid state switch having a plurality of switch levels connected in series, each level having a plurality of semiconductors connected in parallel and to a method of triggering the solid state switch.
- Switching high current and high voltage is required in some applications in military, medical, and commercial devices and systems. Depending upon on the application, a switching device may be required to switch tens of kilovolts and tens of kiloamperes. Devices for switching such high current and high voltage have been proposed to include a plurality of levels connected in series, each level having a plurality of high-power semiconductor switching devices connected in parallel. Each semiconductor includes a gate and a driver of the gate. To control these devices, the gate driver has special requirements such as high voltage isolation between levels, minimum delay time in gate pulses from one level to another, overvoltage protection, and sharing voltage protection.
- Many drive circuits use pulse transformers in the gate circuitry to isolate one level of the switch from another. Because the switch comprises many semiconductors in series and in parallel, these pulse transformers become very large, costly, and impractical. In addition pulse transformers must be shielded to avoid external magnetic field pick up which could create unwanted low level gate pulses and, as a result, cause misfiring, which may destroy devices connected to the switch.
- In response, methods have been developed using power stored in a capacitor floating with the device for the trigger energy. These methods use low-power triggers for a low-power solid state device that discharges the capacitor into the gate of the high-power semiconductor switching device. While still requiring a pulse transformer, because of the lower energy requirements in the gate circuitry, the switching device can be smaller. General examples of these switching devices are described in
U.S. Pat. Nos. 5,444,610 and5,646,833 . - Other methods for switching the high-power semiconductor switching devices have been proposed.
U.S. Pat. Nos. 6,396.672 and6,710,994 describe a power electronic switch circuit that includes a silicon-controlled rectifier and a gate trigger circuit coupled to the gate of the silicon-controlled rectifier (SCR). A snubber capacitor is coupled to the anode and cathode of the SCR. Energy stored in the snubber capacitor provides the necessary energy to power the gate trigger circuit to trigger the SCR. -
U.S. Pat. No. 6,624,684 describes a compact method for triggering thyristors connected in series using energy stored in a pulse forming network coupled to the gate of each thyristor. Each pulse forming network is coupled to a snubber circuit that, together with the pulse forming network, acts as a snubber capacitor to limit the dv/dt imposed on the thyristor, thereby preventing spurious turn-on of the thyristor. The pulse forming network provides current to the gate of the thyristor through a gate switch to turn on the thyristor while the snubber circuit provides a source of fast rising current to the anode of the thyristor to speed up turn-on as it discharges through the anode of the thyristor. Either a low-power electrical signal through a pulse transformer or an optical signal can be used to trigger the gate switch. -
U.S. Pat. Nos. 5,933,335 and5,180,963 provide examples of an optically triggered switch. InU.S. Pat. 5,180,963 , there is described an optically triggered solid state switch. The switch uses an optical signal for each set of two high power solid state devices. The optical signal triggers a phototransistor, which in turn triggers a low power solid state device. The low power solid state device then discharge a capacitor through a pulse transformer, producing signals in the gates of two high power solid state devices to turn on the devices. -
U.S. Pat. No. 7,072,196 describes a method of turning on a high voltage solid state switch that comprises a set of solid state devices, such as thyristors, connected in series. The switch comprises a snubber circuit coupled to the anode and cathode of each solid state device to speed up turn-on. - According to an exemplary aspect of the present invention there is provided a semiconductor switching device having a control-triggered stage and one or more auto-triggered stages connected in series. The control-triggered stage includes one or more semiconductor switches connected in parallel, a breakover switch comprising a first end and a second end, and a control switch connected across the breakover switch. Each semiconductor switch includes a power input, a power output, and a control input. The first end of the breakover switch is coupled to the power input of each semiconductor switch, and the second end of the breakover switch is coupled to the control input of each semiconductor switch. Each auto-triggered stage includes one or more semiconductor switches connected in parallel and a breakover switch comprising a first end and a second end. Each semiconductor switch of each auto-triggered stage includes a power input, a power output, and a control input. The first end of the breakover switch of the each auto-triggered stage is coupled to the power input of each semiconductor switch of the each auto-triggered stage, and the second end of the breakover switch of the each auto-triggered stage is coupled to the control input of each semiconductor switch of the each auto-triggered stage. The control-triggered stage is connected in series with the one or more auto-triggered stages.
- According to another exemplary aspect of the present invention there is provided a high voltage circuit having an energy storage device, a load, a power supply coupled across the energy storage device, and a semiconductor switching device for coupling the energy storage device across the load. The semiconductor switching device includes a control-triggered stage and one or more auto-triggered stages connected in series. The control-triggered stage includes one or more semiconductor switches connected in parallel, a breakover switch comprising a first end and a second end, and a control switch connected across the breakover switch. Each of the semiconductor switches includes a power input, a power output, and a control input. The first end of the breakover switch is coupled to the power input of each semiconductor switch, and the second end of the breakover switch is coupled to the control input of each semiconductor switch. Each auto-triggered stage includes one or more semiconductor switches connected in parallel and a breakover switch comprising a first end and a second end. Each semiconductor switch of each auto-triggered stage includes a power input, a power output, and a control input. The first end of the breakover switch of the each auto-triggered stage is coupled to the power input of each semiconductor switch of the each auto-triggered stage, and the second end of the breakover switch of the each auto-triggered stage is coupled to the control input of each semiconductor switch of the each auto-triggered stage. The control-triggered stage is connected in series with the one or more auto-triggered stages.
- For the purpose of illustration, there are shown in the drawings certain embodiments of the present invention. In the drawings, like numerals indicate like elements throughout. It should be understood, however, that the invention is not limited to the precise arrangements, dimensions, and instruments shown. In the drawings:
-
FIG. 1 illustrates an exemplary embodiment of a system for providing pulsed power to a load, the system comprising a power source, an energy storage device, and a semiconductor switching device, in accordance with an exemplary embodiment of the present invention; -
FIG. 2 illustrates an exemplary embodiment of the semiconductor switching device ofFIG. 1 , in accordance with an exemplary embodiment of the present invention; -
FIG. 3 illustrates exemplary waveforms for voltage and current provided by the energy storage device ofFIG. 1 during turn-on of the semiconductor switching device, in accordance with an exemplary embodiment of the present invention; and -
FIG. 4 illustrates exemplary waveforms for voltage and current provided by the energy storage device ofFIG. 1 during turn-off of the semiconductor switching device, in accordance with an exemplary embodiment of the present invention. - As described above, various conventional high voltage, high current solid state switches have been proposed. Some of the conventional high voltage, high current solid state switches comprise one or more solid state devices, such as thyristors, across which a snubber circuit is coupled. The snubber circuit facilitates turn-on of the solid state device but limits using an insulated-gate bipolar transistor (IGBT) or a metal oxide field effects transistor (MOSFET) as the solid state devices because IGBTs and MOSFETs are normally used in snubberless circuits.
- Other conventional high voltage, high current solid state switches use pulse transformers to drive the one or more solid state devices. Pulse transformers, however, are not desirable as they increase the inductance of the solid state switches. Further, the primary winding wire of the trigger transformer conducts the same current that the one or more solid state devices conduct. With wide pulse duration and high load current, the primary winding wire becomes very thick, and the trigger transformer becomes very big and insufficient.
- The conventional solid state switches which use snubber circuits or pulse transformers are disadvantageous for additional reasons. Typically, a solid state switch operates in a very narrow range of voltage, usually between Vswitch - Vswitch/Nlevels and Vswitch. The The value of the snubber parameters and the design of the trigger transformer must be selected to avoid auto triggering of the switch during the charging phase. Unwanted turn-on may happen if any unexpected voltage spikes in initial dv/dt occur.
- In all of the above-mentioned switches, pulse transformers, multiple phototransistors, and other components are required for each high power solid state device being triggered. With many semiconductors in series and in parallel, the multitude of triggering devices required become very large, thereby increasing the cost, size, and expense of the solid state switch. The size and expense may become impractical if the number of solid state devices is large. Furthermore, if pulse transformers are use, the pulse transformers must be shielded to avoid external magnetic field pick-up, which could create unwanted low-level gate pulses and, as a result, cause misfiring and destroy the solid state devices. Shielding further increases the size and expense of the solid state switch.
- Referring now to
FIG. 1 , there is illustrated asystem 100 for use in a pulsed power application, in accordance with an exemplary embodiment of the present invention. Thesystem 100 comprises apower source 110, anenergy storage device 120, aload 130, and aswitch 200. Thepower source 110 is coupled to theenergy storage device 120 and toground 140. Theswitch 200 is coupled to theenergy storage device 120 and toground 140. The load is coupled to theenergy storage device 120 and toground 140. - During use of the
system 100, theswitch 200 is initially open, and thepower source 110 charges theenergy storage device 120. When theenergy storage device 120 has been charged to a desired level, thepower source 110 may be disabled or disconnected from thedevice 120. - When power is desired to be delivered to the
load 130, theswitch 200 is closed, and the charge stored in theenergy storage device 120 discharges into theload 130. The charging time of theenergy storage device 120 may be two or more orders of magnitude greater than the discharge time thereof. Thus, the current supplied to the load via theswitch 200 may be many times that of the current supplied to theenergy storage device 120 during charge up by thepower source 110. Exemplary embodiments of theenergy storage device 120 include one or more capacitors, one or more transmission lines, or a pulse forming network. Exemplary values of the voltage and current provided by theenergy storage device 120 during discharge are, respectively, tens of kilovolts and ten of kiloamperes, making the system 100 a high voltage, high current circuit. - In the
system 100, each of thepower source 110, theswitch 200, and theload 130 is connected toground 140. It is to be understood fromFIG. 1 that alternative embodiments of thesystem 100 are contemplated. For example, in an exemplary alternative embodiment, the positions of theswitch 200 and theenergy storage device 120 are switched. - Illustrated in
FIG. 2 is a circuit diagram for theswitch 200 ofFIG. 1 , in accordance with an exemplary embodiment of the present invention. Theswitch 200 is used for switching a current Is provided by theenergy storage device 120 at a voltage VS. As noted above, the current Is may be tens of kiloamperes, and the voltage VS may be tens of kilovolts. - The
switch 200 comprises a plurality of levels or stages, respectively designated as 2101, 2102,..., 210n, connected in series. In the exemplary embodiment of theswitch 200 illustrated inFIG. 2 , there are n stages 2101 through 210n. By using a plurality of stages 2101 through 210n, theswitch 200 divides the source voltage VS over n stages so that VS/n is less than the maximum permissible voltage across any of the stages 2101 through 210n. Thus, theswitch 200 has a higher voltage hold-off capability than it would have had it had only one stage, and each stage is protected from overvoltage. - Each stage comprises a plurality of solid state semiconductor switches or devices, respectively designated as Sx,y, connected in parallel, where x refers to any of stages 2101 through 210n and y refers to the semiconductor devices in each stage. In the exemplary embodiment of the
switch 200 illustrated inFIG. 2 , the first stage 2101 comprises m semiconductor devices S1,1 through S1,m connected in parallel (herein, "S1" is used as shorthand to refer to the plurality of semiconductor devices S1,1 through S1,m in the stage 2101); the second stage 2102 comprises m semiconductor devices S2,1 through S2,m connected in parallel (herein, "S2" is used as shorthand to refer to the plurality of semiconductor devices S2,1 through S2,m in the stage 2101); and the nth stage 210n comprises m semiconductor devices Sn,1 through Sn,m connected in parallel (herein, "Sn" is used as shorthand to refer to the plurality of semiconductor devices Sn,1 through Sn,m in the stage 210n). By using a plurality of m semiconductor devices in each stage, theswitch 200 divides the input current Is by m. Thus, each stage 2101 through 210n and, specifically, each semiconductor device Sx,y is protected from overcurrent. - In the exemplary embodiment illustrated in
FIG. 2 , the first stage 2101 is a control-triggered stage used to control the turn-on and turn-off of the stages 2102 through 210n and thereby of theswitch 200.FIG. 2 illustrates that the control-triggered stage 2101 is the first or bottommost stage and connected toground 140. It is to be understood that the control-triggered stage 2101 need not be so located and could be positioned in the place of any of the other stages 2102 through 210n in theswitch 200. - The control-triggered stage 2101 comprises the semiconductor devices S1,1 through S1,m having respective control inputs CI1,1 through CI1,m power inputs PI1,1 through PI1,m, and power outputs PO1,1 through PO1,m. The power outputs PO1,1 through PO1,m are connected to an output 2111 of the control-triggered stage 2101 which is at
ground 140. The control-triggered stage 2101 further comprises a capacitor C1, a turn-off circuit 215, and a suppressor Z1. A first side or end of the suppressor Z1 is connected to the output 2111, as is a first side or end of the capacitor C1 and afirst end 215A of the turn-off circuit 215. A second side or end of the capacitor C1 is connected to the control inputs CI2,1 through CI2,m of the semiconductor devices S2,1 through S2,m of the second stage. A second side or end of the suppressor Z1 is connected to the control inputs CI1,1 through CI1,m of the semiconductor devices S1,1 through S1,m, as is asecond end 215B of the turn-off circuit 215. - The control-triggered stage 2101 further comprises a breakover switch BOS1, a second side or end of which is coupled to the second side of the suppressor Z1. A first side or end of the breakover switch BOS1 is coupled to the power inputs PI1,1 through PI1,m of the semiconductor devices S1,1 through S1,m via a resistor R1. The power inputs PI1,1 through PI1,m, of the semiconductor devices S1,1 through S1,m are connected to an
input 2121 of the control-triggered stage 2101. A switch SW1 is disposed in the control-triggered stage 2101 across the breakover switch BOS1. - In an exemplary embodiment, the suppressor Z1 is a Zener diode, the breakover switch BOS1 is a breakover diode, the switch SW1 is a MOSFET, and the turn-
off circuit 215 is a MOSFET. The first side of the Zener diode Z1, its anode, is connected to the output 2111 of the stage 2101, and the second side of the Zener diode Z1, its cathode, is connected to the control inputs CI1,1 through CI1,m of the semiconductor devices S1,1 through S1,m. The first side of the breakover switch BOS1, its anode, is connected to the resistor R1, and the second side of the breakover switch BOS1, its cathode, is connected to the control inputs CI1,1 through CI1,m of the semiconductor devices S1,1 through S1,m. - In this exemplary embodiment, the collector of the MOSFET SW1 is connected to the anode of the breakover diode BOS1, and the emitter is connected to the cathode of the breakover diode BOS1. The gate of the MOSFET SW1 serves as a control input to selectively turn on the
switch 200. The collector of theMOSFET 215 is connected to the control inputs CI1,1 through CI1,m of the semiconductor devices S1,1 through S1,m, and the emitter is connected to the output 2111 of the control-triggered stage 2101. The gate of theMOSFET 215 serves as a control input to selectively turn off theswitch 200. The control inputs into the MOSFETS SW1 and 215 are low-power inputs, which allows for low-power control of theswitch 200. - Still referring to
FIG. 2 , the second through nth stages, 2102 through 210n, are auto-triggered stages triggered by the control-triggered stage 2101, The stages 2102 through 210n are constructed similarly to the stage 2101 but differ in that they do not include the switch SW1 or the turn-off circuit 215. - The second stage 2102 comprises the semiconductor devices S2,1 through S2,m having respective control inputs CI2,1 through CI2,m, power inputs PI2,1 through PI2,m, and power outputs PO2,1 through PP2,m. The second stage 2102 further comprises a capacitor C2, a suppressor Z2, a breakover switch BOS2, and a resistor R2. The power outputs PO2,1 through PO2,m of the semiconductor devices S2,1 through S2,m are connected to an
output 2121 of the second stage 2102. The output 2112 of the second stage 2102 is theinput 2121 of the first stage 2101. Thus, the second stage 2102 is connected in series to the first stage 2101. - A first side or end of the suppressor Z2 is connected to the output 2112 of the second stage 2102, as is a first side or end of the capacitor C2. A second side or end of the suppressor Z2 is connected to the control inputs CI2,1 through CI2,m of the semiconductor devices S2,1 through S2,m and to a second side or end of the breakover switch BOS2. A first side or end of the breakover switch BOS2 is coupled to the power inputs PI2,1 through PI2,m of the semiconductor devices S2,1 through S2,m via the resistor R2. A second side or end of the capacitor C2 is connected to the control input of the semiconductor devices of the next higher stage. The power inputs PI2,1 through PI2,m of the semiconductor devices S2,1 through S2,m are connected to the
input 2122 of the auto-triggered stage 2102, whichinput 2122 is an output 2113 of the next higher stage. - Each next higher stage through to stage n-1 is configured the same as the stage 2102 (stage 2). The last stage, stage 201n comprises the semiconductor devices Sn,1 through Sn,m having respective control inputs CIn,1 through CIn,m, power inputs PIn,1 through PIn,m, and power outputs POn,1 through POn,m. The stage 201n further comprises a capacitor Cn, a suppressor Zn, a breakover switch BOSn, and a resistor Rn. These components are connected in the same manner as those in the auto-triggered stage 2102, except that the second side or end of the capacitor Cn is not connected to the control input of the semiconductor devices of the next higher stage as there is no next higher stage. Rather, the second side or end of the capacitor Cn is connected to the
input 212n of the auto-triggered stage 210n. Thisinput 212n is connected to aninput 220 of theswitch 200. As with the other auto-triggered stages, the output 211n of the auto-triggered stage 201n is connected to the input of the next lowest stage, in this case aninput 212n-1 of the auto-triggered stage 210n-1 (not illustrated). - In an exemplary embodiment, for each of the stages 2102 through 210n, the suppressors Z2 through Zn are Zener diodes, and the breakover switches BOS2 through BOSn are breakover diodes. The first side of each of the Zener diodes Z2 through Zn, its anode, is connected to the respective output 2112 through 211n of the respective stage 2102 through 210n, and the second side of each of the Zener diodes Z2 through Zn, its cathode, is connected to the respective control inputs of the respective semiconductor devices S2 through Sn. The first side of each of the breakover diodes BOS2 through BOSn, its anode, is connected to the respective resistor R2 through Rn, and the second side of each of the breakover diodes BOS2 through BOSn, its cathode, is connected to the respective control inputs of the respective semiconductor devices S2 through Sn.
- As further shown in
FIG. 2 , the breakover switches BOS1 through BOSn are identical, as are the respective components among the stages 2101 through 210n. The breakover switches BOS1 through BOSn have a breakover voltage equal to VS/n+ΔV where VS is the maximum voltage seen across theswitch 200, n is the number of stages, and ΔV is a minimum acceptable difference in blocking voltage between a stage and its breakover switches. The breakover voltage of each of the breakover switches BOS1 through BOSn is desirably ΔV greater than Vs/n, so that theswitch 200 does not automatically turn on when Vs is applied at itsinput 220. For example, if theswitch 200 comprises 5 levels, and VS is 5,000V, the maximum voltage across each stage is 1,000V, and each breakover switches BOS1 through BOSn desirably has a breakover voltage greater than 1,000V. For example, the breakover voltage may be 1,007V so that ΔV=7V. - Turn-on and turn-off of the control-triggered stage 2101 is now described. In its initial state, the
switch 200 is open and a voltage VS is present at itsinput 220 by theenergy storage device 120. The voltage drop across each stage is equal to Vs/n, and each capacitor C1 through Cn is fully charged. Each breakover diode BOS1 through BOSn desirably has a breakover voltage greater than VS/n but less than VS/(n-1), so that once one stage turns on, all stages turn on. The voltage drop VS/n across each stage is distributed over the suppressor, the breakover switch, and the resistor of each respective stage. - Turn-on of the control-triggered stage 2101 and the auto-triggered stages 2102 through 210n is now described. In the description below, the voltage across each stage 2101 through 210n is, respectively, ΔVS1 through ΔVSn, each of which is equal to VS/n when the
switch 200 is off. Current Is is then zero because theswitch 200 is off because the stages 2101 through 210n are in a non-conducting (off) state. The voltage ΔVS1 through ΔVSn across each stage 2101 through 210n when theswitch 200 is turned on is, respectively VSaturation-1 through VSaturation-n, the voltages across each of the semiconductor devices S1 through Sn while in saturation. Current Is is then non-zero because theswitch 200 is on because all of the stages 2101 through 210n are conducting, i.e., in an on state. Theswitch 200 is not turned on until each stage 2101 through 210n is conducting (turned on). - Turn-on of the control-triggered stage 2101 begins with each of the semiconductor devices S1,1 through S1,m in a non-conducting (off) state such that the stage 2101 is in a non-conducting (off) state. The control-triggered stage 2101 operates as follows during turn-on:
- a) In response to a control signal, for example supplied to the switch SW1, the switch SW1 across the breakover switch BOS1 is closed, thereby shorting the first side of the breakover switch BOS1 to its second side.
- b) The voltage drop ΔVS1 across the stage 2101 instantaneously decreases slightly and is redistributed over the resistor R1 and the suppressor Z1.
- c) The voltage at the control inputs CI1,1 through CI1,m of the semiconductor devices S1,1 through S1,m instantaneously increases, i.e., a positive voltage pulse is provided to control inputs CI1,1 through CI1,m of the semiconductor devices S1,1 through S1,m.
- d) The positive voltage pulse at the control inputs CI1,1 through CI1,m of the semiconductor devices S1,1 through S1,m turns on the semiconductor devices S1,1 through S1,m and places them into saturation. The control-triggered stage 2101 is thereby turned on.
- Because the semiconductor devices S1,1 through S1,m turn on and go into saturation, the voltage at the power inputs PI1,1 through PI1,m of the semiconductor devices S1,1 through S1,m decreases, thereby pulling down the voltage at the
input 2121 of the control-triggered stage 2101 and at the output 2112 of the auto-triggered stage 2102. The voltage ΔVS1 across the stage 2101 is VSaturation-1 after turn-on. Because the remaining stages 2102 through 210n are still in the off state and the total voltage VS across theswitch 200 remains the same, the voltages ΔVS2 through ΔVSn across respective stages 2102 through 210n increase after the switch SW1 closes and the semiconductor devices S1,1 through S1,m turn on. - After the stage 2101 is turned on, the voltage ΔVS2 through ΔVSn cross each respective stage 2102 through 210n is (VS-VSaturation-1)/(n-1). In other words, the voltage ΔVS2 through ΔVSn across each respective stage 2102 through 210n increases to (VS-VSaturation-1)/(n-1), where (VS-VSaturation-1)/(n-1)> VS/n because VSaturation-1<VS/n. This increase in voltage ΔVS2 through ΔVSn across each respective stage 2102 through 210n causes the stages 2102 through 210n to turn on by one of two ways: via turn-on of the breakover switches BOS2 through BOSn or via the capacitors C2 through Cn discharging into the control inputs of their respective semiconductor devices.
- Following turn-on of the control-triggered stage 2101, if the voltage ΔVS2 through ΔVSn across each of the respective stages 2102 through 210n causes the voltage ΔVBOS2 through ΔVBOSn across each respective breakover switch BOS2 through BOSn to exceed the breakover voltage (VS/n+ΔV) of each of the breakover switches BOS2 through BOSn, turn-on of the auto-triggered stages 2102 through 210n proceeds as follows ("the first auto turn-on procedure"):
- a) Each of the breakover switches BOS2 through BOSn begins conducting at the same time.
- b) ΔVBOS2 through ΔVBOSn decreases because breakover switches BOS2 through BOSn begin conducting.
- c) The voltage drops ΔVS2 through ΔVSn across the respective stages 2102 through 210n instantaneously redistribute over the respective resistors R2 through Rn and the suppressors Z2 through Zn.
- d) The voltages at the control inputs of the semiconductor devices S2 through Sn instantaneously increase, i.e., positive voltage pulses are provided to control inputs of the semiconductor devices S2 through Sn.
- e) The positive voltage pulses at the control inputs CI2,1 through CI2,m of the semiconductor devices S2 through Sn turn on the semiconductor devices S2 through Sn and place them into saturation.
- f) Because the semiconductor devices S2 through Sn turn on and go into saturation, the voltages at the power inputs of the semiconductor devices S2 through Sn decrease, thereby pulling down the respective voltages at the
respective inputs 2122 through 212n of the respective stages 2102 through 210n. The voltages ΔVS2 through ΔVSn across the respective stages 2101 through 210n are, respectively, VSaturation-2 through VSaturation-n after turn-on. - g) The voltage ΔVS across the
switch 200 decreases to VSaturation-1 + VSaturation-2 +...+ VSaturation-n and IS increases from zero. - Following turn-on of the control-triggered stage 2101, if the voltage ΔVS2 through ΔVSn across each of the respective stages 2102 through 210n does not cause the voltage ΔVBOS2 through ΔVBOSn across each respective breakover switch BOS2 through BOSn to exceed the breakover voltage (VS/n+ΔV) of each of the breakover switches BOS2 through BOSn, turn-on of the auto-triggered stage 2102 proceeds as follows ("the second auto turn-on procedure"):
- a) After the control-input stage 2101 turns on, the voltage ΔVS1 decreases to VSaturation-1 and the voltages ΔVS2 through ΔVSn across the remaining stages increase to (VS-VSaturation-1)/(n-1).
- b) The voltages across the resistor R2, the breakover switch BOS2, and the suppressor Z2 increase.
- c) The capacitor C2 discharges into the control inputs CI2,1 through CI2,m of the semiconductor devices S2,1 through S2,m.
- d) The semiconductor devices S2,1 through S2,m turn on and go into saturation. The auto-triggered stage 2102 is thereby turned on.
- Because the semiconductor devices S2,1 through S2,m turn on and go into saturation, the voltage at the power inputs PI2,1 through PI2,m of the semiconductor devices S2,1 through S2,m, decrease, thereby pulling down the voltage at the
input 2122 of the auto-triggered stage 2102 and at the output 2113 of the auto-triggered stage 2103. The voltage ΔVS2 across the stage 2102 is VSaturation-2 after turn-on. Because the remaining stages 2103 through 210n are still in the off state and the total voltage VS across theswitch 200 remains the same, the voltages ΔVS3 through ΔVSn across respective stages 2103 through 210n increase after the auto-triggered stage 2102 turns on. - After the auto-triggered stage 2102 turns on according to the second auto turn-on procedure, the capacitor C3 begins to discharge into the control inputs CI3,1 through CI3,m of the semiconductor devices S3,1 through S3,m. The auto-triggered stages 2103 through 210n start to cascade on according to the second auto turn-on procedure. However, turn-on of any of the auto-triggered stages 2103 through 210n progresses according to the first turn-on procedure if the voltages across the remaining breakover switches are exceeded. Thus, cascading turn-on may shift to simultaneous turn-on once the breakover voltages of the remaining breakover switches are exceeded.
- The suppressors Z1 through Zn provide protection for the control-input-to-power-output junctions of the semiconductor devices S1 through Sn against overcurrent and overvoltage during switching of the
switch 200 on and off. The breakover switches BOS1 through BOSn also provide protection for each of the levels 2101 through 210n from overvoltage when theswitch 200 is off and while it is being turned on. Protection from overvoltage during turn-on is desirable as the voltages across levels that are not on increase as other levels are turned on. Thus, theswitch 200 is able to handle voltages VS in the level of 10s of kilovolts. - As noted above, the semiconductor devices S1 through Sn are desirably distributed m per stage, although differing numbers of semiconductor devices per stage are contemplated. Thus, the current Is is divided across m semiconductors in each of stages 2101 through 210n. Accordingly, the
switch 200 is able to handle currents Is in the level of 10s of kiloamps. - Turn-off of the
switch 200 proceeds as follows: - a) In response to a control signal, for example supplied to the turn-
off circuit 215, the turn-off circuit 215 provides a negative-voltage signal to the control inputs CI1,1 through GI1,m of the semiconductor devices S1,1 through S1,m, for example by pulling the control inputs toground 140. - b) The negative voltage pulse at the control inputs CI1,1 through CI1,m of the semiconductor devices S1,1 through S1,m turns of the semiconductor devices S1,1 through S1,m.
- c) Because the semiconductor devices S1,1 through S1,m turn off, the voltage at the power inputs PI1,1 through PI1,m of the semiconductor devices S1,1 through S1,m increases, thereby causing the voltage at the
input 2121 of the control-triggered stage 2101 and at the output 2112 of the auto-triggered stage 2102 to rise. The voltage ΔVS1 across the stage 2101 increases, and the voltage ΔVS2 across the stage 2102 decreases. - d) Negative current from the control inputs GI2,1 through CI2,m of the semiconductor devices S2,1 through S2,m charges the capacitor C1 providing a negative-voltage signal to the control inputs CI2,1 through CI2,m of the semiconductor devices S2,1 through S2,m.
- e) The semiconductor devices S2,1 through S2,m turn off.
- f) Steps (c) through (e) repeat for each next higher stage, so that the stages 2103 through 210n cascade off until all of the stages of the
switch 200 are turned off. - Turn-on and turn-off of the
switch 200 does not require the use of a pulse transformer for each stage 2101 through 210n. As noted above, pulse transformers are bulky and require isolation from one another, increasing the size and complexity of the switch. Further, pulse transformers have non-negligible inductance, which is not desirable for high voltage, high current switches. Finally, pulse transformers provide pulses of short time periods, which may not be long enough to turn on the semiconductor devices S1 through Sn. - By using breakover switches BOS1 through BOSn and capacitors connecting the output of one level to the control inputs of the semiconductor devices of another lover, the
switch 200 provides for very fast turn-on and turn-off and avoids the use of pulse transformers. Inductance in theswitch 200 is reduced and the control inputs of the semiconductor devices S1 through Sn may be kept at a negative voltage for as long as is needed to turn them on. For a six level device, turn-on time may be 200 nanoseconds. - Various types of semiconductor devices are contemplated for the semiconductor devices S1 through Sn. For example, in an exemplary embodiment, the semiconductor devices S1 through Sn are IGBTs. In another embodiment, they are MOSFETs. In yet another embodiment, they are SCRs. In still another embodiment, they are gate turn-off thyristors (GTOs). In a further embodiment, they are MOS controlled thyristors or light-controlled thyristors. It is to be understood that the anodes or collectors of such devices are the power inputs, as that term is used herein, the cathodes or emitters of such devices are the power outputs, as that term is used herein, and the gates of such devices are the control inputs, as that term is used herein.
- The semiconductor devices S1 through Sn desirably have low output impedances when on. For example, in an exemplary embodiment, the semiconductor devices S1 through Sn desirably have output impedances in the milliohm region, and, when off, they desirably have output impedances greater than 5,000 ohms. The input impedances of the semiconductor devices S1 through Sn depend on the type of semiconductor device employed. If the semiconductor devices S1 through Sn are MOSFETs, then the input impedances are in the megohm region. If they are thyristors, then the input impedances are in the milliohm region.
- In the embodiments of the
switch 200 described herein, theswitch 200 may include the suppressors Z1 through Zn to protect the semiconductor devices S1 through Sn against overcurrent and overvoltage during turn-on and turn-off. In an exemplary embodiment, the semiconductor devices S1 through Sn include gate-to-cathode junctions, and the suppressors Z1 through Zn provide protection for these gate-to-cathode junctions against overcurrent and overvoltage during switching of theswitch 200 on and off. It is to be understood that other embodiments of theswitch 200 are contemplated in which the suppressors Z1 through Zn are not included. - It is further to be understood that the breakover switches BOS1 through BOSn also provide protection for each of the levels 2101 through 210n from overvoltage when the
switch 200 is off and while it is being turned on. Protection from overvoltage during turn-on is desirable as the voltages across levels that are not on increase as other levels are turned on. Thus, theswitch 200 is able to handle voltages VS in the level of 10s of kilovolts. - In an exemplary embodiment, the
energy storage device 120 is a capacitor.FIG. 3 illustrates the waves for the voltage VS across an exemplary embodiment of theenergy storage device 120 and the current Is supplied by the exemplaryenergy storage device 120 as an exemplary embodiment of theswitch 200 is turned on, in accordance with an exemplary embodiment of the present invention. For the example illustrated inFIG. 3 , theenergy storage device 120 is a 0.15 µF capacitor. - Referring to
FIG. 3 , prior to theexemplary switch 200 closing, VS is 4.92kV and Is is 0A. At time t0, corresponding to 0 seconds, a command signal is sent to the switch SW1 to close, beginning the turn-on process of theexemplary switch 200. At time t1, corresponding to 40 ns, theexemplary switch 200 is fully turned on, and the exemplaryenergy storage device 120 begins discharging. IS increases to a maximum of 2.04kA at time t2, corresponding to 48 ns. VS and Is then oscillate until settling at zero. -
FIG. 4 illustrates the waves for the voltage VS across another exemplary embodiment of theenergy storage device 120 and the current Is supplied by the exemplaryenergy storage device 120 as another exemplary embodiment of theswitch 200 is turned on and then turned off, in accordance with an exemplary embodiment of the present invention. InFIG. 4 , prior to theexemplary switch 200 closing, VS is about 1.4kV and Is is 0A. At time t1, theexemplary switch 200 is fully turned on, and the exemplaryenergy storage device 120 begins discharging. IS increases to a maximum of 100A at time t2, at which time theexemplary switch 200 is provided with a turn-off signal via the turn-off circuit 215. Theexemplary switch 200 turns off, as described above. As theexemplary switch 200 turns off, Is decreases, and VS spikes to 5.4kV at time t3 before returning to 1.4kV when theexemplary switch 200 is fully closed. - These and other advantages of the present invention will be apparent to those skilled in the art from the foregoing specification. Accordingly, it is to be recognized by those skilled in the art that changes or modifications may be made to the above-described embodiments without departing from the broad inventive concepts of the invention. It is to be understood that this invention is not limited to the particular embodiments described herein, but is intended to include all changes and modifications that are within the scope and spirit of the invention.
Claims (16)
- A semiconductor switching device comprising:a control-triggered stage comprising:one or more semiconductor switches connected in parallel, each semiconductor switch comprising a power input, a power output, and a control input;a breakover switch comprising a first end and a second end, the first end of the breakover switch coupled to the power input of each semiconductor switch, the second end of the breakover switch coupled to the control input of each semiconductor switch; anda control switch connected across the breakover switch;one or more auto-triggered stages connected in series, each auto-triggered stage comprising:one or more semiconductor switches connected in parallel, each semiconductor switch of each auto-triggered stage comprising a power input, a power output, and a control input; anda breakover switch comprising a first end and a second end, the first end of the breakover switch of the each auto-triggered stage coupled to the power input of each semiconductor switch of the each auto-triggered stage, the second end of the breakover switch of the each auto-triggered stage coupled to the control input of each semiconductor switch of the each auto-triggered stage,wherein the control-triggered stage is connected in series with the one or more auto-triggered stages.
- The semiconductor switching device of claim 1, wherein:the control-triggered stage further comprises a resistor; andthe first end of the breakover switch of the control-triggered stage is coupled to the power input of each semiconductor switch of the control-triggered stage via the resistor of the control-triggered stage.
- The semiconductor switching device of claim 2, wherein:each of the auto-triggered stages comprises a respective resistor; andthe first end of the breakover switch of the each auto-triggered stage is coupled to the power input of each semiconductor switch of the each auto-triggered stage via the respective resistor of the each auto-triggered stage.
- The semiconductor switching device of one of claims 1 to 3, wherein each breakover switch is a breakover diode.
- The semiconductor switching device of one of claims 1 to 4, wherein the control-triggered stage further comprises a suppressor having a first end and a second end, the first end of the suppressor coupled to the power output of each semiconductor switch of the control-triggered stage and the second end of the suppressor coupled to the control input of each semiconductor switch of the control-triggered stage.
- The semiconductor switching device of claim 5, wherein the control-triggered stage further comprises a turn-off circuit disposed between the power output and the control input of each semiconductor switch of the control-triggered stage.
- The semiconductor switching device of claim 5 or 6, wherein:each of the auto-triggered stages comprises a respective suppressor having a first end and a second end;the first end of the respective suppressor of each auto-triggered stage is coupled to the power output of each semiconductor switch of the each auto-triggered stage; andthe second end of the respective suppressor of each auto-triggered stage is coupled to the control input of each semiconductor switch of the each auto-triggered stage.
- The semiconductor switching device of one of claims 1 to 7, wherein the control-triggered stage further comprises a capacitor having a first end and a second end, the first end of the capacitor coupled to the power output of each semiconductor switch of the control-triggered stage and the second end of the capacitor coupled to the control input of each semiconductor switch of one of the auto-triggered stages, the capacitor configured to discharge into the control input of the each semiconductor switch of the one of the auto-triggered stages in response to the control switch closing to turn on the each semiconductor switch of the one of the auto-triggered stages.
- The semiconductor switching device of claim 8, wherein:each of the auto-triggered stages comprises a respective capacitor having a first end and a second end;the first end of the respective capacitor of each auto-triggered stage is coupled to the power output of each semiconductor switch of the each auto-triggered stage;the second end of the respective capacitor of each auto-triggered stage except a highest one of the auto-triggered stages is coupled to the control input of each semiconductor switch of a next higher auto-triggered stage; andthe second end of the capacitor of the highest auto-triggered stage is coupled to the power input of each semiconductor switch of the highest auto-triggered stage.
- The semiconductor switching device of one of claims 1 to 9, wherein each semiconductor switch has a low output impedance.
- The semiconductor switching device of claim 10, wherein each semiconductor switch is an insulated gate bipolar transistor.
- The semiconductor switching device of claim 10, wherein each semiconductor switch is a silicon controlled rectifier.
- The semiconductor switching device of claim 10, wherein each semiconductor switch is a gate-turn-off thyristor.
- The semiconductor switching device of claim 10, wherein each semiconductor switch is a metal-oxide semiconductor field-effect transistor.
- The semiconductor switching device of claim 10, wherein each semiconductor switch is a MOS controlled thyristor.
- A high voltage circuit comprising:an energy storage device;a load;a power supply coupled across the energy storage device; anda semiconductor switching device according to one of claims 1 to 15 for coupling the energy storage device across the load.
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US13/273,767 US8575990B2 (en) | 2011-10-14 | 2011-10-14 | Matrix-stages solid state ultrafast switch |
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EP2582047A3 EP2582047A3 (en) | 2014-02-19 |
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US8575990B2 (en) * | 2011-10-14 | 2013-11-05 | Silicon Power Corporation | Matrix-stages solid state ultrafast switch |
TWI752058B (en) * | 2016-07-22 | 2022-01-11 | 德商科思創德意志股份有限公司 | Scratch-resistant polycarbonate compositions having good thermal stability |
DE102017203053A1 (en) * | 2017-02-24 | 2018-08-30 | Siemens Aktiengesellschaft | Voltage limiting device for a direct voltage network |
CN112491406B (en) * | 2020-11-26 | 2023-07-25 | 核工业西南物理研究院 | High-voltage solid-state modulator with voltage regulation capability |
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DE102006036349B4 (en) * | 2006-08-03 | 2015-04-02 | Infineon Technologies Ag | Circuit device and method for detecting an operating state |
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US8575990B2 (en) * | 2011-10-14 | 2013-11-05 | Silicon Power Corporation | Matrix-stages solid state ultrafast switch |
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- 2011-10-14 US US13/273,767 patent/US8575990B2/en not_active Expired - Fee Related
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2012
- 2012-10-11 EP EP12188079.3A patent/EP2582047B1/en active Active
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US5180963A (en) | 1990-06-22 | 1993-01-19 | Board Of Regents Of The University Of Washington | Optically triggered high voltage switch network and method for switching a high voltage |
US5444610A (en) | 1993-10-22 | 1995-08-22 | Diversified Technologies, Inc. | High-power modulator |
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Also Published As
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US20140035655A1 (en) | 2014-02-06 |
EP2582047A3 (en) | 2014-02-19 |
US20150061751A1 (en) | 2015-03-05 |
US8575990B2 (en) | 2013-11-05 |
US8970286B2 (en) | 2015-03-03 |
EP2582047B1 (en) | 2016-12-28 |
US9543932B2 (en) | 2017-01-10 |
US20130093498A1 (en) | 2013-04-18 |
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