EP2567419A1 - Reduction of the effects of cap-like projections, due to laser ablation of a metal level by using a non-crosslinked light- or heat-crosslinkable polymer layer - Google Patents
Reduction of the effects of cap-like projections, due to laser ablation of a metal level by using a non-crosslinked light- or heat-crosslinkable polymer layerInfo
- Publication number
- EP2567419A1 EP2567419A1 EP11731442A EP11731442A EP2567419A1 EP 2567419 A1 EP2567419 A1 EP 2567419A1 EP 11731442 A EP11731442 A EP 11731442A EP 11731442 A EP11731442 A EP 11731442A EP 2567419 A1 EP2567419 A1 EP 2567419A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- layer
- laser
- source
- organic transistor
- drain electrodes
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
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Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
- H10K10/40—Organic transistors
- H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]
- H10K10/462—Insulated gate field-effect transistors [IGFETs]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
- H10K10/40—Organic transistors
- H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]
- H10K10/462—Insulated gate field-effect transistors [IGFETs]
- H10K10/468—Insulated gate field-effect transistors [IGFETs] characterised by the gate dielectrics
- H10K10/471—Insulated gate field-effect transistors [IGFETs] characterised by the gate dielectrics the gate dielectric comprising only organic materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
- H10K71/621—Providing a shape to conductive layers, e.g. patterning or selective deposition
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
- H10K10/40—Organic transistors
- H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]
- H10K10/462—Insulated gate field-effect transistors [IGFETs]
- H10K10/464—Lateral top-gate IGFETs comprising only a single gate
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
- H10K10/40—Organic transistors
- H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]
- H10K10/462—Insulated gate field-effect transistors [IGFETs]
- H10K10/466—Lateral bottom-gate IGFETs comprising only a single gate
Definitions
- the invention relates to the field of organic electronics, in particular the manufacture of resistors, capacitors, diodes, transistors, etc.
- the excimer method which can be implemented using a device illustrated in FIG. 1A, makes it possible to structure and "pattern" patterns solved by projection of the mask (1).
- Ablation of the substrate (2) is performed by the interaction between the UV (3, excimer) beam passing through the mask (1) made of glass and aluminum and the surface of the layer (substrate, 2).
- the excimer laser is a gas laser that emits pulse mode in the ultraviolet between 193 and 351 nanometers depending on the gas mixture used.
- the gaseous medium is composed of a rare gas G (Ar, Xe, Kr) and a halogenated compound X (F 2 , HCl).
- the delivered energies are of the order of the joule and the duration of pulses vary from 10 to 150 nanoseconds, the frequencies being able to reach the kHz. Appeared in 1992 Excimer high power sources (avg emie: 500-1000 W) suggesting a development of their use for the surface treatment.
- the excimer laser has specific advantages: a large energy of photons (several eV) allowing access to photochemical effects, treatments with a submicron spatial resolution and very limited thermal effects, a more effective laser-material coupling in the ultraviolet only in the infrared. Above 300 nm, optical fiber transport appears possible.
- a weak energy gives caps whereas a Strong energy gives molten edges that usually have unglued or melted dimensions larger than a micrometer.
- Microelectronics has conventionally developed around inorganic materials such as silicon (Si) or galium arsenide (GaAs). Another path is now explored around organic materials, such as polymers, because of their ease of manufacture on a large scale, their mechanical strength, their flexible structure or their ease of reprocessing. It has been designed screens based on organic diodes (OLED) or based on organic thin-film transistors (OTFTs). In addition, the use of layer deposition techniques, for example by spinning, inkjet or screen printing, is made possible by the use of so-called polymers.
- OLED organic diodes
- OTFTs organic thin-film transistors
- the design of a transistor requires two conducting levels: In high gate architecture (FIG 2A), the conductive level 1 (4) is deposited on the substrate (5) and the source and drain electrodes (6, 7) are etched by various types of process such as laser ablation type excimer. This step requires a very good adjustment of the energy of the laser beam, in order to minimize the effects of caps.
- FOG 2A high gate architecture
- the conductive level 1 (4) is deposited on the substrate (5) and the source and drain electrodes (6, 7) are etched by various types of process such as laser ablation type excimer. This step requires a very good adjustment of the energy of the laser beam, in order to minimize the effects of caps.
- the conductive level 2 (4) is deposited on the gate dielectric (9), and the source and drain electrodes (6, 7) are etched by laser ablation. In the same way, this step requires a very good adjustment of the energy of the laser beam in order to minimize the effects of caps as well as the degradation of the gate dielectric.
- the proposed invention makes it possible to reduce the appearance of caps and beads at the edge of the pattern, inherent to the laser ablation process.
- the invention relies on the use of a material crosslinkable to the laser and being in uncrosslinked or partially crosslinked form to protect a metal layer to be laser etched.
- a protective layer is disposed on the back of the metal layer to be etched or ablated.
- the invention relates to a method of laser etching a metal layer which comprises the following steps:
- a protective layer on a substrate, said layer comprising a material crosslinkable by laser and being in uncrosslinked or partially crosslinked form;
- a suitable substrate for carrying out the process according to the invention may be a plastic substrate (PEN, PET, etc.), a plastic substrate covered with metal (Au, Al, Ag, Pd,. between 10 and 200 nanometers or a metal surface (Au, Al, ...) or a conductive surface (for example PEDOT PSS).
- the protective layer comprises or consists of a material crosslinkable by laser and is in uncrosslinked or partially crosslinked form.
- the principle underlying the present invention is the presence of a material capable of absorbing a portion of the energy of the laser which, in fact, less deteriorates the laser-treated metal layer.
- the final properties of a crosslinkable polymer depend on its degree of crosslinking.
- a fully crosslinked polymer material will be harder than a polymer material having a few cross-linking nodes, which will then have more elastic properties (“J. Phys Chem C 2009, 113, 11491-11506"). Thus, this elasticity will allow to absorb the wave and the low degree of crosslinking will allow the crosslinking.
- the invention is based on the fact of not completely cross-linking the layer below the level to be ablated. In this way, the excess energy of the laser beam is partially absorbed by this protective layer and the etching edge effects are significantly attenuated. In addition, depending on the energy required for the etching, the ablation can be done either by 1 shot at this energy, or by several shots at lower energies.
- Such a protective layer typically has a thickness of between 10 to 1500 nanometers, advantageously between 100 and 1000 nanometers. It may be deposited on the substrate by any technique known to those skilled in the art, for example by means of a spin coating.
- laser Light Amplification by Stimulated Emission of Radiation
- laser Light Amplification by Stimulated Emission of Radiation
- the term "laser” is intended to mean a device producing concentrated radiation in a very fine beam of monochrome light whose coherence is very high and whose energy is very directive.
- Such a device is for example an excimer laser which emits in the ultraviolet (UV) range, with wavelengths between 100 and 400 nanometers, in particular 157, 248, 308 and 351 nm.
- UV ultraviolet
- Such a device is generally used in combination with a mask to structure or "pattern" patterns on the layer of interest.
- such a device has a fluence of between 10 and 1000 mJ / cm 2 , for example equal to 54 mJ / cm 2 .
- the pulse durations may vary from 10 to 150 nanoseconds, for example equal to 30 ns, the number of pulses may also be variable, typically from 1 to 10.
- laser crosslinkable is intended to mean that said material is capable of forming a three-dimensional network by creating bonds between the macro-molecular chains under the action of the laser. In practice, the material therefore undergoes partial or total crosslinking under the action of UV radiation or heat related to the laser, depending on whether it is photo-crosslinkable or heat-curable, respectively.
- the crosslinking can be continued by exposure to the UV lamp (for a few minutes, with a power of a few hundred watts) in order to achieve photo-crosslinking or complete thermo-reticulation.
- the crosslinkable laser material used in the context of the present invention is a polymer.
- Such a material may also have other particular properties adapted to the intended application.
- the material that can be crosslinked by laser and that is in non-crosslinked or partially crosslinked form is advantageously electrically insulating.
- Such a material is, for example, chosen from the group comprising: polyacrylates, epoxy resins, epoxy acrylates, polyurethanes, silicones, polyimides and copolyimides, poly (sisesquioxanes) s, poly (benzocyclobutene) s, polyvinylcinnamates, perfluorinated aliphatic polymers, poly (vinylphenol).
- the step of etching the source and drain electrodes, and possibly the gate is particularly delicate and requires the implementation of the method according to the invention. invention.
- the invention relates to a method of manufacturing an organic transistor comprising the following steps:
- a protective layer on a substrate, said layer comprising a material crosslinkable by laser and being in uncrosslinked or partially crosslinked form;
- a semiconductor layer is further deposited on the surface of the source and drain electrodes.
- the deposition of the gate or source and drain electrodes at the end of the process is performed by depositing and laser etching a conductive layer.
- the dielectric layer is also made using a material crosslinkable by laser and is in uncrosslinked or partially crosslinked form.
- a protective layer is also deposited between the dielectric layer and the gate or source and drain electrodes.
- a high grid architecture typically has the following succession of layers:
- the protective layer between the substrate and the metal layer for the creation of the drain and source electrodes, and / or between the gate and its gate dielectric. Note that in the latter case, the dielectric can act as a protective layer.
- the semiconductor layer is deposited after the laser etching of the source and drain electrodes and before the deposition of the dielectric layer.
- the polymer is advantageously electrically insulating so as not to disturb the semiconductor layer deposited above (in the case of the source and the drain) or below (in the case of the grid). It is advantageously chosen from the group consisting of polyacrylates, epoxy resins, epoxy acrylates, polyurethanes and silicones.
- the present invention therefore makes it possible to obtain an organic transistor in a high gate architecture comprising the following structure:
- a layer comprising at least partially crosslinked material may also be present between the dielectric layer and the grid.
- the method according to the invention allows the manufacture of an organic transistor in low gate architecture.
- a low grid architecture as for it, presents classically the succession of following layers:
- the semiconductor layer is deposited after the deposition of the source and drain electrodes.
- a protective layer is therefore added between the substrate and the grid.
- the dielectric layer is produced using a material which is crosslinkable by laser and is in non-crosslinked or partially crosslinked form.
- a protective layer is added between the dielectric layer and the drain and source electrodes.
- the polymer is advantageously chosen from the group consisting of: polyimides and copolyimides, poly (sisesquioxanes) s, poly (benzocyclobutene) s, poly (vinylcinnamate) s, perfluorinated aliphatic polymers, poly (vinylphenol) and poly ( acrylate) s.
- the present invention thus makes it possible to obtain an organic transistor in a low gate architecture having the following structure:
- a layer comprising at least partially crosslinked material may also be present between the dielectric layer and the source and drain electrodes.
- a material crosslinkable to the laser and being in non-crosslinked or partially crosslinked form to protect a metal layer of the laser etching in the context of the manufacture of an organic transistor, can take several forms :
- the dielectric layer under the source and drain electrodes or a layer inserted between the dielectric and the source and drain electrodes.
- the present invention undeniably relates the positive effect of the presence of a crosslinkable material, but not crosslinked or only partially crosslinked, placed under a metal layer to be treated laser: a significant decrease in caps and melted edges, and an improvement electrical characteristics are observed.
- FIG. 1 represents a device for implementing the excimer process (A) and the disadvantages observed at the level of the etching (B).
- FIG. 2 represents an embodiment diagram of a high gate architecture according to the prior art (A) or according to the invention (B).
- FIG. 3 represents a diagram of realization of a low gate architecture according to the prior art (A) or according to the invention (B and C).
- FIG. 4 corresponds to SEM observations of a 30 nanometer gold layer ablated by the excimer type laser process at the same fluence (54 mJ / cm 2 ): comparison between a totally crosslinked dielectric (A) and the same uncrosslinked dielectric (B).
- FIG. 5 illustrates the electrical results obtained with two organic low-gate architecture transistors from samples A and B, respectively.
- FIG. 2B The implementation of the invention in the context of a high gate architecture is illustrated in Figure 2B. It is based primarily on the deposition of an insulating polymer (10) uncrosslinked or partially crosslinked, and thus crosslinkable, between the substrate (5) and the conductive level (4).
- insulating polymer 10
- a / Cross-linkable insulating polymer 10
- crosslinkable insulating polymer which can be used in high grid architecture, may be chosen from the following list:
- the insulator (10) allows, if it is not or partially crosslinked, to reduce the caps during the step of ablation of the upper layer (4). It must be electrically insulating so as not to disturb the semiconductor layer (11) deposited above.
- Step 1 Substrate (5)
- Step 2 Deposition of the uncrosslinked insulation (10) on the substrate (5)
- Step 3 Deposition of a conductive layer (4) on the entire surface
- Step 4 etching by laser ablation of the conductive layer (4) through a mask (1) giving rise to the formation of the source and drain electrodes (6, 7)
- Step 5 thermo- or photo-cross-linking of the insulation (10)
- Step 6 Obtaining an organic field effect transistor by successive deposition of a semiconductor (11), a dielectric (9) and a gate (8)
- the crosslinkable dielectric polymer (10) which can be used in low gate architecture, can be chosen from the following list (A. horretti et al., Adv Mater, 2005, 17, p. This is for example a photo-crosslinkable organic dielectric, and more specifically an epoxy resin. It is a mixture of 49.5% by weight of poly (4-vinylphenol) (PVP), 49.5% by weight of trimethylolpropane triglycidyl ether, 0.5% by weight of benzoyl peroxide and 0.5% by weight. by weight of triphenylsulfonium triflate.
- PVP poly (4-vinylphenol)
- This mixture is diluted to 10% by weight in cyclohexanone and deposited by screen printing or spin coating on the substrate (5).
- the resulting film is annealed at 100 ° C on a hot plate for 5 minutes to evaporate the residual solvents of the thin polymer layer.
- This dielectric (10) is crosslinked by applying a UV dose, for example under the following conditions:
- Step 1 etching of the metallic level 1 by photolithography or laser ablation to create the grid (8).
- the etch edges have little impact at the grid level on the electrical properties of the transistor, the gate being much wider than the channel, the effects of caps are then outside the channel.
- the method according to the invention could also be implemented for etching the grid (8) by interposing, between the substrate (5) and the metal level 1, a crosslinkable polymer, under the same conditions as described above. below for the etching of the source and the drain
- Step 2 Sputter deposition of the epoxy-type dielectric described above (10), annealed for 5 min at 100 ° C on a substrate (5) PEN / Au (30 nm); dielectric thickness of about 800 nanometers
- Step 3 PVD deposition of a gold conductive layer (4) (30 nm) over the entire surface
- Step 5 thermo- or photo-crosslinking of the dielectric polymer, more specifically insolation crosslinking (UV lamp, 10 min, 600 W)
- Step 6 Deposition of a p-type semiconductor (11), for example modified pentacene. Then encapsulation with a fluorinated aliphatic polymer type dielectric.
- a protective layer (10) is further deposited on the substrate (5) to protect the grid (8) from laser ablation.
- FIG. 4 reveals, for the crosslinked dielectric (A), the important presence of caps and remelted on the ablated upper layer.
- the uncrosslinked dielectric (B) there is a marked decrease in caps and remelted on the ablated upper layer.
- Figure 5 illustrates that in terms of the electrical characteristics of these two samples, the B sample is significantly better compared to the A sample. Indeed, the ID vs. VD curves of the B sample reflect a very good contact and a good injection of electrons between the two source and drain electrodes. Thanks to this process, the injection of electrons into the channel is thus improved, as well as the mobility of the electrons. The current is more important in open regime.
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Thin Film Transistor (AREA)
- Treatments Of Macromolecular Shaped Articles (AREA)
- Formation Of Insulating Films (AREA)
Abstract
The invention relates to the use of a laser-crosslinkable material (10) that is non-crosslinked or partially crosslinked for protecting the electrodes of an organic transistor during laser etching.
Description
DIMINUTION DES EFFETS DE CASQUETTES DUES A L'ABLATION LASER D'UN NIVEAU METALLIQUE PAR UTILISATION D'UNE COUCHE DE POLYMERE PHOTO- OU THERMO- RETICULABLE NON RETICULE REDUCING THE EFFECTS OF CAPS DUE TO LASER ABLATION OF A METAL LEVEL USING A NON-RETICULATED PHOTO- OR THERMO-RETICULABLE POLYMER LAYER
DOMAINE DE L'INVENTION FIELD OF THE INVENTION
L'invention a trait au domaine de l'électronique organique, notamment la fabrication de résistances, capacités, diodes, transistors... The invention relates to the field of organic electronics, in particular the manufacture of resistors, capacitors, diodes, transistors, etc.
En pratique, elle propose une solution aux problèmes liés à la dégradation de surface lors d'étape(s) de gravure d'un niveau métallique. Elle trouve tout particulièrement application dans l'étape de gravure par ablation laser de type excimer, des électrodes d'un transistor organique. In practice, it proposes a solution to the problems related to the degradation of surface during step (s) of engraving of a metallic level. It is particularly applicable in the excimer laser ablation etching step of the electrodes of an organic transistor.
ETAT ANTÉRIEUR DE LA TECHNIQUE PRIOR STATE OF THE ART
Le procédé excimère, qui peut être mis en œuvre à l'aide d'un dispositif illustré à la figure 1 A, permet de structurer et de « patterner » des motifs résolus grâce à la projection du masque (1). L'ablation du substrat (2) est réalisée par l'interaction entre le faisceau UV (3, excimère) traversant le masque (1) réalisé en verre et aluminium et la surface de la couche (substrat, 2). The excimer method, which can be implemented using a device illustrated in FIG. 1A, makes it possible to structure and "pattern" patterns solved by projection of the mask (1). Ablation of the substrate (2) is performed by the interaction between the UV (3, excimer) beam passing through the mask (1) made of glass and aluminum and the surface of the layer (substrate, 2).
Le laser à excimère est un laser à gaz qui émet en mode impulsionnel dans l'ultraviolet entre 193 et 351 nanomètres selon le mélange gazeux utilisé. Le milieu gazeux est composé d'un gaz rare G (Ar, Xe, Kr) et d'un composé halogéné X (F2, HC1). L'excitation, électrique ou par faisceau d'électrons conduit à la formation de molécules excitées GX* [ArF (λ = 193 nm), KrF (λ = 248 nm), XeCl (λ = 308 nm), XeF (λ = 351 nm)]. Les énergies délivrées sont de l'ordre du joule et les durées d'impulsions varient de 10 à 150 nanosecondes, les fréquences pouvant atteindre le kHz. Sont apparues en 1992 des sources excimères de forte puissance ( moyemie : 500 à 1000 W) laissant présager un développement de leur utilisation en vue du traitement de surface. The excimer laser is a gas laser that emits pulse mode in the ultraviolet between 193 and 351 nanometers depending on the gas mixture used. The gaseous medium is composed of a rare gas G (Ar, Xe, Kr) and a halogenated compound X (F 2 , HCl). The excitation, electric or by electron beam leads to the formation of excited molecules GX * [ArF (λ = 193 nm), KrF (λ = 248 nm), XeCl (λ = 308 nm), XeF (λ = 351 nm)]. The delivered energies are of the order of the joule and the duration of pulses vary from 10 to 150 nanoseconds, the frequencies being able to reach the kHz. Appeared in 1992 Excimer high power sources (avg emie: 500-1000 W) suggesting a development of their use for the surface treatment.
Le laser excimère présente des avantages spécifiques : une énergie importante des photons (plusieurs eV) permettant d'accéder à des effets photochimiques, des traitements avec une résolution spatiale submicronique et des effets thermiques très limités, un couplage laser- matière plus efficace dans l'ultraviolet que dans l'infrarouge. Au-dessus de 300 nm, le transport par fibre optique apparaît possible.
Lors de l'ablation, sur les bords de gravure, il y a présence de bourrelet fondu ou de décollement du métal appelé casquette (Fig. 1B), en fonction de l'énergie utilisée : une énergie faible donne des casquettes alors qu'une énergie forte donne des bords fondus qui ont généralement des dimensions décollées ou fondu supérieur au micromètre. Ces profils sont très problématiques pour l'utilisation de ces motifs dans la réalisation de composants électroniques organiques, pour lesquels on utilise des techniques de dépôts de couches actives d'une épaisseur de l'ordre de 100 nanomètres. Déposer des couches minces de 100 nano mètres ou moins, par exemple des semi-conducteurs de 30 à 70 nanomètres sur des motifs présentant ces décollements et profils pose de nombreux problèmes. The excimer laser has specific advantages: a large energy of photons (several eV) allowing access to photochemical effects, treatments with a submicron spatial resolution and very limited thermal effects, a more effective laser-material coupling in the ultraviolet only in the infrared. Above 300 nm, optical fiber transport appears possible. During the ablation, on the edges of engraving, there is presence of melted bead or detachment of the metal called cap (Fig. 1B), according to the energy used: a weak energy gives caps whereas a Strong energy gives molten edges that usually have unglued or melted dimensions larger than a micrometer. These profiles are very problematic for the use of these patterns in the production of organic electronic components, for which active layer deposition techniques with a thickness of the order of 100 nanometers are used. Placing thin layers of 100 nanometers or less, for example semiconductors of 30 to 70 nanometers on patterns exhibiting these detachments and profiles poses many problems.
Cela peut entraîner notamment des fuites électriques, des difficultés du passage de marche, des pertes de cote (par exemple au niveau de la largeur de canal), un vieillissement prématuré, .... This can lead to electrical leaks, difficulties with the passage of steps, loss of dimension (for example at the level of the channel width), premature aging, etc.
Or, il a été constaté que, quel que soit le métal utilisé (Ti, Cu, Au, Ni, Pt et, ... ), la technique d'ablation laser par projection de masque ne laisse jamais un bord de motif parfait. Cela est inhérent à la méthode et s'explique par le fait que la chaleur des UV lors du « shoot laser » fait exploser la métallisation. However, it has been found that, whatever the metal used (Ti, Cu, Au, Ni, Pt and ...), the mask projection laser ablation technique never leaves a perfect pattern edge. This is inherent to the method and is explained by the fact that the heat of the UV during the "laser shoot" explodes the metallization.
Cet inconvénient est particulièrement préoccupant dans le domaine de la micro électronique, notamment dans l'élaboration de transistors. This disadvantage is particularly worrying in the field of microelectronics, particularly in the development of transistors.
La microélectronique s'est classiquement développée autour de matériaux inorganiques tel que le silicium (Si) ou l'arséniure de galium (GaAs). Une autre voie est aujourd'hui explorée autour de matériaux organiques, tels que les polymères, en raison de leur facilité de fabrication à grande échelle, de leur tenue mécanique, de leur structure flexible ou encore de leur facilité de retraitement. Il a ainsi été conçu des écrans à base de diodes organiques (les OLED) ou à base de transistors organiques à couche mince (les OTFT). En outre, l'utilisation de techniques de dépôt de couche, par exemple par tournette, par jet d'encre ou par sérigraphie, est rendue possible par l'utilisation de polymères so lubies. Microelectronics has conventionally developed around inorganic materials such as silicon (Si) or galium arsenide (GaAs). Another path is now explored around organic materials, such as polymers, because of their ease of manufacture on a large scale, their mechanical strength, their flexible structure or their ease of reprocessing. It has been designed screens based on organic diodes (OLED) or based on organic thin-film transistors (OTFTs). In addition, the use of layer deposition techniques, for example by spinning, inkjet or screen printing, is made possible by the use of so-called polymers.
Cependant, l'empilement de différentes couches organiques et/ou inorganiques présente un certain nombre de difficultés. En particulier, la conception d'un transistor nécessite deux niveaux conducteurs :
En architecture grille haute (Fig. 2A), le niveau conducteur 1 (4) est déposé sur le substrat (5) puis les électrodes source et drain (6, 7) sont gravées par différents types de procédé comme l'ablation laser de type excimer. Cette étape nécessite un très bon ajustement de l'énergie du faisceau laser, afin de réduire au maximum les effets de casquettes. However, the stacking of different organic and / or inorganic layers presents a number of difficulties. In particular, the design of a transistor requires two conducting levels: In high gate architecture (FIG 2A), the conductive level 1 (4) is deposited on the substrate (5) and the source and drain electrodes (6, 7) are etched by various types of process such as laser ablation type excimer. This step requires a very good adjustment of the energy of the laser beam, in order to minimize the effects of caps.
En architecture grille basse (Fig. 3A), le niveau conducteur 2 (4) est déposé sur le diélectrique de grille (9), puis les électrodes source et drain (6, 7) sont gravées par ablation laser. De la même façon, cette étape nécessite un très bon ajustement de l'énergie du faisceau laser afin de réduire au maximum les effets de casquettes ainsi que la dégradation du diélectrique de grille. In low gate architecture (FIG 3A), the conductive level 2 (4) is deposited on the gate dielectric (9), and the source and drain electrodes (6, 7) are etched by laser ablation. In the same way, this step requires a very good adjustment of the energy of the laser beam in order to minimize the effects of caps as well as the degradation of the gate dielectric.
Il existe donc un besoin évident de développer des solutions techniques permettant de minimiser ces effets en bords de motif de gravure. There is therefore a clear need to develop technical solutions for minimizing these effects in engraving pattern edges.
EXPOSE DE L'INVENTION SUMMARY OF THE INVENTION
Ainsi, l'invention proposée permet de réduire l'apparition de casquettes et de bourrelets en bord de motif, inhérente au procédé d'ablation laser. Thus, the proposed invention makes it possible to reduce the appearance of caps and beads at the edge of the pattern, inherent to the laser ablation process.
Ainsi, l'invention repose sur l'utilisation d'un matériau réticulable au laser et se présentant sous forme non réticulée ou partiellement réticulée pour protéger un couche métallique destinée à être gravée au laser. Thus, the invention relies on the use of a material crosslinkable to the laser and being in uncrosslinked or partially crosslinked form to protect a metal layer to be laser etched.
En d'autres termes, elle concerne un procédé de structuration d'une couche métallique par gravure ou ablation laser, selon lequel une couche protectrice est disposée au dos de la couche métallique à graver ou ablater. In other words, it relates to a method of structuring a metal layer by etching or laser ablation, wherein a protective layer is disposed on the back of the metal layer to be etched or ablated.
Plus précisément, l'invention a trait à un procédé de gravure au laser d'une couche métallique qui comprend les étapes suivantes : More specifically, the invention relates to a method of laser etching a metal layer which comprises the following steps:
dépôt d'une couche protectrice sur un substrat, ladite couche comprenant un matériau réticulable au laser et se présentant sous forme non réticulée ou partiellement réticulée ; depositing a protective layer on a substrate, said layer comprising a material crosslinkable by laser and being in uncrosslinked or partially crosslinked form;
dépôt de la couche conductrice sur la couche protectrice ; depositing the conductive layer on the protective layer;
gravure au laser de la couche conductrice.
Un substrat approprié à la mise en œuvre du procédé selon l'invention peut être un substrat plastique (PEN, PET... ), un substrat plastique recouvert de métal (Au, Al, Ag, Pd, ... ) d'épaisseur comprise entre 10 et 200 nanomètres ou une surface métallique (Au, Al, ...) ou une surface conductrice (par exemple du PEDOT PSS). laser etching of the conductive layer. A suitable substrate for carrying out the process according to the invention may be a plastic substrate (PEN, PET, etc.), a plastic substrate covered with metal (Au, Al, Ag, Pd,. between 10 and 200 nanometers or a metal surface (Au, Al, ...) or a conductive surface (for example PEDOT PSS).
De manière caractéristique selon l'invention, la couche protectrice comprend ou est constituée d'un matériau réticulable au laser et se présentant sous forme non réticulée ou partiellement réticulée. Le principe sous-tendant la présente invention est donc la présence d'un matériau apte à absorber une partie de l'énergie du laser qui, de fait, détériore moins la couche métallique traitée au laser. En effet, les propriétés finales d'un polymère réticulable dépendent de son degré de réticulation. Un matériau polymère totalement réticulé sera plus dur qu'un matériau polymère présentant quelques nœuds de réticulation, qui aura alors plus de propriétés élastiques («J. Phys. Chem. C 2009, 113, 11491-11506 »). Ainsi, cette élasticité va permettre d'absorber l'onde et le taux de réticulation faible va permettre la réticulation. Typically according to the invention, the protective layer comprises or consists of a material crosslinkable by laser and is in uncrosslinked or partially crosslinked form. The principle underlying the present invention is the presence of a material capable of absorbing a portion of the energy of the laser which, in fact, less deteriorates the laser-treated metal layer. Indeed, the final properties of a crosslinkable polymer depend on its degree of crosslinking. A fully crosslinked polymer material will be harder than a polymer material having a few cross-linking nodes, which will then have more elastic properties ("J. Phys Chem C 2009, 113, 11491-11506"). Thus, this elasticity will allow to absorb the wave and the low degree of crosslinking will allow the crosslinking.
En d'autres termes, l'invention repose sur le fait de ne pas réticuler de façon complète la couche sous le niveau à ablater. De cette façon, l'énergie excédentaire du faisceau laser est en partie absorbée par cette couche protectrice et les effets de bord de gravure sont nettement atténués. De plus, selon l'énergie nécessaire à la gravure, l'ablation peut être faite soit par 1 tir à cette énergie, soit par plusieurs tirs à des énergies plus faibles. In other words, the invention is based on the fact of not completely cross-linking the layer below the level to be ablated. In this way, the excess energy of the laser beam is partially absorbed by this protective layer and the etching edge effects are significantly attenuated. In addition, depending on the energy required for the etching, the ablation can be done either by 1 shot at this energy, or by several shots at lower energies.
Une telle couche protectrice présente typiquement une épaisseur comprise entre 10 à 1500 nanomètres, avantageusement comprise entre 100 et 1000 nanomètres. Elle peut être déposée sur le substrat par toute technique connue de l'homme du métier, par exemple à l'aide d'un dépôt à la tournette. Such a protective layer typically has a thickness of between 10 to 1500 nanometers, advantageously between 100 and 1000 nanometers. It may be deposited on the substrate by any technique known to those skilled in the art, for example by means of a spin coating.
Dans le cadre de l'invention, on entend par le terme « laser » (Light Amplification by Stimulated Emission of Radiation), un dispositif produisant un rayonnement concentré en un faisceau très fin de lumière monochrome dont la cohérence est très élevée et dont l'énergie est très directive. Within the scope of the invention, the term "laser" (Light Amplification by Stimulated Emission of Radiation) is intended to mean a device producing concentrated radiation in a very fine beam of monochrome light whose coherence is very high and whose energy is very directive.
Un tel dispositif est par exemple un laser à excimère qui émet dans le domaine des ultraviolets (UV), avec des longueurs d'onde comprise entre 100 et 400 nanomètres, en particulier 157, 248, 308 et 351 nm.
De manière connue, un tel dispositif est généralement utilisé en combinaison avec un masque afin de structurer ou de « patterner » des motifs sur la couche d'intérêt. Such a device is for example an excimer laser which emits in the ultraviolet (UV) range, with wavelengths between 100 and 400 nanometers, in particular 157, 248, 308 and 351 nm. In known manner, such a device is generally used in combination with a mask to structure or "pattern" patterns on the layer of interest.
Typiquement, un tel dispositif présente une fluence comprise entre 10 et 1000 mJ/cm2, par exemple égale à 54 mJ/cm2. Les durées d'impulsion peuvent varier de 10 à 150 nanosecondes, par exemple égales à 30 ns, le nombre d'impulsions pouvant également être variable, typiquement de 1 à 10. Typically, such a device has a fluence of between 10 and 1000 mJ / cm 2 , for example equal to 54 mJ / cm 2 . The pulse durations may vary from 10 to 150 nanoseconds, for example equal to 30 ns, the number of pulses may also be variable, typically from 1 to 10.
Dans le cadre de l'invention, on entend par l'expression « réticulable au laser », le fait que ledit matériau soit apte à former un réseau tridimensionnel par création de liaisons entre les chaînes macro moléculaires sous l'action du laser. En pratique, le matériau subit donc une réticulation partielle ou totale sous l'action des rayonnements UV ou de la chaleur liée au laser, en fonction qu'il soit photo-réticulable ou thermo-réticulable, respectivement. In the context of the invention, the expression "laser crosslinkable" is intended to mean that said material is capable of forming a three-dimensional network by creating bonds between the macro-molecular chains under the action of the laser. In practice, the material therefore undergoes partial or total crosslinking under the action of UV radiation or heat related to the laser, depending on whether it is photo-crosslinkable or heat-curable, respectively.
Dans le cas où, à l'issue de l'exposition au laser, le matériau n'est réticulé que partiellement, la réticulation peut être poursuivie par insolation notamment à la lampe UV (pendant quelques minutes, d'une puissance de quelques centaines de watts) afin d'aboutir à sa photo-réticulation ou à sa thermo -réticulation complète. In the case where, at the end of the laser exposure, the material is only partially cross-linked, the crosslinking can be continued by exposure to the UV lamp (for a few minutes, with a power of a few hundred watts) in order to achieve photo-crosslinking or complete thermo-reticulation.
Typiquement, le matériau réticulable au laser mis en œuvre dans le cadre de la présente invention est un polymère. Typically, the crosslinkable laser material used in the context of the present invention is a polymer.
Un tel matériau peut également présenter d'autres propriétés particulières adaptées à l'application envisagée. Such a material may also have other particular properties adapted to the intended application.
Dans le contexte de la fabrication des transistors organiques, le matériau réticulable au laser et se présentant sous forme non réticulée ou partiellement réticulée est avantageusement isolant électriquement. En outre, il est avantageux que le polymère réticulable ait une bonne compatibilité électrique avec le semi-conducteur. Pour cela, un matériau à permittivité inférieure à 5 est privilégié. In the context of the manufacture of organic transistors, the material that can be crosslinked by laser and that is in non-crosslinked or partially crosslinked form is advantageously electrically insulating. In addition, it is advantageous for the crosslinkable polymer to have good electrical compatibility with the semiconductor. For this, a material with a permittivity of less than 5 is preferred.
Un tel matériau est par exemple choisi dans le groupe comprenant : polyacrylates, résines époxy, époxy acrylates, polyuréthanes, silicones, polyimides et copolyimides, poly(sisesquioxane)s, poly(benzocyclobutène)s, poly(vinylcinnamate)s, polymères aliphatiques perfluorés, poly(vinylphénol).
Dans le cadre de la fabrication de transistors, qui constitue une application privilégiée de la présente invention, l'étape de gravure des électrodes source et drain, et éventuellement de la grille, est particulièrement délicate et requiert la mise en œuvre du procédé selon l'invention. Such a material is, for example, chosen from the group comprising: polyacrylates, epoxy resins, epoxy acrylates, polyurethanes, silicones, polyimides and copolyimides, poly (sisesquioxanes) s, poly (benzocyclobutene) s, polyvinylcinnamates, perfluorinated aliphatic polymers, poly (vinylphenol). In the context of the fabrication of transistors, which constitutes a preferred application of the present invention, the step of etching the source and drain electrodes, and possibly the gate, is particularly delicate and requires the implementation of the method according to the invention. invention.
Ainsi, l'invention concerne un procédé de fabrication d'un transistor organique comprenant les étapes suivantes : Thus, the invention relates to a method of manufacturing an organic transistor comprising the following steps:
dépôt d'une couche protectrice sur un substrat, ladite couche comprenant un matériau réticulable au laser et se présentant sous forme non réticulée ou partiellement réticulée ; depositing a protective layer on a substrate, said layer comprising a material crosslinkable by laser and being in uncrosslinked or partially crosslinked form;
dépôt d'une couche conductrice destinée à former les électrodes source et drain ou la grille du transistor, sur la couche protectrice ; depositing a conductive layer for forming the source and drain electrodes or the gate of the transistor, on the protective layer;
gravure au laser de la couche conductrice aboutissant à la formation des électrodes source et drain ou de la grille du transistor ; laser etching of the conductive layer resulting in the formation of the source and drain electrodes or the gate of the transistor;
dépôt d'une couche de diélectrique ; deposition of a dielectric layer;
dépôt de la grille ou des électrodes source et drain à la surface du diélectrique. deposition of the grid or source and drain electrodes on the surface of the dielectric.
Dans ce procédé et de manière classique pour un transistor, une couche de semiconducteur est en outre déposée à la surface des électrodes source et drain. In this method and conventionally for a transistor, a semiconductor layer is further deposited on the surface of the source and drain electrodes.
Selon un mode de réalisation particulier, le dépôt de la grille ou des électrodes source et drain en fin de procédé est réalisé par dépôt et gravure au laser d'une couche conductrice. According to a particular embodiment, the deposition of the gate or source and drain electrodes at the end of the process is performed by depositing and laser etching a conductive layer.
De manière adaptée et avantageuse, la couche de diélectrique est également réalisée à l'aide d'un matériau réticulable au laser et se présentant sous forme non réticulée ou partiellement réticulée. Alternativement, une couche protectrice est également déposée entre la couche de diélectrique et la grille ou les électrodes source et drain. Suitably and advantageously, the dielectric layer is also made using a material crosslinkable by laser and is in uncrosslinked or partially crosslinked form. Alternatively, a protective layer is also deposited between the dielectric layer and the gate or source and drain electrodes.
Le procédé selon l'invention permet aussi bien la fabrication de transistors en architecture grille haute que grille basse. Une architecture grille haute présente typiquement la succession de couches suivantes : The method according to the invention allows both the manufacture of transistors in high gate architecture and low gate. A high grid architecture typically has the following succession of layers:
un substrat ; a substrate;
des électrodes drain et source ; drain and source electrodes;
un semi-conducteur organique ou inorganique ; an organic or inorganic semiconductor;
un diélectrique dit de grille ; a so-called gate dielectric;
une grille.
Dans cette architecture, il s'agit donc d'intercaler la couche protectrice entre le substrat et la couche métallique servant à la création des électrodes drain et source, et/ou aussi entre la grille et son diélectrique de grille. A noter que dans ce dernier cas, le diélectrique peut jouer le rôle de couche de protection. a grid. In this architecture, it is therefore to insert the protective layer between the substrate and the metal layer for the creation of the drain and source electrodes, and / or between the gate and its gate dielectric. Note that in the latter case, the dielectric can act as a protective layer.
Pour la fabrication d'un transistor en architecture grille haute à l'aide du procédé selon l'invention, la couche de semi-conducteur est déposée après la gravure au laser des électrodes source et drain et avant le dépôt de la couche de diélectrique. For the manufacture of a high gate architecture transistor using the method according to the invention, the semiconductor layer is deposited after the laser etching of the source and drain electrodes and before the deposition of the dielectric layer.
Dans cette architecture, le polymère est avantageusement isolant électriquement pour ne pas perturber la couche de semi-conducteur déposée au-dessus (dans le cas de la source et du drain) ou en dessous (dans le cas de la grille). Il est avantageusement choisi dans le groupe constitué de : polyacrylates, résines époxy, époxy acrylates, polyuréthanes et silicones. In this architecture, the polymer is advantageously electrically insulating so as not to disturb the semiconductor layer deposited above (in the case of the source and the drain) or below (in the case of the grid). It is advantageously chosen from the group consisting of polyacrylates, epoxy resins, epoxy acrylates, polyurethanes and silicones.
La présente invention permet donc d'obtenir un transistor organique en architecture grille haute comprenant la structure suivante : The present invention therefore makes it possible to obtain an organic transistor in a high gate architecture comprising the following structure:
un substrat ; a substrate;
une couche comprenant un matériau réticulé au moins partiellement ; a layer comprising at least partially crosslinked material;
des électrodes source et drain ; source and drain electrodes;
un semi-conducteur organique ou inorganique ; an organic or inorganic semiconductor;
une couche de diélectrique ; a dielectric layer;
une grille. a grid.
Comme déjà dit, une couche comprenant un matériau réticulé au moins partiellement peu également être présente entre la couche de diélectrique et la grille. As already stated, a layer comprising at least partially crosslinked material may also be present between the dielectric layer and the grid.
Selon un autre aspect, le procédé selon l'invention permet la fabrication d'un transistor organique en architecture grille basse. According to another aspect, the method according to the invention allows the manufacture of an organic transistor in low gate architecture.
Une architecture grille basse, quant à elle, présente classiquement la succession de couches suivantes : A low grid architecture, as for it, presents classically the succession of following layers:
un substrat ; a substrate;
une grille; a grid;
un diélectrique dit de grille ; a so-called gate dielectric;
des électrodes drain et source ; drain and source electrodes;
un semi-conducteur organique ou inorganique.
Pour la fabrication d'un transistor en architecture grille basse à l'aide du procédé selon l'invention, la couche de semi-conducteur est déposée après le dépôt des électrodes source et drain. an organic or inorganic semiconductor. For the manufacture of a low gate architecture transistor using the method according to the invention, the semiconductor layer is deposited after the deposition of the source and drain electrodes.
Selon l'invention, une couche protectrice est donc ajoutée entre le substrat et la grille. According to the invention, a protective layer is therefore added between the substrate and the grid.
De manière avantageuse, la couche de diélectrique est réalisée à l'aide d'un matériau réticulable au laser et se présentant sous forme non réticulée ou partiellement réticulée. Advantageously, the dielectric layer is produced using a material which is crosslinkable by laser and is in non-crosslinked or partially crosslinked form.
Alternativement, une couche protectrice est ajoutée entre la couche de diélectrique et les électrodes drain et source. Alternatively, a protective layer is added between the dielectric layer and the drain and source electrodes.
Dans cette architecture, le polymère est avantageusement choisi dans le groupe constitué de : polyimides et copolyimides, poly(sisesquioxane)s, poly(benzocyclobutène)s, poly(vinylcinna-mate)s, polymères aliphatiques perfluorés, poly(vinylphénol) et poly(acrylate)s. In this architecture, the polymer is advantageously chosen from the group consisting of: polyimides and copolyimides, poly (sisesquioxanes) s, poly (benzocyclobutene) s, poly (vinylcinnamate) s, perfluorinated aliphatic polymers, poly (vinylphenol) and poly ( acrylate) s.
La présente invention permet donc d'obtenir un transistor organique en architecture grille basse présentant la structure suivante : The present invention thus makes it possible to obtain an organic transistor in a low gate architecture having the following structure:
un substrat ; a substrate;
une couche comprenant un matériau réticulé au moins partiellement ; a layer comprising at least partially crosslinked material;
une grille ; a grid ;
une couche de diélectrique ; a dielectric layer;
des électrodes source et drain ; source and drain electrodes;
un semi-conducteur organique ou inorganique. an organic or inorganic semiconductor.
Comme déjà dit, une couche comprenant un matériau réticulé au moins partiellement peu également être présente entre la couche de diélectrique et les électrodes sources et drain. As already stated, a layer comprising at least partially crosslinked material may also be present between the dielectric layer and the source and drain electrodes.
En d'autres termes, l'utilisation d'un matériau réticulable au laser et se présentant sous forme non réticulée ou partiellement réticulé pour protéger une couche métallique de la gravure laser, dans le contexte de la fabrication d'un transistor organique, peut prendre plusieurs formes : In other words, the use of a material crosslinkable to the laser and being in non-crosslinked or partially crosslinked form to protect a metal layer of the laser etching, in the context of the manufacture of an organic transistor, can take several forms :
Pour un transistor en architecture grille haute : For a transistor in high gate architecture:
une couche insérée entre le substrat et les électrodes source et drain ; et/ou a layer inserted between the substrate and the source and drain electrodes; and or
la couche de diélectrique sous la grille ou une couche insérée entre le diélectrique et la grille.
Pour un transistor en architecture grille basse : the dielectric layer under the gate or a layer inserted between the dielectric and the gate. For a transistor in low gate architecture:
- une couche insérée entre le substrat et la grille ; et/ou a layer inserted between the substrate and the grid; and or
- la couche de diélectrique sous les électrodes source et drain ou une couche insérée entre le diélectrique et les électrodes source et drain. the dielectric layer under the source and drain electrodes or a layer inserted between the dielectric and the source and drain electrodes.
La présente invention rapporte indéniablement l'effet positif de la présence d'un matériau réticulable, mais non réticulé ou seulement partiellement réticulé, placé sous une couche métallique à traiter au laser : une diminution significative des casquettes et bords fondus, ainsi qu'une amélioration des caractéristiques électriques, sont observées. The present invention undeniably relates the positive effect of the presence of a crosslinkable material, but not crosslinked or only partially crosslinked, placed under a metal layer to be treated laser: a significant decrease in caps and melted edges, and an improvement electrical characteristics are observed.
BRÈVE DESCRIPTION DES FIGURES BRIEF DESCRIPTION OF THE FIGURES
La manière dont l'invention peut être réalisée et les avantages qui en découlent ressortiront mieux des exemples de réalisation qui suivent, données à titre indicatif et non limitatif, à l'appui des figures annexées parmi lesquelles : The manner in which the invention can be realized and the advantages which result therefrom will emerge more clearly from the following exemplary embodiments, given by way of non-limiting indication, in support of the appended figures in which:
La figure 1 représente un dispositif de mise en œuvre du procédé excimère (A) et les inconvénients observés au niveau de la gravure (B). FIG. 1 represents a device for implementing the excimer process (A) and the disadvantages observed at the level of the etching (B).
La figure 2 représente un schéma de réalisation d'une architecture grille haute selon l'art antérieur (A) ou selon l'invention (B). FIG. 2 represents an embodiment diagram of a high gate architecture according to the prior art (A) or according to the invention (B).
La figure 3 représente un schéma de réalisation d'une architecture grille basse selon l'art antérieur (A) ou selon l'invention (B et C). FIG. 3 represents a diagram of realization of a low gate architecture according to the prior art (A) or according to the invention (B and C).
La figure 4 correspond à des observations au MEB d'une couche d'or de 30 nanomètres ablatée par le procédé laser de type excimer à la même fluence (54 mJ/cm2) : comparaison entre un diélectrique réticulé totalement (A) et le même diélectrique non réticulé (B). FIG. 4 corresponds to SEM observations of a 30 nanometer gold layer ablated by the excimer type laser process at the same fluence (54 mJ / cm 2 ): comparison between a totally crosslinked dielectric (A) and the same uncrosslinked dielectric (B).
La figure 5 illustre les résultats électriques obtenus avec deux transistors organiques en architecture grille basse issus des échantillons A et B, respectivement. FIG. 5 illustrates the electrical results obtained with two organic low-gate architecture transistors from samples A and B, respectively.
DESCRIPTION DÉTAILLÉE DE L'INVENTION DETAILED DESCRIPTION OF THE INVENTION
1/ Architecture grille haute : 1 / High grid architecture:
La mise en œuvre de l'invention dans le cadre d'une architecture grille haute est illustrée à la figure 2B. Elle repose prioritairement sur le dépôt d'un polymère isolant (10) non réticulé ou partiellement réticulé, et donc réticulable, entre le substrat (5) et le niveau conducteur (4).
a/ Polymère isolant réticulable : The implementation of the invention in the context of a high gate architecture is illustrated in Figure 2B. It is based primarily on the deposition of an insulating polymer (10) uncrosslinked or partially crosslinked, and thus crosslinkable, between the substrate (5) and the conductive level (4). a / Cross-linkable insulating polymer:
Le polymère isolant réticulable, susceptible d'être utilisé en architecture grille haute, peut être choisi dans la liste suivante: The crosslinkable insulating polymer, which can be used in high grid architecture, may be chosen from the following list:
polyacrylates ; polyacrylates;
résines époxy ; epoxy resins;
époxy acrylates ; epoxy acrylates;
polyuréthanes ; polyurethanes;
silicones. silicones.
Dans cette architecture, l'isolant (10) permet, s'il est non ou partiellement réticulé, de réduire les casquettes lors de l'étape d'ablation de la couche supérieure (4). Il doit être isolant électriquement pour ne pas perturber la couche de semi-conducteur (11) déposée au dessus. b/ Procédé de fabrication de l 'architecture grille haute : In this architecture, the insulator (10) allows, if it is not or partially crosslinked, to reduce the caps during the step of ablation of the upper layer (4). It must be electrically insulating so as not to disturb the semiconductor layer (11) deposited above. b / Method of manufacturing the high grid architecture:
Etape 1 : substrat (5) Step 1: Substrate (5)
Etape 2 : dépôt de l'isolant non réticulé (10) sur le substrat (5) Step 2: Deposition of the uncrosslinked insulation (10) on the substrate (5)
Etape 3 : dépôt d'une couche conductrice (4) sur toute la surface Step 3: Deposition of a conductive layer (4) on the entire surface
Etape 4 : gravure par ablation laser de la couche conductrice (4) à travers un masque (1) donnant lieu à la formation des électrodes source et drain (6, 7) Step 4: etching by laser ablation of the conductive layer (4) through a mask (1) giving rise to the formation of the source and drain electrodes (6, 7)
Etape 5 : thermo- ou photo -réticulation de l'isolant (10) Step 5: thermo- or photo-cross-linking of the insulation (10)
Etape 6 : Obtention d'un transistor organique à effet de champ par dépôt successif d'un semi-conducteur (11), d'un diélectrique (9) et d'une grille (8) Step 6: Obtaining an organic field effect transistor by successive deposition of a semiconductor (11), a dielectric (9) and a gate (8)
2/ Architecture grille basse : 2 / Low grid architecture:
La mise en œuvre de l'invention dans le cadre d'une architecture grille basse est illustrée à la figure 3B et 3C. Elle repose prioritairement sur le dépôt d'un polymère isolant (10) non réticulé ou partiellement réticulé, et donc réticulable, entre le substrat (5) et le niveau conducteur (4). a/ Polymère diélectrique réticulable : The implementation of the invention in the context of a low gate architecture is illustrated in Figure 3B and 3C. It is based primarily on the deposition of an insulating polymer (10) uncrosslinked or partially crosslinked, and thus crosslinkable, between the substrate (5) and the conductive level (4). a / Crosslinkable dielectric polymer:
Le polymère diélectrique réticulable (10), susceptible d'être utilisé en architecture grille basse, peut être choisi dans la liste suivante (A. Fachetti et al. Adv Mater, 2005, 17, p 1705) :
Il s'agit par exemple d'un diélectrique organique photo-réticulable, et plus précisément d'une résine de type époxy. Il s'agit d'un mélange de 49.5% en poids de poly(4- vinylphénol) (PVP), de 49.5%> en poids de triglycidyl éther de triméthylolpropane, de 0.5%> en poids de peroxyde de benzoyle et de 0.5%> en poids de triflate de triphenylsulfonium. The crosslinkable dielectric polymer (10), which can be used in low gate architecture, can be chosen from the following list (A. Fachetti et al., Adv Mater, 2005, 17, p. This is for example a photo-crosslinkable organic dielectric, and more specifically an epoxy resin. It is a mixture of 49.5% by weight of poly (4-vinylphenol) (PVP), 49.5% by weight of trimethylolpropane triglycidyl ether, 0.5% by weight of benzoyl peroxide and 0.5% by weight. by weight of triphenylsulfonium triflate.
Ce mélange est dilué à 10%> en poids dans la cyclohexanone et déposé par sérigraphie ou par tournette sur le substrat (5). Le film obtenu est recuit à 100°C sur une plaque chauffante pendant 5 minutes afin d'évaporer les solvants résiduels de la couche mince de polymère. This mixture is diluted to 10% by weight in cyclohexanone and deposited by screen printing or spin coating on the substrate (5). The resulting film is annealed at 100 ° C on a hot plate for 5 minutes to evaporate the residual solvents of the thin polymer layer.
Ce diélectrique (10) se réticule par application d'une dose UV, par exemple dans les conditions suivantes : This dielectric (10) is crosslinked by applying a UV dose, for example under the following conditions:
puissance de la lampe = 600W ; power of the lamp = 600W;
10 min d'insolation. b/ Procédé de fabrication d'un transistor en architecture grille basse: 10 min of sunstroke. b / Method of manufacturing a transistor in low gate architecture:
Etape 1 : gravure du niveau métallique 1 par photolithogravure ou ablation laser pour créer la grille (8). Les bords de gravure ont peu d'impact au niveau grille sur les propriétés électriques du transistor, la grille étant bien plus large que le canal, les effets de casquettes sont alors en dehors du canal. Toutefois, le procédé selon l'invention pourrait également être mis en œuvre pour la gravure de la grille (8) en interposant, entre le substrat (5) et le niveau métallique 1 , un polymère réticulable, dans les mêmes conditions que décrit ci-dessous pour la gravure de la source et du drain Step 1: etching of the metallic level 1 by photolithography or laser ablation to create the grid (8). The etch edges have little impact at the grid level on the electrical properties of the transistor, the gate being much wider than the channel, the effects of caps are then outside the channel. However, the method according to the invention could also be implemented for etching the grid (8) by interposing, between the substrate (5) and the metal level 1, a crosslinkable polymer, under the same conditions as described above. below for the etching of the source and the drain
Etape 2 : dépôt à la tournette du diélectrique de type époxy décrit ci-dessus (10), recuit 5 min à 100°C sur un substrat (5) PEN/Au (30 nm) ; épaisseur du diélectrique d'environ 800 nanomètres Step 2: Sputter deposition of the epoxy-type dielectric described above (10), annealed for 5 min at 100 ° C on a substrate (5) PEN / Au (30 nm); dielectric thickness of about 800 nanometers
Etape 3 : dépôt PVD d'une couche conductrice d'or (4) (30 nm) sur toute la surface Step 3: PVD deposition of a gold conductive layer (4) (30 nm) over the entire surface
Etape 4 : ablation laser à excimère (fluence = 54 mJ/cm2, λ = 248 nm, 1 puise de 30ns) de la couche conductrice (4), de manière à créer les électrodes source et drain (6, 7) Step 4: excimer laser ablation (fluence = 54 mJ / cm 2 , λ = 248 nm, 30 ns tap) of the conductive layer (4), so as to create the source and drain electrodes (6, 7)
Etape 5: thermo- ou photo-réticulation du polymère diélectrique, plus précisément réticulation par insolation (lampe UV, 10min, 600 W) Step 5: thermo- or photo-crosslinking of the dielectric polymer, more specifically insolation crosslinking (UV lamp, 10 min, 600 W)
Etape 6 : dépôt d'un semi-conducteur (11) de type p, par exemple du pentacène modifié.
Puis encapsulation par un diélectrique de type polymère aliphatique fluoré. Step 6: Deposition of a p-type semiconductor (11), for example modified pentacene. Then encapsulation with a fluorinated aliphatic polymer type dielectric.
Selon la figure 3C, une couche protectrice (10) est en outre déposée sur le substrat (5) pour protéger la grille (8) de l'ablation laser. c/ Comparaison de deux échantillons A et B: According to Figure 3C, a protective layer (10) is further deposited on the substrate (5) to protect the grid (8) from laser ablation. c / Comparison of two samples A and B:
A titre comparatif, le procédé exposé ci-dessus au point b/ a été mis en œuvre sur deux échantillons A et B. L'échantillon B a subi strictement les étapes 1 à 6, avec une réticulation par insolation (lampe UV, 10 min, 600 W) à l'étape 5, c'est-à-dire après ablation laser. L'échantillon A, quant à lui, a subi cette insolation à la lampe UV (10 min, 600W) à l'issue de l'étape 2, c'est-à-dire avant ablation laser. La différence essentielle entre les échantillons A et B réside donc dans le fait que le polymère réticulable (10) est réticulé avant ou après ablation laser du niveau métallique (4), respectivement. By way of comparison, the process described above in point b / was carried out on two samples A and B. Sample B strictly underwent steps 1 to 6, with crosslinking by exposure (UV lamp, 10 min. 600 W) in step 5, i.e. after laser ablation. Sample A, for its part, underwent this exposure to the UV lamp (10 min, 600 W) at the end of step 2, that is to say before laser ablation. The essential difference between samples A and B therefore lies in the fact that the crosslinkable polymer (10) is crosslinked before or after laser ablation of the metal level (4), respectively.
Les caractéristiques de ces deux échantillons sont illustrées aux figures 4 et 5. The characteristics of these two samples are illustrated in Figures 4 and 5.
La figure 4 révèle, pour le diélectrique réticulé (A), la présence importante de casquettes et de refondu sur la couche supérieure ablatée. En revanche, dans le cas du diélectrique non réticulé (B), il est observé une nette diminution des casquettes et du refondu sur la couche supérieure ablatée. FIG. 4 reveals, for the crosslinked dielectric (A), the important presence of caps and remelted on the ablated upper layer. On the other hand, in the case of the uncrosslinked dielectric (B), there is a marked decrease in caps and remelted on the ablated upper layer.
La figure 5 illustre le fait qu'au niveau des caractéristiques électriques de ces deux échantillons, l'échantillon B est nettement meilleur comparativement à l'échantillon A. En effet, les courbes ID en fonction de VD de l'échantillon B reflètent un très bon contact et une bonne injection des électrons entre les deux électrodes source et drain. Grâce à ce procédé, l'injection des électrons dans le canal est donc améliorée, ainsi que la mobilité des électrons. Le courant est donc plus important en régime ouvert.
Figure 5 illustrates that in terms of the electrical characteristics of these two samples, the B sample is significantly better compared to the A sample. Indeed, the ID vs. VD curves of the B sample reflect a very good contact and a good injection of electrons between the two source and drain electrodes. Thanks to this process, the injection of electrons into the channel is thus improved, as well as the mobility of the electrons. The current is more important in open regime.
Claims
1. Procédé de fabrication d'un transistor organique comprenant les étapes suivantes : 1. A method of manufacturing an organic transistor comprising the following steps:
dépôt d'une couche protectrice (10) sur un substrat (5), ladite couche comprenant un matériau réticulable au laser et se présentant sous forme non réticulée ou partiellement réticulée ; depositing a protective layer (10) on a substrate (5), said layer comprising a material crosslinkable by laser and being in uncrosslinked or partially crosslinked form;
dépôt d'une couche conductrice (4), destinée à former les électrodes source et drain (6, 7) ou la grille (8) du transistor, sur la couche protectrice (10) ; depositing a conductive layer (4), intended to form the source and drain electrodes (6, 7) or the gate (8) of the transistor, on the protective layer (10);
gravure au laser de la couche conductrice (4) aboutissant à la formation des électrodes source et drain (6, 7) ou de la grille (8) du transistor ; laser etching the conductive layer (4) resulting in the formation of the source and drain electrodes (6, 7) or the gate (8) of the transistor;
dépôt d'une couche de diélectrique (9) ; depositing a dielectric layer (9);
dépôt de la grille (8) ou des électrodes source et drain (6, 7), depositing the gate (8) or the source and drain electrodes (6, 7),
une couche de semi-conducteur (11) étant déposée à la surface des électrodes source et drain (6, 7). a semiconductor layer (11) being deposited on the surface of the source and drain electrodes (6, 7).
2. Procédé de fabrication d'un transistor organique selon la revendication 1, caractérisé en ce que le dépôt de la grille (8) ou des électrodes source et drain (6, 7) est réalisé par dépôt et gravure au laser d'une couche conductrice (4'). 2. A method of manufacturing an organic transistor according to claim 1, characterized in that the deposition of the gate (8) or the source and drain electrodes (6, 7) is achieved by deposition and laser etching of a layer. conductive (4 ').
3. Procédé de fabrication d'un transistor organique selon la revendication 1 ou 2, caractérisé en ce que la couche de diélectrique (9) est réalisée à l'aide d'un matériau réticulable au laser et se présentant sous forme non réticulée ou partiellement réticulée. 3. A method of manufacturing an organic transistor according to claim 1 or 2, characterized in that the dielectric layer (9) is made using a material crosslinkable laser and is in uncrosslinked or partially crosslinked.
4. Procédé de fabrication d'un transistor organique selon la revendication 1 ou 2, caractérisé en ce qu'une couche protectrice (10) est déposée entre la couche de diélectrique (9) et la grille (8) ou les électrodes source et drain (6, 7). 4. A method of manufacturing an organic transistor according to claim 1 or 2, characterized in that a protective layer (10) is deposited between the dielectric layer (9) and the gate (8) or the source and drain electrodes (6, 7).
5. Procédé de fabrication d'un transistor organique selon l'une des revendications 1 à 4, caractérisé en ce que le transistor organique est un transistor en architecture grille haute et en ce que la couche de semi-conducteur (11) est déposée entre la gravure au laser des électrodes source et drain (6, 7) et le dépôt de la couche de diélectrique (9). 5. A method of manufacturing an organic transistor according to one of claims 1 to 4, characterized in that the organic transistor is a high gate architecture transistor and in that the semiconductor layer (11) is deposited between the laser etching of the source and drain electrodes (6, 7) and the deposition of the dielectric layer (9).
6. Procédé de fabrication d'un transistor organique selon l'une des revendications 1 à 4, caractérisé en ce que le transistor organique est un transistor en architecture grille basse et en ce que la couche de semi-conducteur (11) est déposée après le dépôt des électrodes source et drain (6, 7). 6. A method of manufacturing an organic transistor according to one of claims 1 to 4, characterized in that the organic transistor is a transistor in low gate architecture and in that the semiconductor layer (11) is deposited after the deposition of the source and drain electrodes (6, 7).
7. Procédé de fabrication d'un transistor organique selon l'une des revendications 1 à7. Process for manufacturing an organic transistor according to one of claims 1 to
6, caractérisé en ce que la gravure au laser est réalisée à l'aide d'un laser UV, avantageusement à excimère. 6, characterized in that the laser etching is performed using a UV laser, preferably with excimer.
8. Procédé de fabrication d'un transistor organique selon l'une des revendications 1 à8. Process for manufacturing an organic transistor according to one of claims 1 to
7, caractérisé en ce qu'après la gravure au laser, la couche protectrice (10), et éventuellement la couche de diélectrique (9), subit une étape de réticulation, avantageusement par photo- ou thermo-réticulation. 7, characterized in that after the laser etching, the protective layer (10), and optionally the dielectric layer (9) undergoes a crosslinking step, preferably by photo- or thermo-crosslinking.
9. Procédé de fabrication d'un transistor organique selon l'une des revendications 1 à9. Process for manufacturing an organic transistor according to one of claims 1 to
8, caractérisé en ce que le matériau réticulable au laser et se présentant sous forme non réticulée ou partiellement réticulée est isolant électriquement. 8, characterized in that the laser-crosslinkable material which is in uncrosslinked or partially crosslinked form is electrically insulating.
10. Procédé de fabrication d'un transistor organique selon l'une des revendications 1 à10. Process for manufacturing an organic transistor according to one of claims 1 to
9, caractérisé en ce que le matériau réticulable au laser et se présentant sous forme non réticulée ou partiellement réticulée présente une permittivité inférieure à 5. 9, characterized in that the laser cross-linkable material in non-crosslinked or partially crosslinked form has a permittivity of less than 5.
11. Procédé de fabrication d'un transistor organique selon l'une des revendications 1 à11. Process for manufacturing an organic transistor according to one of claims 1 to
10, caractérisé en ce que le matériau réticulable au laser et se présentant sous forme non réticulée ou partiellement réticulée est choisi dans le groupe comprenant : polyacrylates, résines époxy, époxy acrylates, polyuréthanes, silicones, polyimides et copolyimides, poly(sisesquioxane)s, poly(benzocyclobutène)s, poly(vinylcinnamate)s, polymères aliphatiques perfluorés, poly(vinylphénol). 10, characterized in that the material which can be crosslinked by laser and which is in non-crosslinked or partially crosslinked form is chosen from the group comprising: polyacrylates, epoxy resins, epoxy acrylates, polyurethanes, silicones, polyimides and copolyimides, poly (sisesquioxanes) s, poly (benzocyclobutene) s, poly (vinylcinnamate) s, perfluorinated aliphatic polymers, poly (vinylphenol).
12. Transistor organique en architecture grille haute, susceptible d'être fabriqué à l'aide du procédé selon l'une des revendications I à 5 et 7 à l l, comprenant la structure suivante : 12. Organic transistor in high gate architecture, capable of being manufactured using the method according to one of claims I to 5 and 7 to 11, comprising the following structure:
un substrat (5) ; a substrate (5);
une couche comprenant un matériau réticulé au moins partiellement (10) ; des électrodes source et drain (6, 7) ; a layer comprising at least partially crosslinked material (10); source and drain electrodes (6, 7);
un semi-conducteur organique ou inorganique (11) ; an organic or inorganic semiconductor (11);
une couche de diélectrique (9) ; a dielectric layer (9);
une grille (8). a grid (8).
13. Transistor organique en architecture grille basse, susceptible d'être fabriqué à l'aide du procédé selon l'une des revendications I à 4 et 6 à l l, comprenant la structure suivante : 13. Organic transistor in low gate architecture, capable of being manufactured using the method according to one of claims I to 4 and 6 to 11, comprising the following structure:
un substrat (5) ; a substrate (5);
une couche comprenant un matériau réticulé au moins partiellement (10) ; une grille (8) ; a layer comprising at least partially crosslinked material (10); a grid (8);
une couche de diélectrique (9) ; a dielectric layer (9);
des électrodes source et drain (6, 7) ; source and drain electrodes (6, 7);
un semi-conducteur organique ou inorganique (11). an organic or inorganic semiconductor (11).
Applications Claiming Priority (2)
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FR1053566A FR2959865B1 (en) | 2010-05-07 | 2010-05-07 | REDUCING THE EFFECTS OF CAPS DUE TO LASER ABLATION OF A METAL LEVEL USING A NON-RETICULATED PHOTO- OR THERMO-RETICULABLE POLYMER LAYER |
PCT/FR2011/050923 WO2011138539A1 (en) | 2010-05-07 | 2011-04-21 | Reduction of the effects of cap-like projections, due to laser ablation of a metal level by using a non-crosslinked light- or heat-crosslinkable polymer layer |
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EP2567419A1 true EP2567419A1 (en) | 2013-03-13 |
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CN105185835A (en) * | 2015-07-30 | 2015-12-23 | 京东方科技集团股份有限公司 | Thin film transistor and manufacturing method thereof, array substrate, and display device |
CN105702700B (en) * | 2016-02-02 | 2018-10-26 | 福州大学 | A kind of thin film transistor (TFT) array and preparation method thereof based on laser etching techniques |
CN112969671A (en) * | 2018-11-14 | 2021-06-15 | 法国圣戈班玻璃厂 | Method for selectively etching a layer or stack on a glass substrate |
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KR101007813B1 (en) * | 2003-11-24 | 2011-01-14 | 삼성전자주식회사 | Organic Thin Film Transistor Containing Buffer Layer |
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KR101366545B1 (en) * | 2005-06-01 | 2014-02-25 | 플라스틱 로직 리미티드 | Layer-selective laser ablation patterning |
GB0511132D0 (en) * | 2005-06-01 | 2005-07-06 | Plastic Logic Ltd | Layer-selective laser ablation patterning |
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JP5025124B2 (en) * | 2005-11-24 | 2012-09-12 | 株式会社リコー | ORGANIC SEMICONDUCTOR DEVICE, ITS MANUFACTURING METHOD, AND DISPLAY DEVICE |
US7545042B2 (en) * | 2005-12-22 | 2009-06-09 | Princo Corp. | Structure combining an IC integrated substrate and a carrier, and method of manufacturing such structure |
US7867688B2 (en) * | 2006-05-30 | 2011-01-11 | Eastman Kodak Company | Laser ablation resist |
JP4818839B2 (en) * | 2006-07-19 | 2011-11-16 | 株式会社 日立ディスプレイズ | Liquid crystal display device and manufacturing method thereof |
JPWO2009035036A1 (en) * | 2007-09-14 | 2010-12-24 | コニカミノルタホールディングス株式会社 | Electrode forming method and organic thin film transistor |
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2010
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2011
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2012
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US20050236985A1 (en) * | 2004-04-16 | 2005-10-27 | Dai Nippon Printing Co., Ltd. | Flexible substrate and organic device using the same |
US20090127544A1 (en) * | 2005-07-27 | 2009-05-21 | Mario Schrodner | Method for producing organic electronic devices on solvent-and/or temperature-sensitive plastic substrates |
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Also Published As
Publication number | Publication date |
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CN102918676A (en) | 2013-02-06 |
US20130122648A1 (en) | 2013-05-16 |
KR20130067275A (en) | 2013-06-21 |
FR2959865B1 (en) | 2013-04-05 |
FR2959865A1 (en) | 2011-11-11 |
WO2011138539A1 (en) | 2011-11-10 |
BR112012027923A2 (en) | 2016-08-16 |
JP2013529382A (en) | 2013-07-18 |
US8580605B2 (en) | 2013-11-12 |
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