EP2534681A4 - Bond pad with multiple layer over pad metallization and method of formation - Google Patents

Bond pad with multiple layer over pad metallization and method of formation Download PDF

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Publication number
EP2534681A4
EP2534681A4 EP10845951.2A EP10845951A EP2534681A4 EP 2534681 A4 EP2534681 A4 EP 2534681A4 EP 10845951 A EP10845951 A EP 10845951A EP 2534681 A4 EP2534681 A4 EP 2534681A4
Authority
EP
European Patent Office
Prior art keywords
pad
formation
layer over
multiple layer
metallization
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
EP10845951.2A
Other languages
German (de)
French (fr)
Other versions
EP2534681A2 (en
Inventor
Mathew Varughese
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NXP USA Inc
Original Assignee
NXP USA Inc
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Filing date
Publication date
Application filed by NXP USA Inc filed Critical NXP USA Inc
Publication of EP2534681A2 publication Critical patent/EP2534681A2/en
Publication of EP2534681A4 publication Critical patent/EP2534681A4/en
Pending legal-status Critical Current

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    • H01L24/02Bonding areas ; Manufacturing methods related thereto
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    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01078Platinum [Pt]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/0132Binary Alloys
    • H01L2924/01327Intermediate phases, i.e. intermetallics compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
EP10845951.2A 2010-02-12 2010-12-09 Bond pad with multiple layer over pad metallization and method of formation Pending EP2534681A4 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US12/705,021 US8394713B2 (en) 2010-02-12 2010-02-12 Method of improving adhesion of bond pad over pad metallization with a neighboring passivation layer by depositing a palladium layer
PCT/US2010/059662 WO2011100021A2 (en) 2010-02-12 2010-12-09 Bond pad with multiple layer over pad metallization and method of formation

Publications (2)

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EP2534681A2 EP2534681A2 (en) 2012-12-19
EP2534681A4 true EP2534681A4 (en) 2018-01-17

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US (1) US8394713B2 (en)
EP (1) EP2534681A4 (en)
CN (1) CN102754203B (en)
TW (1) TWI529867B (en)
WO (1) WO2011100021A2 (en)

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US8934200B2 (en) 2012-04-25 2015-01-13 Seagate Technology Llc Flex circuit having a multiple layered structure and interconnect
US8765531B2 (en) * 2012-08-21 2014-07-01 Infineon Technologies Ag Method for manufacturing a metal pad structure of a die, a method for manufacturing a bond pad of a chip, a die arrangement and a chip arrangement
US8902547B1 (en) 2013-07-08 2014-12-02 Seagate Technology Llc Multiple layered head interconnect structure
US9111755B1 (en) * 2014-04-25 2015-08-18 Freescale Semiconductor, Inc. Bond pad and passivation layer having a gap and method for forming
US9971970B1 (en) * 2015-04-27 2018-05-15 Rigetti & Co, Inc. Microwave integrated quantum circuits with VIAS and methods for making the same
CN113257766A (en) 2015-08-21 2021-08-13 意法半导体有限公司 Semiconductor device and method for manufacturing the same
JP2017069381A (en) * 2015-09-30 2017-04-06 ルネサスエレクトロニクス株式会社 Semiconductor device and semiconductor device manufacturing method
JP2018164056A (en) * 2017-03-27 2018-10-18 ルネサスエレクトロニクス株式会社 Method of manufacturing semiconductor device
US11121301B1 (en) 2017-06-19 2021-09-14 Rigetti & Co, Inc. Microwave integrated quantum circuits with cap wafers and their methods of manufacture
US11244915B2 (en) 2019-10-31 2022-02-08 Globalfoundries Singapore Pte. Ltd. Bond pads of semiconductor devices
US11444045B2 (en) 2020-08-16 2022-09-13 Globalfoundries Singapore Pte. Ltd. Bonding structures of semiconductor devices

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Also Published As

Publication number Publication date
CN102754203A (en) 2012-10-24
US20110198751A1 (en) 2011-08-18
WO2011100021A2 (en) 2011-08-18
US8394713B2 (en) 2013-03-12
CN102754203B (en) 2015-07-01
EP2534681A2 (en) 2012-12-19
TW201130090A (en) 2011-09-01
TWI529867B (en) 2016-04-11
WO2011100021A3 (en) 2011-11-17

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