EP2526567A1

EP2526567A1 - Lithography-free schottky semiconductor process having the possibility of integrating a protective diode

Info

Publication number: EP2526567A1
Application number: EP11801615A
Authority: EP
Inventors: Domenico Lo Verde
Original assignee: Diotec Semiconductor AG
Current assignee: Diotec Semiconductor AG
Priority date: 2010-12-23
Filing date: 2011-12-22
Publication date: 2012-11-28
Also published as: WO2012084253A1; DE102011122092A1

Abstract

The invention relates to a method for producing a semiconductor diode, in particular a Schottky diode having an integrated protective diode, comprising the following steps: a) producing a N+ layer on a lower face on a Si wafer (silicon wafer) with subsequent surface oxidation of the upper face and lower face; b) introducing, without using lithography, a first recess extending around an area to a first depth into the Si Wafer by means of the oxide layer of the upper face; c) introducing a P⁺ dopant into the first recess; d) removing the remaining oxide layer; e) functionalizing the surface of the top face by means of at least one metal layer; f) functionalizing the surface of the N+ layer of the lower face by means of at least one metal layer; g) introducing, without using lithography, a circumferential second recess to a second depth due to the functionalisation in the first recess; h) filling the second recess with a passivator/isolator; and i) cutting the diode to size in the region of the second recess and attaching the connecting contacts.

Description

"Lithography-free Schottky semiconductor process with possibility of integration of a protective diode"

The invention relates to a method for producing a semiconductor diode, in particular a Schottky diode with

integrated protection diode.

Semiconductor diodes, in particular Schottky diodes can be found in

Field of electronics a variety of applications. A conventional semiconductor diode consists of a layer transition of a semiconductor crystal with a p-doping to an n-doping. In contrast, a Schottky diode has a metal-semiconductor junction.

The conductivity of such a junction of a diode depends on the polarity and magnitude of an operating voltage between the two regions of the diode. The mode of operation of a diode is assumed to be sufficiently known to the person skilled in the art.

The role of a diode is to allow current to flow in a first direction while preventing current flow in the opposite direction. The latter direction is called the reverse direction of the diode. In order to achieve a current flow in the so-called forward direction, however, a certain threshold voltage must be applied and exceeded, which is dependent on the properties of the semiconductor junction. Only after reaching the

Limit value of the threshold voltage switches the diode through, so

CONFIRMATION COPY that a flow of current along the passage direction is made possible.

In addition to the characteristics of the threshold voltage for the forward direction and the type of semiconductor junction is also the maximum reverse voltage at which the diode in

Reverse direction does not provide a conductive connection relevant. Exceeding the corresponding blocking voltage regularly leads to the destruction of the semiconductor junction, since now a forced current flow must take place contrary to the physical conditions of the semiconductor junction.

Conventional p-n diodes have a threshold voltage for the

Passage in the forward direction of about 0.6 to 0.7 volts. For Schottky diodes, this range is already around 0.3 to 0.4 volts. In the context of electronic circuits,

For example, in power supplies for electronic devices or similar applications, a plurality of such diodes are installed. This turns the

applied threshold power, which is required for the achievement of the required threshold voltages, as a not inconsiderable size. Especially when using normal p-n junctions, this can already be a

Voltage requirement of several volts come. It has therefore proven itself in electronics, the application of Schottky diodes to the normal diodes preferable because this one lower

Need threshold voltage. The problem with this is, however, that in Schottky diodes, the maximum reverse voltage in

Reverse already starts at about -10 V, so that any voltage fluctuations or voltage spikes in the reverse direction would lead to the early destruction of the electronic circuit.

To avoid such destruction are often parallel to Schottky diodes corresponding protection diodes

which, in the case of a threshold of the

If an applied reverse voltage is exceeded, the voltage across the protection diode may drop, without current flowing through the Schottky diode produce. A disadvantage of the arrangement of corresponding protection diodes, however, is that they must be installed as a separate component, which leads to additional space requirements especially in miniaturized circuits and the

Further additional costs or an increased

To bring manufacturing costs.

The object of the invention is therefore to provide a Schottky diode with appropriate protection diode and the

reduce related manufacturing costs.

According to the invention this object is achieved by a

Manufacturing method for a semiconductor diode with the

Process steps according to claim 1 solved. advantageous

Further developments and expedient embodiments of

Methods are given in the dependent claims.

The inventive method for producing a

Semiconductor diode, in particular a Schottky diode with

Integrated protection diode is characterized by the following process steps: a) Production of an N + layer on a bottom side

a silicon wafer with subsequent

Surface oxidation of the top and bottom;

b) lithography-free introduction of a range

circumferential first recess to a first depth through the top oxide layer in the silicon wafer;

c) introducing a P ⁺ doping into the first well; d) removing the remaining oxide layer;

e) functionalizing the surface of the upper side by at least one metal layer;

f) functionalizing the surface of the n ⁺ -layer of the underside by at least one metal layer; g) lithography-free introduction of a circumferential second recess to a second depth through the

Functionalization and P ⁺ doping in the first well;

h) filling the second well with a Passivator / insulator;

i) cutting the diode in the area of the second recess.

By using the method according to the invention it is achieved that in the central region of the produced diode, which has a metal-semiconductor junction, a

Schottky diode functionality arises. Surrounding this, a p-n semiconductor junction lying deeper inside the wafer, which represents the protective diode function, is generated in the region of the first introduced depression. The

inventive task of a space-saving and integrated solution of a Schottky diode with protection diode is met in this way. In addition, that represents

inventive method is a significant cost savings in that on the lithographyless introduction of the wells on complex lithographic processes for

Structuring the semiconductor can be dispensed with subsequent etching processes or other processing. The

Making corresponding diodes is this way

considerably simplified and thus more cost-effective.

The developments of the invention

Manufacturing method according to the dependent claims 2 to 5 are in the following embodiment of a

Process execution shown in more detail. However, the invention is not limited to the embodiment described

limited, it includes all those

Manufacturing process, which of the invention essential

Thoughts, in particular the procedural steps of the

independent claim 1 make use.

Furthermore, a diode is claimed which was produced by the process according to the invention.

In the context of the embodiment show

Figure 1 to Figure 15 is a stepwise embodiment of the invention

Manufacturing process for Production of a semiconductor Schottky diode with integrated protective diode;

16 shows a finished chip in plan view, which was produced by the method according to the invention.

FIG. 1 shows the method step according to the invention

Making an N ⁺ Layer on the Bottom of a Silicon Wafer 1. The N ⁺ layer is formed by inserting a N ⁺ layer

Doping, in particular a phosphorus doping 2 achieved.

Figure 2 shows a subsequent surface oxidation of the two planar surfaces of the silicon wafer, in which silicon oxide 3 has formed on the surfaces of the N-layer 4 of the top and the N ⁺ layer 5 of the bottom.

FIG. 3 shows the lithographyless introduction of a first depression 6 through the silicon oxide layer 3 into the N layer 4 of the silicon wafer 1 up to a first depth d 1 in the silicon wafer 1. The first recess 6 is introduced circumferentially around a central region 7, which remains as an island with a silicon oxide layer 3 remaining thereon.

FIG. 4 shows the deposition of a dopant, in particular a boron dopant 8, carried out in a further method step.

FIG. 5 shows the region then produced by means of diffusion (preferably thermally induced) of the dopant, in particular of the boron dopant 8, into the N layer 4 of the silicon wafer 1, which then provides a region of P ⁺ doping there. The corresponding P ⁺ -doped region 9 is present only in the first recess 6, since present in the

Silicon oxide layer 3 on the top and bottom of the silicon wafer and on top of it

applied dontanden layer was removed. FIG. 6 shows one applied by means of sputtering, vapor deposition or chemically (in particular wet-chemically)

Metal layer 10, which is preferably formed as a platinum layer. The metal layer completely covers the entire region of the upper side, so that it makes contact both in the region of the first depression 6 with the P ⁺ region 9 and in the middle region 7 with the silicon wafer 1 on the N layer 4.

Figure 7 then shows the process step of forming a Schottky junction by a metal silicide reaction, in particular a platinum silicide reaction, which at the

Surface is executed. The middle region 7 thus has a direct semiconductor-metal transition, preferably in the form of a platinum-silicide layer 10a, whereby a Schottky diode junction is produced.

FIG. 8 shows the functionalization of the surface, which is preferably applied by means of sputtering

Embodiment, a titanium-tungsten layer 11 has been completely applied to the surface. In this case, the titanium tungsten layer 11 completely covers the platinum silicide layer 10a, and contributes to the corresponding functionalization.

FIG. 9 shows a further step of functionalizing the surface by applying a nickel layer 12, which is applied by sputtering, by vapor deposition or chemically covering the entire surface.

FIG. 10 shows a further method step in the context of the functionalization by metal layers of the surface, wherein in FIG. 10 the application of a gold layer 13 also covers the surface by means of sputtering

is shown. The functionalizing layer structure of the surface is now in the central region 7, starting from the N-layer of the silicon wafer 1 by a platinum silicide layer 10a, a titanium-tungsten layer 11, a

Nickel layer 12 and a gold layer 13 in different layer thicknesses together. Other

Compositions on metal or metal component layers are possible depending on the application, as far as they are for the

Contacting and the stabilization of the resulting chip are useful.

In the region of the first recess 6 is between the N-layer 4 of the silicon wafer 1 and described

Functionalization a P ⁺ doping 9 arranged.

11 shows a functionalization of the lower side of the silicon wafer 1 in the region of the N ⁺ layer 5, wherein in the present case a titanium layer 14, a nickel layer 15 arranged thereon and a gold layer 16 arranged thereon from the N ⁺ layer 5 of the silicon wafer 1 was applied by sputtering. Again, there are others

appropriate compositions of the layer structure conceivable.

FIG. 12 shows a further method step, the middle region 7 being surrounded again by the lithography-free introduction of a circumferential second depression 20 into the region of the first depression 6 to a second depth d2 into the N layer 4 of the silicon wafer 1. The second recess 20 is arranged in the interior of the first recess 6, so that laterally between the central region 7 and the second recess 20, a transition region 21 remains. This

Transition region 21 represents the protective diode in the finished chip of the diode.

FIG. 13 shows a further method step of FIG

inventive method, wherein in the second recess 20, a passivator / insulator 22 has been introduced.

FIG. 14 shows the further method step of the chip blank, wherein in the region of the second recess 20, through the passivator 22, the chip has been completely cut circumferentially about the central region 7 in order to provide the component of the diode to be produced separately. FIG. 15 shows the cross-section of the finished chip of a Schottky diode in the middle region 7 with protective diode arranged adjacently in the transition region 21. Corresponding contacts of the individual regions are not shown here.

FIG. 16 shows a schematic illustration of a top view of a diode produced according to the invention, wherein the middle region 7, which represents the Schottky functionality, is surrounded by the transition region 21, which comprises the Schottky interface

Protective diode function provides, and this in turn

surrounding by the insulator layer 22, is shown.

On the knowledge familiar to the expert, in particular with respect to the application of individual metal layers

Semiconductor surface by means of sputtering or the

Process parameters to achieve this

Diffusion reactions for dopants are expressly referred to.

The term lithography-free introduction of a depression means any kind of mechanical processing,

For example, sawing, notching, milling or cutting to understand. The core of this process is that no expensive

lithographic equipment, masks, paint processes or other sensitive components are needed, which in particular often require working in a clean room.

In addition to the layer structure shown, in a further embodiment, a layer structure on top of the diode of a metal-silicide layer, one on it

arranged titanium layer, a turn arranged thereon nickel layer for adhesion and a gold layer intended for contacting conceivable. The underside can also be provided in this case with a layer structure of titanium, nickel and gold, starting from the surface of the affer. List of reference numbers:

1 silicon filler

2 phosphor paper dopant

3 silicon oxide

4N layer

5 N ⁺ layer

6 first well

7 middle range

8 boron dopant

9 P ⁺ area

10 platinum layer

10a platinum silicide layer

11 titanium tungsten layer

12 nickel layer

13 gold layer

14 titanium layer

15 nickel layer

16 gold layer

20 second well

21 transition area

22 Passivator / insulator dl first depth

d2 second depth

Claims

Claims :

1. A method for producing a semiconductor diode,

in particular a Schottky diode with integrated

Protective diode, comprising the following steps:

a) production of an N + layer on a lower side on a sider (silicon afer) with subsequent surface oxidation of the upper and lower side;

b) lithographically introducing an area

circumferential first recess to a first depth in the Si wafer through the oxide layer of the top;

c) introducing a P ⁺ doping into the first well;

d) removing the remaining oxide layer;

e) functionalizing the surface of the upper side by at least one metal layer;

f) functionalization of the surface of the N + layer of the

Underside by at least one metal layer;

g) lithographically introducing a circumferential second depression to a second depth by the functionalization in the first depression;

h) fill the second well with a

Passivator / Isolator;

i) cutting the diode in the region of the second recess and attaching the connection contacts.

2. A method for producing a semiconductor diode according to claim 1, characterized in that the metal layer for functionalizing the surface of the upper side comprises a metal silicide layer and at least one further metal layer, in particular platinum silicide layer, a titanium tungsten layer, a nickel Layer as well as a gold layer.

3. A method for producing a semiconductor diode according to

Claim 1 or 2, characterized in that the

Metal layer for functionalizing the surface of the

Top and / or the underside comprises one or more metal layers applied by a sputtering process.

4. A method for producing a semiconductor diode according to any one of the preceding claims, characterized in that the metal layer for functionalizing the surface of the underside comprises a titanium layer, a nickel layer and a gold layer.

5. A method for producing a semiconductor diode according to any one of the preceding claims, characterized in that the lithographielose introduction of the first and / or the second recess is carried out by a sawing process.