EP2491491A1 - Electronic control unit having a real-time core managing partitioning - Google Patents
Electronic control unit having a real-time core managing partitioningInfo
- Publication number
- EP2491491A1 EP2491491A1 EP10771341A EP10771341A EP2491491A1 EP 2491491 A1 EP2491491 A1 EP 2491491A1 EP 10771341 A EP10771341 A EP 10771341A EP 10771341 A EP10771341 A EP 10771341A EP 2491491 A1 EP2491491 A1 EP 2491491A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- real
- partition
- tasks
- time kernel
- task
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
- G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
- G06F9/5011—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals
- G06F9/5016—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals the resource being the memory
Definitions
- the present invention relates to an electronic control unit with real-time kernel managing a partitioning.
- the present invention is more particularly intended for aeronautical applications.
- FADEC Edinburgh full authority digital engine control
- FADEC a control unit comprising a microcontroller integrating an operating system software to perform operations. IT application tasks. These applications can be executed in whole or in part simultaneously.
- the operating system incorporates a Real-Time Operating System (RTOS) to manage application execution and provide data routing between two applications and between applications and hardware. Partitioning is planned with partitions allocated to each application to prevent applications from interfering with each other during their execution. This partitioning is governed in the aeronautical field by the ARINC 653 standard, which provides for spatial partitioning, which guarantees that an application can not write to a memory area assigned to a partition of another application, and a temporal partitioning that guarantees that execution time will be allocated to each application.
- ARINC 653 which provides for spatial partitioning, which guarantees that an application can not write to a memory area assigned to a partition of another application, and a temporal partitioning that guarantees that execution time will be allocated to each application.
- the context of the first task i.e., the set of values of microcontroller states that are necessary for its execution and are notably recorded in the memory registers of the microcontroller
- the changes of context are thus relatively long and all the more so as the microcontrollers include a number of registers to be saved more and more importantly. Partition changes are just as long for the same reasons. This is an additional disadvantage of multi-tasking kernels compatible with the ARINC 653 standard.
- An object of the invention is to provide a control unit offering a strong spatial and temporal partitioning.
- an electronic control unit comprising a microcontroller provided with a read-only memory containing a code of an operating software system incorporating a real-time kernel for performing computer tasks, and a dynamic memory containing variable data in relation to the tasks.
- the read-only memory and the dynamic memory comprise zones assigned to partitions allocated for one to the real-time kernel and for others each to at least one of the tasks.
- the read-only memory and the dynamic memory are associated with a physically programmed address bus to prevent each partition, on the one hand, from writing to another zone of the dynamic memory and, on the other hand, to execute a other areas of the ROM and the real-time kernel is associated with a delay to allocate each partition a run time.
- the address bus is physically programmed so that a task executed in a partition has no hardware means for writing data or executing code in another partition than that allocated to it.
- the exchange of data between partitions can not be done physically without going through the real-time kernel via the programming of the address bus.
- the real-time kernel thus ensures the integrity of the data of the partitions other than those being executed.
- the real-time kernel further ensures that each task can be executed by allocating each task a time window of execution. Tasks can then run concurrently, minimizing the risk of mutual disruption of their execution.
- the real-time kernel is arranged to control the execution of the partitions according to a circular execution cycle and, more preferably, the execution cycle may comprise the same partition several times.
- the run cycle includes a time reserve interval.
- the time reserve makes it possible to add one or more tasks in a simple way without a complete reworking of the execution cycle.
- the partition allocated to the real-time kernel contains memory pages each allocated to a task for containing the registers of each task, the real-time kernel being arranged to manage a task pointer intended to to contain the address of the page of the running task.
- the partition allocated to the real-time kernel contains a list of tasks that are ready to be executed per partition and the real-time kernel is arranged to manage a partition pointer to access the list of tasks. ready, and preferably, the list of ready tasks is in the form of a chaining header that contains the context addresses of the first and the last of the tasks that are ready to be executed.
- FIG. 1 is a schematic representation of the spatial partitioning of the read-only memory and the random access memory
- FIG. 2 is a schematic representation of the control unit according to the invention showing in particular the organization of the partitioning of the alive,
- FIG. 3 is a schematic representation of the scheduling of partitions.
- the invention is here described in an aeronautical application for the regulation of one or more engines of an aircraft.
- the control unit here is of the FADEC type and complies with the ARINC 653 standard.
- control unit is a microcircuit of type SOC (English “System On Chip") comprising the instruction set of a microcontroller and its peripherals.
- the control unit can also be implemented in the form of a programmable logic array or FPGA (Field Programmable Gate Array).
- FPGA Field Programmable Gate Array
- the microcontroller can be written in VHDL language and reprogrammable.
- the control unit thus comprises a microcontroller 1 provided with a read-only memory 2 or ROM (for "Read Only Memory”) and a random access memory 3 or dynamic memory (also called RAM for "Random Access Memory”).
- the control unit furthermore comprises, in particular, unrepresented means of connection to sensors arranged on the engine (s) and to control instruments arranged in the cockpit of the aircraft.
- the read only memory 2 has partitions assigned to partitions (PO to P3) allocated for one to the code of an operating software system and for others to the application code or computer programs comprising tasks.
- the ROM 2 is associated with a physically programmed address bus so that each partition can not execute code in another area of the ROM than the one assigned to it.
- the operating system software incorporates a real-time kernel whose functions are to ensure the scheduling of the tasks and to guarantee the respect of predetermined temporal constraints for the execution of the tasks.
- the partition PO is thus allocated to the code of the real-time kernel and the other partitions (here the partitions PI to P3) are each allocated to the code of one or more tasks (here tasks Tl to T6).
- RAM 3 has partitions assigned to partitions (PO to P3) allocated for one to the real-time kernel and for others each to at least one of the tasks and is associated with a physically programmed address bus for each partition can not write to another area of the RAM that has been assigned to it.
- the partition PO is thus allocated to the data and other variables of the real-time kernel and the other partitions (here the partitions PI to P3) are each allocated to the data of one or more tasks (here the tasks Tl to T6).
- a buffer for the code and a buffer for the data of the partition PO allocated to the real-time kernel .
- the real-time kernel is further arranged to implement a delay to allocate each partition PI to P3 execution time.
- a timer is a multiple of a basic cycle clocked by an interrupt of the microcontroller's clock and the task activated by this interrupt calls the time routine of the real-time kernel so that the real-time kernel takes over. checks at each of these interrupts to decide whether the execution of the current partition should be suspended.
- the real-time kernel is here more particularly designed to control the execution of partitions and therefore tasks according to a circular execution cycle.
- the execution cycle includes a time reserve interval R allowing the addition of new partitions by taking the execution time thereof to the time reserve.
- the partition P0 allocated to the real-time kernel contains memory pages (PMI to PM6) each allocated to a task (Tl to T6) for containing the memory registers. that task, the real-time kernel being arranged to manage a task pointer (PT) for containing the address of the page of the task being executed.
- PT task pointer
- the partition PO allocated to the real-time kernel contains a list of tasks ready to be executed per partition (LTP1 to LTP3) and the real-time kernel is arranged to manage a partition pointer (PP) to access the list of ready tasks ( LTP1 to LTP3).
- PP partition pointer
- Each list of ready tasks (LTP1 to LTP3) is in the form of a chaining header that contains the context addresses of the first and last tasks that are ready to be executed.
- the real-time kernel maintains the list of tasks ready based on the occurrence of events (such as function calls or interrupts) triggering said tasks. In addition, the real-time kernel takes into account any priorities assigned to each task to order the list of ready tasks.
- the real-time kernel triggers a timer and, at the end of the delay, suspends the execution of the partition to start the execution of the ready tasks of the next partition.
- the partition change is done by updating the partition pointer.
- the change of context prior to the execution of a new task is done by introducing in the task pointer PT the address of the memory page containing the registers of the task to be executed.
- the structure of the control unit described above allows a particularly effective implementation of context change mode of the invention because it allows in particular changes in the instruction set and peripherals of the microcontroller.
- the change of context (task or partition) is fast and of constant duration. Indeed, its duration is independent, on the one hand, of the number of internal registers of the microcontroller and, on the other hand, the number of tasks ready or the number of partitions to manage.
- the invention thus enables multitasking and real time operation of the microcontroller while complying with the ARINC 653 standard by limiting the cost of the control unit.
- the partition PO allocated to the real-time kernel contains other linked lists for managing the resources of the real-time kernel (timers, queues, etc.).
- the partitions may have the same or different sizes.
- the run cycle can include the same partition one or more times.
- the read-only memory 2 may also be EEPROM (for "Electrically Erasable Programmable Read Only Memory") or NVM (for "Non Volatile Memory”).
Abstract
Description
Claims
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0905077A FR2951840B1 (en) | 2009-10-22 | 2009-10-22 | ELECTRONIC CONTROL UNIT WITH REAL-TIME CORE MANAGING PARTITIONING |
PCT/EP2010/006361 WO2011047823A1 (en) | 2009-10-22 | 2010-10-19 | Electronic control unit having a real-time core managing partitioning |
Publications (1)
Publication Number | Publication Date |
---|---|
EP2491491A1 true EP2491491A1 (en) | 2012-08-29 |
Family
ID=42226714
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP10771341A Ceased EP2491491A1 (en) | 2009-10-22 | 2010-10-19 | Electronic control unit having a real-time core managing partitioning |
Country Status (8)
Country | Link |
---|---|
US (1) | US8843937B2 (en) |
EP (1) | EP2491491A1 (en) |
CN (1) | CN102597956B (en) |
BR (1) | BR112012009290A2 (en) |
CA (1) | CA2777729C (en) |
FR (1) | FR2951840B1 (en) |
RU (1) | RU2524570C2 (en) |
WO (1) | WO2011047823A1 (en) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104834567B (en) * | 2015-04-13 | 2018-04-17 | 中国航空无线电电子研究所 | A kind of subregion and application time window accordance detecting system |
US9857975B2 (en) | 2015-06-26 | 2018-01-02 | International Business Machines Corporation | Non-volatile memory drive partitions within microcontrollers |
FR3071630B1 (en) | 2017-09-25 | 2021-02-19 | Schneider Electric Ind Sas | MANAGEMENT PROCESS OF ONBOARD SOFTWARE MODULES FOR AN ELECTRONIC COMPUTER OF AN ELECTRICAL SWITCHING APPARATUS |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
SU1826787A1 (en) * | 1990-07-18 | 1995-12-20 | Научно-производственное объединение "Сфера" | Processor |
US6338074B1 (en) * | 1997-07-23 | 2002-01-08 | Filenet Corporation | System for enterprise-wide work flow automation |
RU10896U1 (en) * | 1998-04-27 | 1999-08-16 | Общество с ограниченной ответственностью "Радуга" | PROGRAMMABLE CONTROLLER |
FR2822971A1 (en) * | 2001-04-03 | 2002-10-04 | St Microelectronics Sa | SYSTEM AND METHOD FOR CONTROLLING ACCESS TO PROTECTED DATA STORED IN A MEMORY |
US7805514B2 (en) * | 2003-08-26 | 2010-09-28 | Yang Harold Haoran | Accessing results of network diagnostic functions in a distributed system |
US8789051B2 (en) * | 2004-11-18 | 2014-07-22 | Hamilton Sundstrand Corporation | Operating system and architecture for embedded system |
RU57497U1 (en) * | 2006-03-14 | 2006-10-10 | Олег Юрьевич Уваров | DEMO STAND |
-
2009
- 2009-10-22 FR FR0905077A patent/FR2951840B1/en not_active Expired - Fee Related
-
2010
- 2010-10-19 CN CN201080048156.7A patent/CN102597956B/en not_active Expired - Fee Related
- 2010-10-19 EP EP10771341A patent/EP2491491A1/en not_active Ceased
- 2010-10-19 WO PCT/EP2010/006361 patent/WO2011047823A1/en active Application Filing
- 2010-10-19 RU RU2012120848/08A patent/RU2524570C2/en not_active IP Right Cessation
- 2010-10-19 BR BR112012009290A patent/BR112012009290A2/en not_active IP Right Cessation
- 2010-10-19 CA CA2777729A patent/CA2777729C/en not_active Expired - Fee Related
- 2010-10-19 US US13/502,460 patent/US8843937B2/en not_active Expired - Fee Related
Non-Patent Citations (2)
Title |
---|
None * |
See also references of WO2011047823A1 * |
Also Published As
Publication number | Publication date |
---|---|
CA2777729C (en) | 2015-06-09 |
CN102597956A (en) | 2012-07-18 |
RU2524570C2 (en) | 2014-07-27 |
BR112012009290A2 (en) | 2016-05-31 |
US20120216213A1 (en) | 2012-08-23 |
RU2012120848A (en) | 2013-11-27 |
WO2011047823A1 (en) | 2011-04-28 |
CN102597956B (en) | 2016-02-24 |
US8843937B2 (en) | 2014-09-23 |
FR2951840A1 (en) | 2011-04-29 |
CA2777729A1 (en) | 2011-04-28 |
FR2951840B1 (en) | 2011-12-23 |
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