EP2449487A1 - Method for estimating the lifespan of a deep-sub-micron integrated electronic circuit - Google Patents
Method for estimating the lifespan of a deep-sub-micron integrated electronic circuitInfo
- Publication number
- EP2449487A1 EP2449487A1 EP10726535A EP10726535A EP2449487A1 EP 2449487 A1 EP2449487 A1 EP 2449487A1 EP 10726535 A EP10726535 A EP 10726535A EP 10726535 A EP10726535 A EP 10726535A EP 2449487 A1 EP2449487 A1 EP 2449487A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- component
- failure
- test
- wear
- lifetime
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
- 238000000034 method Methods 0.000 title claims abstract description 36
- 230000007246 mechanism Effects 0.000 claims abstract description 69
- 230000010354 integration Effects 0.000 claims abstract description 5
- 238000012360 testing method Methods 0.000 claims description 54
- 238000005516 engineering process Methods 0.000 claims description 20
- 230000001133 acceleration Effects 0.000 claims description 15
- 238000004458 analytical method Methods 0.000 claims description 8
- 238000004364 calculation method Methods 0.000 claims description 8
- 230000007613 environmental effect Effects 0.000 claims description 4
- 230000008569 process Effects 0.000 claims description 4
- 230000002441 reversible effect Effects 0.000 claims description 4
- 230000035945 sensitivity Effects 0.000 claims description 4
- 230000002902 bimodal effect Effects 0.000 claims description 3
- 238000012512 characterization method Methods 0.000 claims description 3
- 238000009826 distribution Methods 0.000 claims description 3
- 238000005538 encapsulation Methods 0.000 claims description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 9
- 229910052710 silicon Inorganic materials 0.000 description 9
- 239000010703 silicon Substances 0.000 description 9
- 230000004913 activation Effects 0.000 description 7
- 230000015556 catabolic process Effects 0.000 description 7
- 239000000463 material Substances 0.000 description 5
- 238000001465 metallisation Methods 0.000 description 5
- 238000012797 qualification Methods 0.000 description 5
- 238000013459 approach Methods 0.000 description 4
- 230000008901 benefit Effects 0.000 description 3
- 230000007774 longterm Effects 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 238000003860 storage Methods 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 238000006731 degradation reaction Methods 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 230000005684 electric field Effects 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 230000005012 migration Effects 0.000 description 2
- 238000013508 migration Methods 0.000 description 2
- 230000010287 polarization Effects 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 239000000243 solution Substances 0.000 description 2
- DYCJFJRCWPVDHY-LSCFUAHRSA-N NBMPR Chemical compound O[C@@H]1[C@H](O)[C@@H](CO)O[C@H]1N1C2=NC=NC(SCC=3C=CC(=CC=3)[N+]([O-])=O)=C2N=C1 DYCJFJRCWPVDHY-LSCFUAHRSA-N 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 230000001186 cumulative effect Effects 0.000 description 1
- 230000007123 defense Effects 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 230000001066 destructive effect Effects 0.000 description 1
- 230000008030 elimination Effects 0.000 description 1
- 238000003379 elimination reaction Methods 0.000 description 1
- BTCSSZJGUNDROE-UHFFFAOYSA-N gamma-aminobutyric acid Chemical compound NCCCC(O)=O BTCSSZJGUNDROE-UHFFFAOYSA-N 0.000 description 1
- 230000036541 health Effects 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 230000001939 inductive effect Effects 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
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- 238000009413 insulation Methods 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 230000001902 propagating effect Effects 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 238000010206 sensitivity analysis Methods 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 230000002123 temporal effect Effects 0.000 description 1
- 239000003643 water by type Substances 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06Q—INFORMATION AND COMMUNICATION TECHNOLOGY [ICT] SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES; SYSTEMS OR METHODS SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES, NOT OTHERWISE PROVIDED FOR
- G06Q10/00—Administration; Management
- G06Q10/06—Resources, workflows, human or project management; Enterprise or organisation planning; Enterprise or organisation modelling
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/36—Circuit design at the analogue level
- G06F30/367—Design verification, e.g. using simulation, simulation program with integrated circuit emphasis [SPICE], direct methods or relaxation methods
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/39—Circuit design at the physical level
- G06F30/398—Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM]
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2855—Environmental, reliability or burn-in testing
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2119/00—Details relating to the type or aim of the analysis or the optimisation
- G06F2119/10—Noise analysis or noise optimisation
Definitions
- the present invention relates to the field of electronic component manufacturing processes. It relates more specifically to a method for selecting electronic components, in particular substantially sub-micron semiconductors.
- COTS off-the-shelf
- qualification reports and component data sheets provided by IC manufacturers are used to estimate component failure rates, based on Accelerated Testing (AT) and Acceleration Factors (AF). .
- AT Accelerated Testing
- AF Acceleration Factors
- Accelerated tests are performed at the component level and are usually mentioned in the manufacturer's qualification report.
- Activation energy depends on the failure mechanism, and degradation models.
- the failure mechanism is determined by technological and conceptual choices.
- the choice of a small gate length with a SiON gate oxide will favor a charge injection mechanism in the gate. Taking a default activation energy can result in a largely biased estimate of component reliability.
- an overestimated activation energy in an acceleration factor leads to an underestimated failure rate in application.
- VLSI very large scale integration circuits
- An initial step in the process is to collect basic information about the component: manufacturer, foundry and if possible process and technology data.
- the component is then studied using a reverse engineering process at the silicon level.
- the search is conducted in order to establish the identity card of the component at the end-of-line (BEOL) and initial-end-of-line (FEOL) stages, where the extracted information elements are at least:
- a next step is to analyze the sensitivity of the component to its mission profile, as illustrated in the following table of examples of aviation mission profiles:.
- some materials and architectures are known to be more sensitive to certain mechanisms.
- the porosity of the low-k oxide makes it easier for the oxide of the intermediate dielectric layer (ILD) to fail.
- ILD intermediate dielectric layer
- BEOL final foundry stages
- the insulation layer prevents Joule dissipation from propagating through the substrate, inducing thermal acceleration of the silicon failure mechanisms.
- the dynamic power consumption is less in the SOI technology for the same grid length than in the massive substrates, which counterbalances these thermal weaknesses.
- high permitivity permittivity gate oxides seem to be more sensitive to temperature threshold voltage instability mechanisms than conventional SiON oxide, due to a greater physical thickness, a greater number of larger interfaces and the initial presence of mobile charges in the oxide.
- Sensitivity analysis provides an indication of the silicon failure mechanisms that are most likely to occur. By elimination, the predominant mechanisms to be studied are selected, as well as the tests of the qualification report which must be the subject of a subsequent analysis.
- the predominant mechanisms of circuit failure also provide information on the temporal dependence of the failure. Some of them are typical of the bottom of the bathtub curve of reliability and some others are defined as wear mechanisms (Figure 3).
- the reliability is best described by a constant instantaneous failure rate (designated by ⁇ and expressed in FITs - “Failure in Time” or Failure in Time), while for the wear failure mechanism, we will talk about rather than life: time to failure or FTT ( “time to failure”) in hours, at which time the failure probability F (t) reaches the specified value, such as 10 ⁇ 7 or 9 for some 10- aeronautical applications ..
- IC manufacturers typically derive an instantaneous failure rate from a high temperature lifetime test (HTOL) through the ⁇ 2 estimator.
- HTOL high temperature lifetime test
- This estimator is to extrapolate a failure rate from a small sample to a large amount of components with a known confidence coefficient (Figure 4). This method remains acceptable for the failure mechanism occurring when the failure rate is constant and independent of the duration of the test.
- the present invention therefore aims to provide a method responding to the problem described above.
- Presentation of the invention aims to provide a method responding to the problem described above.
- the invention aims a method for estimating the lifetime (TTF APPLI ) of an integrated electronic component of sub-decananometric generation ("deep sub-micron”), linked to a mechanism of wear occurring under particular application conditions defined, said component being of commercial type available on shelf with very large scale of integration (VLSI), clearly sub-micron,
- Step 101 Receiving and storing of predetermined technical information elements on the component, in particular the power supply voltage (s), the technological data (node, FEOL and BEOL description), the technical description of the encapsulation and addressing data of the component,
- Step 106 - analyzing the sensitivity of the component with respect to the particular conditions of use
- Step 116 selection of the most likely bathtub bottom and wear mechanisms, and associated accelerated tests.
- the method further comprises steps:
- Step 111 calculation of an estimated lifetime of the component under test conditions (TTFTEST),
- Step 112 - determining an acceleration factor used to analyze results of at least one accelerated test of the component in relation to the technology of the component and the mission profile.
- Step 108 - acquiring and storing the results of at least one accelerated component lifetime test, if such test results are not available, the type of test being chosen according to a failure mechanism by wear.
- the test bench comprises a means of cooling / heating very local component.
- Step 103 study of the component using a reverse engineering process, in order to determine, in particular, the technological data of the component at the level of the component box, BEOL and FEOL parameters
- Step 105 establishment of a card identity of the component according to a series of predetermined criteria (technology, fault mechanisms inherent to the technology, etc.).
- Step 102 Characterization of the environmental data corresponding to the particular conditions of use provided for the component, in particular the thermal and electrical mission profile.
- Step 110 identification of fault mechanisms observed during failures under test conditions.
- step 111
- the method further comprises a step:
- Step 113, 114 - AAPPLI failure rate calculation and application lifetime TTF APPLIED according to the mechanism-specific AF 1 acceleration factor, from the ATEST failure rate and the TTFTEST lifetime measured during the accelerated tests, by applying the formulas:
- Figure 1 FPGA acceleration factor between the application failure rate and the failure rate under the test conditions for different activation energies for the TDDB ("Time Dielectric Dependent Breakdown") failure mechanism dielectric as a function of time) of the gate oxide (2 nm thick SiON gate oxide),
- FIG. 2 FPGA failure rate under application conditions for different activation energies for the gate oxide TDDB failure mechanism (2 nm of SiON gate oxide),
- Figure 5 probability of component failures as a function of time
- Figure 6 component reliability bath curve for both components under application conditions (30 years, 70 ° C, 3.3 V, 50% operating cycle)
- Figure 7 methodology for estimating the failure rate in a method as described. Detailed description of an embodiment of the invention
- the method as described is in particular intended to be implemented automatically by a suitable electronic device.
- the purpose of the method is to estimate a lifetime of an integrated sub-decananometric generation component, based on the calculation of the failure rate provided by the manufacturer.
- ⁇ TES ⁇ is the failure rate under the test conditions
- the Weibull slope is typical of a wear mechanism.
- a good estimate of service life and failure rate depends on the accuracy of the acceleration factor.
- the literature includes various models generally related to the generation node and the polarization.
- the breakdown time of the gate oxide can be modeled according to four degradation laws:
- Model E is used for a low electric field application
- Models 1 / E and E 05 are used for a high electric field
- the voltage power law is associated with a behavior not in accordance with the Arrhenius law in temperature for a gate oxide of less than 3 nm thick.
- the material and the scale dimensions have consequences for the choice of model parameters.
- the activation energy of the breakdown mechanism of the gate oxide will be different for silica oxides (SiO 2), nitride oxides (SiON) and oxides with a high constant permittivity.
- the actual failure rate and life expectancy in application are then calculated with the mechanism-specific AF 1 factor i, based on the failure rate and the lifetime measured during accelerated tests (Eq.3).
- the method comprises the following steps:
- step 101 receiving and storing predetermined technical information elements on the component, including the power supply voltage (s), the technological data (node, description FEOL and BEOL) and the addressing data of the component,
- step 104 - determining whether the technical data received in step 101 are sufficient, in particular to determine a theoretical failure rate, and otherwise:
- step 103 studying the component using a reverse engineering process, so as to determine in particular the technological data of the component at the component box, BEOL and FEOL parameters.
- step 105 and step 102 are used as inputs to a step 115 of selecting a damage pattern of the component and its parameters
- This step 106 allows in a step 116 a selection of the most effective tub and wear bottom mechanisms, and associated accelerated tests.
- step 107 it is determined whether the accelerated test results as determined in step 116 are available, otherwise, in a step 108, one determines and implements tests to operate on the side of the user to implement before the mechanisms sought, if such test results are not available in the manufacturer's qualification report
- ATEST failure rate
- a step 110 fault mechanisms observed during failures under test conditions are identified.
- the mechanism is a wear mechanism
- the continuity of the failure function is used, and in a step 111 an estimated lifetime of the component under test conditions (TTFTEST) is calculated,
- the acceleration factors used to analyze accelerated test results of the component are determined.
- steps 113 for a bottom bath mechanism
- steps 114 for a wear mechanism
- the actual APPLI FAT rate and the applied TTF life are calculated according to the load factor.
- appropriate AF acceleration based on the ATEST failure rate and the TTFTEST lifetime measured during the accelerated tests, by applying Waters 3 and 4.
- the components are named A and B.
- Both components are submitted to an avionics type mission profile, in this case 3 years in storage, unpowered, at 25 ° C, then for 30 years, junction temperature of 70 ° C, supplied at 3.3 V twelve hours by day.
- the failure mechanism studied is a wear mechanism, the electromigration in the foundry end-stage interconnections ("BEOL").
- the information available from smelters is not sufficient and a destructive physical analysis is performed to obtain the required data.
- Both components have the same end-stage foundry architecture (“BEOL”) with 3 metallization layers and exactly the same dimension of interconnections.
- BEOL end-stage foundry architecture
- component A has aluminum interconnects while component B is made of copper using a double damascene process.
- the metallization width is close to 2 ⁇ m and thus creates a fast diffusion path across the grain boundary, which can induce migration of metal grains in a state of polarization.
- a lifetime test of the oxide at high temperature was performed on 87 samples of component A and 87 samples of component B for 2000 h at 125 ° C (junction) and 3.96 V .
- the maximum failure rate under test conditions can be calculated by equation 5 assuming 60% confidence.
- TTF average failure time
- the most representative acceleration factor for the electromigration test is the Black model.
- TTF is the time before failure
- A is a constant
- J is the current density
- E A is the activation energy
- k is the Boltzmann constant
- T is the temperature.
- the parameter f is the frequency (Hz)
- ⁇ 0 is the dielectric constant in the vacuum
- ⁇ ox is the dielectric constant of the oxide
- V D D is the voltage of the power supply
- d is the minimum pitch between the metallizations.
- the failure rate and the lifetime of the component can be calculated for both components vis-à-vis the mechanism of electromigration.
- component A and component B have the same function, the same architecture and the same generation node, component B has been found to be more suitable than component A for the described avionics application, as shown in FIG. 6.
- BEOL final foundry stages
- the proposed methodology is applied for a wear mechanism: electromigration.
- VLSIs very large scale integration circuits
- sub-micron sub-micron
- the method of the invention is based on a technological analysis that helps to identify the main failure mode and the wear mechanism.
- This new approach allows a correct choice of the accelerated test and a precise calculation of the acceleration factor validating the prediction of lifetime.
Abstract
Description
Claims
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0954496 | 2009-07-01 | ||
PCT/EP2010/059317 WO2011000888A1 (en) | 2009-07-01 | 2010-06-30 | Method for estimating the lifespan of a deep-sub-micron integrated electronic circuit |
Publications (1)
Publication Number | Publication Date |
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EP2449487A1 true EP2449487A1 (en) | 2012-05-09 |
Family
ID=42830773
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP10726535A Ceased EP2449487A1 (en) | 2009-07-01 | 2010-06-30 | Method for estimating the lifespan of a deep-sub-micron integrated electronic circuit |
Country Status (3)
Country | Link |
---|---|
US (1) | US9058574B2 (en) |
EP (1) | EP2449487A1 (en) |
WO (1) | WO2011000888A1 (en) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
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US9619309B2 (en) * | 2012-12-28 | 2017-04-11 | Intel Corporation | Enforcing different operational configurations for different tasks for failure rate based control of processors |
US8839180B1 (en) * | 2013-05-22 | 2014-09-16 | International Business Machines Corporation | Dielectric reliability assessment for advanced semiconductors |
US10387596B2 (en) * | 2014-08-26 | 2019-08-20 | International Business Machines Corporation | Multi-dimension variable predictive modeling for yield analysis acceleration |
US10452793B2 (en) | 2014-08-26 | 2019-10-22 | International Business Machines Corporation | Multi-dimension variable predictive modeling for analysis acceleration |
US10235523B1 (en) | 2016-05-10 | 2019-03-19 | Nokomis, Inc. | Avionics protection apparatus and method |
CN107301285B (en) * | 2017-06-16 | 2020-11-20 | 南京航空航天大学 | Non-electronic product sequential verification test method based on residual life prediction |
US10545553B2 (en) | 2017-06-30 | 2020-01-28 | International Business Machines Corporation | Preventing unexpected power-up failures of hardware components |
CN109376959A (en) * | 2018-12-05 | 2019-02-22 | 广东电网有限责任公司 | A kind of distribution terminal repair time predictor method and device |
CN111881539A (en) * | 2020-05-25 | 2020-11-03 | 中国航天标准化研究所 | Electronic complete machine accelerated storage test acceleration factor risk rate analysis method based on failure big data |
CN112949020B (en) * | 2020-12-10 | 2022-08-12 | 北京航空航天大学 | Method, system, device and medium for determining fatigue life of additive titanium alloy |
Family Cites Families (17)
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US5600578A (en) * | 1993-08-02 | 1997-02-04 | Advanced Micro Devices, Inc. | Test method for predicting hot-carrier induced leakage over time in short-channel IGFETs and products designed in accordance with test results |
US6961687B1 (en) * | 1999-08-03 | 2005-11-01 | Lockheed Martin Corporation | Internet based product data management (PDM) system |
US7260509B1 (en) * | 2001-07-06 | 2007-08-21 | Cingular Wireless Ii, Llc | Method for estimating changes in product life resulting from HALT using quadratic acceleration model |
US6578178B2 (en) | 2001-09-07 | 2003-06-10 | Sun Microsystems, Inc. | Designing integrated circuits to reduce electromigration effects |
US6873932B1 (en) * | 2002-12-20 | 2005-03-29 | Advanced Micro Devices, Inc. | Method and apparatus for predicting semiconductor device lifetime |
US7457725B1 (en) | 2003-06-24 | 2008-11-25 | Cisco Technology Inc. | Electronic component reliability determination system and method |
US20060206246A1 (en) * | 2004-10-28 | 2006-09-14 | Walker Richard C | Second national / international management and security system for responsible global resourcing through technical management to brige cultural and economic desparity |
JP4296160B2 (en) | 2005-03-29 | 2009-07-15 | 株式会社東芝 | Circuit board quality analysis system and quality analysis method |
US7464278B2 (en) * | 2005-09-12 | 2008-12-09 | Intel Corporation | Combining power prediction and optimal control approaches for performance optimization in thermally limited designs |
US20070061184A1 (en) * | 2005-09-13 | 2007-03-15 | Clark John J | Estimation System |
CN101300420B (en) * | 2005-11-01 | 2013-02-13 | 维斯塔斯风力系统有限公司 | Method for prolonging and/or controlling lifetime of one or more heating and/or passive components of wind turbine, wind turbine and use thereof |
US8290753B2 (en) * | 2006-01-24 | 2012-10-16 | Vextec Corporation | Materials-based failure analysis in design of electronic devices, and prediction of operating life |
US20080077376A1 (en) * | 2006-09-25 | 2008-03-27 | Iroc Technologies | Apparatus and method for the determination of SEU and SET disruptions in a circuit caused by ionizing particle strikes |
US8275642B2 (en) * | 2007-01-19 | 2012-09-25 | International Business Machines Corporation | System to improve predictive maintenance and warranty cost/price estimation |
JP5233198B2 (en) * | 2007-08-06 | 2013-07-10 | 富士電機株式会社 | Semiconductor device |
US20100019084A1 (en) * | 2008-07-25 | 2010-01-28 | Sisk David B | Aerospace manufacturing system |
US7808266B2 (en) * | 2008-12-31 | 2010-10-05 | Texas Instruments Incorporated | Method and apparatus for evaluating the effects of stress on an RF oscillator |
-
2010
- 2010-06-30 EP EP10726535A patent/EP2449487A1/en not_active Ceased
- 2010-06-30 US US13/381,112 patent/US9058574B2/en not_active Expired - Fee Related
- 2010-06-30 WO PCT/EP2010/059317 patent/WO2011000888A1/en active Application Filing
Non-Patent Citations (1)
Title |
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See references of WO2011000888A1 * |
Also Published As
Publication number | Publication date |
---|---|
WO2011000888A1 (en) | 2011-01-06 |
US9058574B2 (en) | 2015-06-16 |
US20120143557A1 (en) | 2012-06-07 |
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