EP2404415A4 - Circuits for soft logical functions - Google Patents

Circuits for soft logical functions

Info

Publication number
EP2404415A4
EP2404415A4 EP10749220.9A EP10749220A EP2404415A4 EP 2404415 A4 EP2404415 A4 EP 2404415A4 EP 10749220 A EP10749220 A EP 10749220A EP 2404415 A4 EP2404415 A4 EP 2404415A4
Authority
EP
European Patent Office
Prior art keywords
circuits
logical functions
soft logical
soft
functions
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP10749220.9A
Other languages
German (de)
French (fr)
Other versions
EP2404415A1 (en
Inventor
David Reynold
Benjamin Vigoda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Research Laboratories Inc
Original Assignee
Mitsubishi Electric Research Laboratories Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Research Laboratories Inc filed Critical Mitsubishi Electric Research Laboratories Inc
Publication of EP2404415A1 publication Critical patent/EP2404415A1/en
Publication of EP2404415A4 publication Critical patent/EP2404415A4/en
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/1733—Controllable logic circuits
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06G—ANALOGUE COMPUTERS
    • G06G7/00—Devices in which the computing operation is performed by varying electric or magnetic quantities
    • G06G7/12—Arrangements for performing computing operations, e.g. operational amplifiers
    • G06G7/122—Arrangements for performing computing operations, e.g. operational amplifiers for optimisation, e.g. least square fitting, linear programming, critical path analysis, gradient method
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06G—ANALOGUE COMPUTERS
    • G06G7/00—Devices in which the computing operation is performed by varying electric or magnetic quantities
    • G06G7/12—Arrangements for performing computing operations, e.g. operational amplifiers
    • G06G7/14—Arrangements for performing computing operations, e.g. operational amplifiers for addition or subtraction 
EP10749220.9A 2009-03-02 2010-03-02 Circuits for soft logical functions Withdrawn EP2404415A4 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US15679409P 2009-03-02 2009-03-02
US15673509P 2009-03-02 2009-03-02
PCT/US2010/025950 WO2010101941A1 (en) 2009-03-02 2010-03-02 Circuits for soft logical functions

Publications (2)

Publication Number Publication Date
EP2404415A1 EP2404415A1 (en) 2012-01-11
EP2404415A4 true EP2404415A4 (en) 2015-08-05

Family

ID=42709988

Family Applications (1)

Application Number Title Priority Date Filing Date
EP10749220.9A Withdrawn EP2404415A4 (en) 2009-03-02 2010-03-02 Circuits for soft logical functions

Country Status (3)

Country Link
EP (1) EP2404415A4 (en)
CN (1) CN102449969B (en)
WO (1) WO2010101941A1 (en)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8115513B2 (en) 2009-03-02 2012-02-14 Mitsubishi Electric Research Laboratories, Inc. Circuits for soft logical functions
US8633732B2 (en) 2009-03-02 2014-01-21 Mitsubishi Electric Research Laboratories, Inc. Circuits for soft logical functions
US8458114B2 (en) 2009-03-02 2013-06-04 Analog Devices, Inc. Analog computation using numerical representations with uncertainty
TW201037529A (en) 2009-03-02 2010-10-16 David Reynolds Belief propagation processor
US8972831B2 (en) 2010-01-11 2015-03-03 Analog Devices, Inc. Belief propagation processor
WO2011103565A1 (en) 2010-02-22 2011-08-25 Lyric Semiconductor, Inc. Mixed signal stochastic belief propagation
US9047153B2 (en) 2010-02-22 2015-06-02 Analog Devices, Inc. Selective delay of data receipt in stochastic computation
US10783972B2 (en) * 2018-08-02 2020-09-22 SK Hynix Inc. NAND flash memory with reconfigurable neighbor assisted LLR correction with downsampling and pipelining
US11062758B2 (en) * 2018-09-19 2021-07-13 SK Hynix Inc. Memory system to process multiple word line failures with limited storage and method of operating such memory system
CN113093622B (en) * 2021-04-08 2022-06-07 中国人民解放军火箭军士官学校 Interconnection formula simulation training emulation machine
CN113805942A (en) * 2021-08-23 2021-12-17 北京奕斯伟计算技术有限公司 Processor core, processor and instruction processing method

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6282559B1 (en) * 1998-02-17 2001-08-28 Anadec Gmbh Method and electronic circuit for signal processing, in particular for the computation of probability distributions
US20040136472A1 (en) * 2002-10-15 2004-07-15 Benjamin Vigoda Analog continuous time statistical processing
US20060004901A1 (en) * 2004-02-13 2006-01-05 Winstead Chris J Low-voltage CMOS circuits for analog decoders

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005104376A1 (en) * 2004-04-20 2005-11-03 Koninklijke Philips Electronics N.V. Method to improve error reduction in a digital-to-analog converter and digital-to-analog converter in which this method is applied
US7818653B2 (en) * 2006-09-28 2010-10-19 Sandisk Corporation Methods of soft-input soft-output decoding for nonvolatile memory
US7788312B2 (en) * 2007-01-19 2010-08-31 Mitsubishi Electric Research Laboratories, Inc. Apparatus and method for reducing errors in analog circuits while processing signals

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6282559B1 (en) * 1998-02-17 2001-08-28 Anadec Gmbh Method and electronic circuit for signal processing, in particular for the computation of probability distributions
US20040136472A1 (en) * 2002-10-15 2004-07-15 Benjamin Vigoda Analog continuous time statistical processing
US20060004901A1 (en) * 2004-02-13 2006-01-05 Winstead Chris J Low-voltage CMOS circuits for analog decoders

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
HAGENAUER J ET AL: "Analog decoders and receivers for high speed applications", BROADBAND COMMUNICATIONS, 2002. ACCESS, TRANSMISSION, NETWORKING. 2002 INTERNATIONAL ZURICH SEMINAR ON FEB. 19-21, 2002, PISCATAWAY, NJ, USA,IEEE, 19 February 2002 (2002-02-19), pages 3_1 - 3_8, XP010584383, ISBN: 978-0-7803-7257-3 *
See also references of WO2010101941A1 *

Also Published As

Publication number Publication date
CN102449969B (en) 2015-07-01
CN102449969A (en) 2012-05-09
EP2404415A1 (en) 2012-01-11
WO2010101941A1 (en) 2010-09-10

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Legal Events

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PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

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DAX Request for extension of the european patent (deleted)
RA4 Supplementary search report drawn up and despatched (corrected)

Effective date: 20150706

RIC1 Information provided on ipc code assigned before grant

Ipc: G06G 7/14 20060101ALI20150630BHEP

Ipc: H03K 19/173 20060101ALI20150630BHEP

Ipc: H04L 27/06 20060101AFI20150630BHEP

Ipc: G06G 7/52 20060101ALI20150630BHEP

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