EP2335459B1 - Circuit and method for dimming a luminous element - Google Patents

Description

The invention relates to a circuit and a method for dimming a lamp.

There are different solutions for dimming lamps.

For domestic installations, there are approaches that control a control gear for a lamp with only one switch. The operating device is connected to the mains voltage and is switched on or off via a control input. For this a push button is used. If, after switching on, the buttons are actuated in a certain way, e.g. pressed longer, the operating device dims the light source within a predetermined range, first with decreasing brightness and then with increasing brightness (or vice versa). When the button is released, the current dimming setting is retained. However, such an operating device has the disadvantage that it is permanently connected to the network and thereby causes standby losses.

Furthermore, it is known to impress a dimming function by means of a light switch through a sequence of switching operations "on-off-on". If a desired dimming is reached, it is stored by means of an actuation of the light switch "off" and the light source is switched off. The next time it is switched on, the stored dimming value is set automatically.

Another dimming method is the so-called three-step dimming, which has found widespread use especially in the NAFTA area. Two operating devices are used in one luminaire. Usually operates the first operating device a light source, the second operating device operates two bulbs. The bulbs all have a comparable performance. The luminaire is controlled with two phases. Depending on which phase is switched on, three dimming levels can be realized, the operating devices are either controlled individually or together. If only the first operating device is operated, a light illuminates. If only the second operating device is operated, two lamps light up and both operating devices are activated, all three lamps light up. With lamps of the same power, these dimming levels allow brightness levels of approx. 33%, 66% and 100%. With two operating devices, this variant is very expensive and requires considerable installation effort.

In the case of multilevel electronic ballasts for dimming a luminous means, the mains voltage is switched in stepwise, with each switching state (implemented, for example, by means of several switches) corresponding to a specific dimming position. Common approaches have, in particular, the following disadvantages: A setpoint derived from the voltage at the mains connections for setting the dimming voltage depends on the level of the mains voltage. A strong network-side modulation of the control signals requires careful smoothing, but should not cause overshoot when switching the network connections. In addition, loads that are connected to switched network connections and that are externally connected, or the X capacitors that are present there, also impair the dimming function.

From the EP 1 675 443 A2 An electronic operating device is known which can operate a gas discharge lamp with two different dimming stages, which are dependent on the switching combination of two switches connected to the operating device.

The object of the invention is to avoid the disadvantages mentioned above and in particular to provide an efficient and cost-effective way of dimming a light source.

This object is achieved according to the features of the independent claims. Further developments of the invention will become apparent from the dependent claims.

• umfassend mindestens zwei L-Anschlüsse und einen N-Anschluss,
• wobei aufgrund einer Schaltkombination der L-Anschlüsse das mindestens eine Leuchtmittel dimmbar ist,
• wobei die Spannung an dem N-Anschluss der Netzspannung ausgewertet wird und die Auswertung einer Schaltkombination an den L-Anschlüssen deaktiviert wird solange die Spannung an dem N-Anschluss positiv gegenüber einem internen Massepotential ist.

To solve the problem, a circuit is provided for dimming at least one light source,

• comprising at least two L-ports and one N-port,
• wherein, due to a switching combination of the L connections, the at least one lighting means is dimmable,
• wherein the voltage at the N-terminal of the mains voltage is evaluated and the evaluation of a switching combination at the L-terminals is deactivated as long as the voltage at the N-terminal is positive with respect to an internal ground potential.

In particular, the voltage waveform of the N terminal allows it to mask the dimming functionality, i. the dimming is possible in particular when the voltage curve to the N-terminal meets a predetermined condition. As a result, a phase angle between the signals at the L terminals can be efficiently taken into account, and thus the different switching combinations or switching states can be identified.

Preferably, the N-terminal is a pole of an AC voltage, while the other pole of the AC voltage is connectable to the L-terminals. It should be noted that the N-terminal may be any pole of an AC voltage.

It should also be noted that the concept of dimming may include a change in the direction of increasing or decreasing brightness.

A further development is that, depending on the voltage profile at the N terminal, the at least one lighting means is dimmable provided that the voltage at the N terminal substantially zero or substantially negative to a ground of the circuit (or a ground potential of the circuit, also referred to as "Ground" GND).

In particular, it is thus possible that only the positive half-waves of the mains voltage are taken into account for the evaluation of the L connections: If a switching input indicates a corresponding voltage curve during these positive half-cycles, it can be concluded that the associated switch is also closed for the respective switching input.

Accordingly, the present approach enables efficient masking of the L-ports. This advantageously avoids interference and influences of X capacitors and external loads on the L terminals.

Each switching input can be connected to a terminal or a pole of the mains voltage (in particular a so-called L connection of the mains voltage) via a switch.

Another development is that based on the voltage curve at the N-terminal, a phase angle of the signals at the L-terminals can be detected.

In particular, it is a development that a mains voltage with an L-port and an N-port is provided, wherein the L-port of the Mains voltage is connected to the at least two L-connections.

It is also a development that based on the switching combination of the L connections, a desired value can be determined for setting a lamp control.

Furthermore, it is a development that a microcontroller is provided for determining the desired value and for setting the lamp control.

In an additional development, a microcontroller determines whether the voltage at the N terminal is substantially zero or substantially negative with respect to an internal ground of the circuit.

In particular, the masking functionality described above can be implemented using the microcontroller.

A next development is that the setpoint is largely independent of a voltage fluctuation of the mains voltage adjustable.

Accordingly, the L-connections can be executed decoupled from the setpoint.

One embodiment is that a change in the switching combination is largely free of overshoot.

An alternative embodiment is that a threshold value comparison can be carried out for each switching input.

A next embodiment is that a filter is provided for the reduction of power-frequency modulations.

It is also an embodiment that the switching combinations of the L-terminals are associated with predetermined brightness of the at least one light source.

Such a link can be, for example, that predetermined values (eg as a value table) are stored or that a circuit (eg by means of voltage divider) is parameterized such that predetermined values or signals to a lamp control for adjusting the brightness of the at least one light source can be generated ,

A development consists in that the circuit comprises or is a circuit of an electronic ballast or an extension of a circuit of an electronic ballast.

• bei dem abhängig von einer Schaltkombination von L-Anschlüssen gegenüber einem N-Anschluss das mindestens eine Leuchtmittel gedimmt wird,
• wobei die Spannung an dem N-Anschluss der Netzspannung ausgewertet wird und die Auswertung einer Schaltkombination an den L-Anschlüssen deaktiviert wird solange die Spannung an dem N-Anschluss positiv gegenüber einem internen Massepotential ist.

The above object is also achieved by a method for dimming at least one light source,

• in which, depending on a switching combination of L-terminals with respect to an N-terminal, the at least one lighting means is dimmed,
• wherein the voltage at the N-terminal of the mains voltage is evaluated and the evaluation of a switching combination at the L-terminals is deactivated as long as the voltage at the N-terminal is positive with respect to an internal ground potential.

An embodiment is that, depending on the voltage profile at the N terminal, the at least one lighting means is dimmed when the voltage at the N terminal is substantially zero or substantially negative with respect to an internal ground of the circuit.

Another embodiment is that based on the switching combination of the L terminals, a desired value is determined and depending on the determined setpoint brightness of the at least one light source is set.

It is also a possibility that a phase angle of the signals at the L terminals is determined on the basis of the voltage curve at the N terminal.

Also, to achieve the object, a lamp, luminaire or a lighting system is specified, comprising a circuit as described herein.

Embodiments of the invention are illustrated and explained below with reference to the drawings.

Fig.1

ein Schaltungsbeispiel für ein EVG mit einer Dimmfunktionalität;

Fig.2

einen Spannungsverlauf der Netzspannung (Spannungsverlauf zwischen den Anschlüssen L und N) sowie einen Spannungsverlauf zwischen den Anschlüssen L und der Masse GND;

Fig.3

den Spannungsverlauf der Netzspannung (Spannungsverlauf zwischen den Anschlüssen L und N) sowie einen Spannungsverlauf zwischen dem Anschluss N und der Masse GND;

Fig.4

eine Schaltungsvariante bei der die beiden Eingänge der Dimmsteuerung nicht kurzgeschlossen, sondern unterbrochen werden, solange die Spannung V_N-GND positiv ist.

Show it:

Fig.1

a circuit example of an ECG with a dimming functionality;

Fig.2

a voltage waveform of the mains voltage (voltage waveform between the terminals L and N) and a voltage waveform between the terminals L and the ground GND;

Figure 3

the voltage curve of the mains voltage (voltage waveform between the terminals L and N) and a voltage waveform between the terminal N and the ground GND;

Figure 4

a circuit variant in the not short-circuited, the two inputs of the dimming control, but are interrupted as long as the voltage V _N-GND is positive.

The present approach allows efficient dimming of at least one light source, in particular at least one lamp or a light-emitting diode. For example, the at least one light source is supplied with electrical power via at least one lamp control.

For example, by means of a circuit comprising one input per network connection (L), preferably by means of a pre-filter, a threshold and / or a post-filter suppresses a power frequency modulation of the control signals. Preferably, overshoots are reduced or (largely) avoided when switching between the network inputs. Such overshoots are based for example on the fact that a changed signal is already present before the previous signal has subsided. Also, the circuit can keep a power setpoint within wide limits regardless of the level of the mains voltage (almost) constant.

Advantageously, the presented approach evaluates the voltage at an N-terminal of the mains voltage and deactivates the control or dimming control as long as the voltage at the N-terminal is positive with respect to an internal ground potential. This effectively eliminates noise from X capacitors and external loads on the L terminals.

In this case, it is particularly advantageous that a maximum number of power levels can be implemented for a specific number of power lines (eg 3 different power levels with two L-connections or 7 different power levels with 3 L-connections - in addition to the "power state" of the switched-off light-emitting device ).

Furthermore, it is advantageous that a standard in an electronic ballast power constancy (light is within wide limits, regardless of the level of the mains voltage) can be maintained.

It is also an advantage that a mains frequency luminous flux modulation is not particularly pronounced. The power levels or dimming levels can be switched without overshoot. Any loads on the switched L-connections do not affect the function.

For example, a multi-stage electronic ballast (ECG) is described for dimming at least one light source.

The lighting means may be bulbs of any type. Preferably, the lamp is powered by a lamp control, the lamp control in turn can be controlled by the dimming control accordingly.

It should be noted that the dimming control and the lamp control can be implemented in a single device or in different devices. For example, it is possible to provide the dimming control separately for one or more light sources, wherein each light source can be equipped together with its own lamp control (in particular with its own electronic ballast).

Thus, an electronic ballast with dimming control for a light source is described here by way of example. Accordingly, the dimming control could be performed separately from the electronic ballast or it could be controlled according to several bulbs.

In particular, the multi-level electronic ballast with dimming control has two L-ports La, Lb and one N-port. The desired dimming position (brightness of the illuminant) can be set by setting two switches S1 and S2 according to the following table of values: S1 S2 dimming out out Out one out 10% out one 33% one one 100%

Fig.1 shows a circuit example of an ECG with a dimming functionality.

An AC voltage or mains voltage 135 has an L-terminal and an N-terminal. The L terminal of the mains voltage 135 is connected to a node 133 via a series connection of a switch S1 and a first winding of a filter inductor L1. Furthermore, the L terminal of the mains voltage 135 is connected to an account 132 via a series connection of a switch S2 and a second winding of the filter inductor L1. The N terminal of the mains voltage 135 is connected to a node 131 via a third winding of the filter inductor L1. The center tap of the series connection of the switch S2 and the second winding of the filter inductor L1 is connected to the N terminal via an X capacitor Cx1 and the center tap of the series connection of the switch S1 and the first winding of the filter inductor L1 is connected to the N terminal connected.

A node between the switch S1 and the first winding of the filter inductor L1 is referred to as a terminal La. Accordingly, a node between the switch S2 and the second winding of the filter inductor L1 is referred to as a terminal Lb.

The node 133 is connected to the anode of a diode D3 and to the cathode of a diode D6. The cathode of the diode D3 is connected to a node 136 and the anode of the diode D6 is connected to ground GND. The node 132 is connected to the anode of a diode D2 and to the cathode of a diode D5. The cathode of diode D2 is connected to node 136 and the anode of diode D5 is connected to ground GND. The node 131 is connected to the anode of a diode D1 and to the cathode of a diode D4. The cathode of the diode D1 is connected to the Node 136 and the anode of diode D4 are connected to ground GND.

Between the bank 136 and ground GND, an X-capacitor Cx3 is provided.

A lamp controller 110 is connected on the input side to the node 136 and to ground GND. At the output of the lamp control 110, a lighting means 111 is connected. Furthermore, the lamp controller 110 has an input 134, by means of which a brightness of the lamp 111 is adjustable.

The value for adjusting the brightness is supplied to the input 134 of the lamp controller 110 by means of a dimming controller 120. The dimming controller 120 is connected on the input side to the nodes 131, 132 and 133.

• Der Knoten 131 ist über einen Widerstand R11 mit der Basis eines npn-Transistors Q3 verbunden. Zwischen der Basis und dem Emitter des Transistors Q3 ist ein Widerstand R12 vorgesehen, wobei der Emitter des Transistors Q3 auf Masse GND liegt. Der Kollektor des Transistors Q3 ist mit der Kathode einer Diode D8 und mit der Kathode einer Diode D7 verbunden. Die Anode der Diode D8 ist mit einem Knoten 138 verbunden. Der Knoten 138 ist über einen Widerstand R2 mit dem Knoten 132 verbunden. Auch ist der Knoten 138 über einen Widerstand R4 mit einem Knoten 139 verbunden. Zwischen dem Knoten 139 und der Masse GND ist ein Kondensator C2 vorgesehen. Der Knoten 139 ist über einen Widerstand R6 mit dem Emitter eines pnp-Transistors Q2 verbunden. Der Kollektor des Transistors Q2 ist über einen Widerstand R8 mit einem Knoten 140 verbunden. Zwischen dem Knoten 140 und der Masse GND sind jeweils ein Widerstand R10 sowie ein Kondensator C3 angeordnet. Die Basis des Transistors Q2 ist mit einem Anschluss für eine Bezugsspannung Vref, mit der Basis eines pnp-Transistors Q1 und über einen Widerstand R9 mit dem Knoten 140 verbunden. Der Kollektor des Transistors Q1 ist über einen Widerstand R7 mit dem Knoten 140 verbunden. Der Emitter des Transistors Q1 ist über einen Widerstand mit einem Knoten 141 verbunden. Der Knoten 141 ist über einen Kondensator C1 mit Masse GND verbunden. Weiterhin ist der Knoten 141 über einen Widerstand R3 mit einem Knoten 137 verbunden. Der Knoten 137 ist mit der Anode der Diode D7 und über einen Widerstand R1 mit dem Knoten 133 verbunden.

The dimming control 120 will be described in more detail below:

• The node 131 is connected to the base of an npn transistor Q3 through a resistor R11. Between the base and the emitter of the transistor Q3, a resistor R12 is provided, wherein the emitter of the transistor Q3 is at ground GND. The collector of transistor Q3 is connected to the cathode of a diode D8 and to the cathode of a diode D7. The anode of the diode D8 is connected to a node 138. The node 138 is connected to the node 132 via a resistor R2. Also, the node 138 is connected to a node 139 via a resistor R4. Between the node 139 and the ground GND, a capacitor C2 is provided. The node 139 is connected through a resistor R6 to the emitter of a pnp transistor Q2. The collector of the transistor Q2 is connected to a node 140 via a resistor R8. Between the node 140 and the ground GND, a resistor R10 and a capacitor C3 are arranged in each case. The basis of Transistor Q2 is connected to a terminal for a reference voltage Vref, to the base of a PNP transistor Q1, and through a resistor R9 to node 140. The collector of the transistor Q1 is connected to the node 140 via a resistor R7. The emitter of the transistor Q1 is connected to a node 141 through a resistor. The node 141 is connected to ground GND via a capacitor C1. Furthermore, the node 141 is connected to a node 137 via a resistor R3. The node 137 is connected to the anode of the diode D7 and to the node 133 via a resistor R1.

The node 140 is connected to the input 134 of the lamp controller 110.

In order to effectively enable dimming functionality, the two L terminals La and Lb are preferably designed to supply the lighting means or the lamp control. For this purpose, each L terminal La and Lb and the N terminal has its own pair of diodes (La: D3, D6, Lb: D2, D5, N: D1, D4) for rectifying the AC voltage 135. The rectified AC voltage 136 is the Lamp control 110 supplied.

Preferably, the current-compensated filter inductor L1 is provided for sparking and has three windings, one winding for each of the two L-connections La, Lb and the N-connection.

Furthermore, at least one X-capacitor (Cx1, Cx2) is provided before or after the filter inductor L1 (in front of the rectifier). After the rectifier (according to Fig.1 : Diodes D1 to D6 for rectification), a common X-capacitor Cx3 at the input of the lamp controller 110 may be provided.

Setpoint generation

The dimming controller 120 generates a set point (at the node 140) corresponding to the desired dimming position for the lamp controller 110 depending on the voltage at the L terminals La, Lb.

Fig.2 shows a voltage waveform 210 of the mains voltage 135 (voltage waveform between the terminals L and N) and a voltage waveform 220 between the terminals L and the ground GND.

When the switch S1 is closed, the voltage curve 220 corresponds to the voltage profile at the node La, ie the voltage V _L-GND at La in relation to the internal ground GND comprises the shown power-frequency sinusoidal half-waves 220.

These sine half-waves 220 are used to charge the capacitor C1 through resistors R1 and R3 to a voltage about two to three times higher than the reference voltage Vref (about 5V). Due to the relatively small capacitance of capacitor C1, the voltage at node 141 has still significant power frequency modulation. When this voltage at the node 141 is always higher than a voltage Vref + 0.6V, the transistor Q1 is constantly driven via the resistor R5 and holds its collector at the potential of the reference voltage Vref. Thus, a current flow through the resistor R7 is achieved, which is on the one hand practically free of mains frequency modulation and on the other hand, within wide limits, independent of the level of the mains voltage.

The small residual modulation due to the finite steep base-emitter characteristic of the transistor Q1 is further smoothed by the capacitor C3. The voltage across the resistor R10, due to the current flow through sets the resistance R7, corresponds to a target value for the lamp controller 110 and determines the power level (dimming level) for the switch positions S1 = on and S2 = off.

The same applies to the closing of the switch S2 and the path from the switch S2 to the resistor R8. Thus, two power levels or dimming levels on the resistors R7 and R8 can be adjusted.

An upper power level or dimming level can be composed of the sum of the two dimming levels described above (both switches S1 and S2 are closed). Accordingly, the signal supplied to the lamp controller 110 at its input 134 for adjusting the brightness of the illuminant 111.

In addition, it is also possible that this upper power level is different from the sum of the two lower power levels. This can be adjusted via the resistor R9, wherein the resistor R9 can also be switched between the reference voltage Vref and the actual value input of the regulator if required. Thus, three power levels or dimming levels on the resistors R7, R8, R9 can be adjusted.

Phase correct evaluation

In the switched-off switches S1 or S2, the L-terminals La, Lb are opposite of the internal ground GND is not energized, but are drawn through the X capacitors Cx1 and Cx2 or by externally switched loads on N-potential V _N-GND.

Figure 3 shows the voltage waveform 210 of the mains voltage 135 (voltage waveform between the terminals L and N) and a voltage waveform 230 (V _N-GND ) between the terminal N and the ground GND.

The voltage curves V _L-GND 220 off Fig.2 and V _N-GND 230 off Figure 3 differ in their phase position.

In order to determine whether the switch S1 or the switch S2 is closed, the phase position of the voltages at the terminals La and Lb must be evaluated. This is done by means of the transistor Q3, which is turned on via the resistor R11, as long as the voltage V _N-GND 230 is positive. In this case, the two inputs of the dimming controller 120 are short-circuited via the diodes D7 and D8. This ensures that only the evaluation of in-phase signals takes place. The two diodes D7 and D8 serve to decouple the two inputs (ie nodes 132 and 133).

overshoot

ist es von Vorteil, dass der Kondensator C1 bzw. der Kondensator C2 jeweils so schnell entladen wird, dass nicht gleichzeitig der Transistor Q1 und der Transistor Q2 leitend sind. Ansonsten würde kurzzeitig die obere Dimmstufe eingestellt werden.When switching between the two lower dimming levels, ie $$\mathrm{S}\mathrm{1}=\mathrm{one}.\mathrm{S}\mathrm{2}=\mathrm{out}<->\mathrm{S}\mathrm{1}=\mathrm{out}.\mathrm{S}\mathrm{2}=\mathrm{one}$$

It is advantageous that the capacitor C1 and the capacitor C2 are each discharged so fast that not simultaneously the transistor Q1 and the transistor Q2 are conductive. Otherwise, the upper dimming level would be temporarily set.

A fast discharge of the capacitors C1 and C2 can each be achieved by choosing a relatively small capacitance supported by a periodic stronger discharge by means of the transistor Q3 and the resistors R3 and R4, respectively.

Particularly advantageous is the execution of the thresholds by means of the transistors Q1 and Q2 in Base circuit compared to a simple voltage limitation by means of diodes: Thus, the capacitors C1 and C2 do not have to be fully discharged, but it is sufficient a discharge up to the level of the reference voltage Vref to block the respective signal path.

Alternative circuit (s)

Figure 4 shows a circuit variant in which the two inputs of the dimming controller 120 are not short-circuited, but interrupted as long as the voltage 230 V _{N-GND is} positive.

Figure 4 shows in comparison to Fig.1 a changed dimming control 400. The wiring of the dimming control 400 can be done accordingly Fig.1 respectively. This is indicated by the connections of the dimming control 400 to the nodes 131, 132 and 133 and to the input 134 of the lamp control 110 according to FIG Fig.1 ,

A block 410 within the dimming controller 400 is also found in the dimming controller 120 according to FIG Fig.1 , Block 410 may correspond to nodes 139, 141 and 140 Fig.1 be identified. Accordingly, the description of the Fig.1 directed.

• Der Knoten 131 ist über einen Widerstand R21 mit einem Knoten 431 verbunden. Zwischen dem Knoten 431 und der Masse GND ist ein Widerstand R26 angeordnet.

Subsequently, the dimming controller 400 according to Figure 4 explained in more detail:

• The node 131 is connected to a node 431 via a resistor R21. Between the node 431 and the ground GND, a resistor R26 is arranged.

The node 431 is connected to the base of a pnp transistor Q5 through a resistor R24. The emitter of the transistor Q5 is connected to the node via a resistor R23 133 connected. The collector of the transistor Q5 is connected on the one hand to the node 141 and on the other hand via a resistor R28 to the ground GND.

The node 431 is connected through a resistor R25 to the base of a PNP transistor Q4. The emitter of the transistor Q4 is connected to the node 132 via a resistor R22. The collector of the transistor Q4 is connected on the one hand to the node 139 and on the other hand via a resistor R27 to the ground GND.

The dimming controller 400 uses the two transistors Q4 and Q5, which are only turned on via the resistor R21 as long as the voltage V _{N-GND is} sufficiently small.

Since the dimming controller 400 has no means for periodically discharging the two capacitors C1 and C2, the resistors R28 and R27 are respectively grounded to ensure a sufficiently fast discharge upon switching between the dimming stages.

Another alternative for querying the states of the switches S1 and S2 is the use of a microcontroller. Thus, it is possible to query the voltage V _N-GND by means of the microcontroller and, if it is currently zero or below a certain limit value, to determine a current desired value from the two voltages V _LA-GND and V _{Lb-GND in} accordance with the above table of values ,

The approach presented here can be used to dimming any lamps. In particular, a stepwise dimming can be achieved in an efficient manner. Possible applications include emergency lighting or tunnel lighting.

Claims (16)

1. Circuit for dimming at least one illuminant (111),

   - comprising two L-terminals (La, Lb) and an N-terminal for inputting a mains voltage between the L-terminals (La, Lb) and the N-terminal,

   - comprising a dimming controller (120) for evaluating a switching combination at the L-terminals, wherein the at least one illuminant (111) is dimmable on the basis of the switching combination of the L-terminals (La, Lb),

   characterized in that
   the dimming controller (120) is designed to evaluate the voltage at the N-terminal of the mains voltage and deactivates the evaluation of a switching combination at the L-terminals as long as the voltage at the N-terminal is positive relative to an internal earth potential.
2. Circuit according to any of the preceding claims, wherein a phase angle of signals at the L-terminals (La, Lb) is evaluatable on the basis of a voltage profile at the N-terminal.
3. Circuit according to any of the preceding claims, wherein a mains voltage (135) with an L-terminal and with an N-terminal is provided, wherein the L-terminal of the mains voltage is connected to the at least two L-terminals (La, Lb).
4. Circuit according to any of the preceding claims, wherein on the basis of the switching combination of the L-terminals (La, Lb), a setpoint value is determinable for setting a lamp controller (110).
5. Circuit according to Claim 4, wherein a microcontroller is provided in the dimming controller (120) for the purpose of determining the setpoint value and for the purpose of setting the lamp controller.
6. Circuit according to Claim 5, wherein the microcontroller ascertains whether the voltage at the N-terminal is substantially zero or substantially negative relative to an internal earth of the circuit.
7. Circuit according to any of Claims 4 to 6, wherein the setpoint value is settable largely independently of a voltage fluctuation of the mains voltage.
8. Circuit according to any of the preceding claims, wherein the switching combination is altered in a manner largely free of overshoots.
9. Circuit according to any of the preceding claims, wherein a threshold value comparison can be carried out for each switching input.
10. Circuit according to any of the preceding claims, wherein a filter is provided for reducing mains-frequency modulations
11. Circuit according to any of the preceding claims, wherein the possible switching combinations of the L-terminals (La, Lb) result in predefined brightnesses of the at least one illuminant (111).
12. Circuit according to any of the preceding claims, wherein the circuit comprises or is a circuit of an electronic ballast or an extension of a circuit of an electronic ballast.
13. Method for dimming at least one illuminant (111),

    - wherein the at least one illuminant is dimmed depending on a switching combination at L-terminals (La, Lb) relative to an N-terminal,

    - wherein the voltage at the N-terminal of the mains voltage is evaluated and the evaluation of a switching combination at the L-terminals is deactivated as long as the voltage at the N-terminal is positive relative to an internal earth potential.
14. Method according to Claim 13, wherein, depending on the voltage profile at the N-terminal, the at least one illuminant is dimmed if the voltage at the N-terminal is substantially zero or substantially negative relative to an internal earth of the circuit.
15. Method according to either of Claims 13 and 14, wherein, on the basis of the switching combination of the L-terminals (La, Lb), a setpoint value is determined, and a brightness of the at least one illuminant is set depending on the setpoint value determined.
16. Method according to any of Claims 13 to 15, wherein a phase angle of signals at the L-terminals is determined on the basis of the voltage profile at the N-terminal.

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