EP2294612A1 - Stacked electronic device and process for fabricating such an electronic device - Google Patents

Stacked electronic device and process for fabricating such an electronic device

Info

Publication number
EP2294612A1
EP2294612A1 EP09757529A EP09757529A EP2294612A1 EP 2294612 A1 EP2294612 A1 EP 2294612A1 EP 09757529 A EP09757529 A EP 09757529A EP 09757529 A EP09757529 A EP 09757529A EP 2294612 A1 EP2294612 A1 EP 2294612A1
Authority
EP
European Patent Office
Prior art keywords
level
type
reported
electronic device
connection pad
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
EP09757529A
Other languages
German (de)
French (fr)
Inventor
Jean Brun
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Original Assignee
Commissariat a lEnergie Atomique CEA
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Commissariat a lEnergie Atomique CEA, Commissariat a lEnergie Atomique et aux Energies Alternatives CEA filed Critical Commissariat a lEnergie Atomique CEA
Priority to EP13161161.8A priority Critical patent/EP2610907A1/en
Publication of EP2294612A1 publication Critical patent/EP2294612A1/en
Ceased legal-status Critical Current

Links

Classifications

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Definitions

  • the present invention relates to a stacked electronic device formed of a stack of electronic components to be electrically connected to each other.
  • electronic component is meant any element requiring to be electrically connected to another element and for example an integrated circuit, a passive or active discrete component, a MEMS, NEMS or other.
  • the electronic component can for example group several independent electronic sub-elements.
  • Patent application EP 1 775 768 also discloses an electronic device formed of a base substrate on which three levels of electronic components are stacked. Only the first level of electronic component is connected to conductive tracks provided with pads, carried by the base substrate. This connection is made by conductive micro protrusions supported on one side by the pads and on the other by the electronic component. The assembly is done by conductive glue at the protuberances and by insulating adhesive elsewhere. Each other level of electronic component is assembled in this way at the component level that precedes it. No possibility is foreseen for connect a component level remote from the substrate to the substrate.
  • a disadvantage of the structures disclosed in these documents is that a large number of metals are used to make the connections, these metals coming into direct contact two by two. In these documents are cited copper, silver, titanium, nickel. Corrosion may occur at the interface between these different metals. Another disadvantage is the complexity of the connections of the different levels which leads to expensive electronic devices and poor yields.
  • the object of the present invention is precisely to propose an electronic device stacked at more than two levels with an increased integration density which does not have the drawbacks mentioned above, especially with regard to corrosion and cost.
  • the present invention is a stacked electronic device comprising stacked electronic components distributed over several levels reported on each other from a basic level optionally accommodating at least one electronic component.
  • At least one electrolytic connection pad of the first type of a given reported level directly connects a conductive element placed on one face of an electronic component of the reported level to a conductive element placed on a face opposite a sub-adjacent level.
  • at least one electrolytic connection pad of the second type of the given level crosses right through a coating layer laterally coating the electronic component of the reported level given and directly electrically connects two conductive elements located on either side of said coating layer.
  • the stacked electronic device comprises electrolytic connection pads of the first type of a reported level directly above the given reported level, each is electrically connected to a second type electrolytic connection pad of the reported level reported.
  • a first type of electrolytic connection pad has a height less than that of a second type electrolytic pad, the latter having its height conditioned by the thickness of the electronic component next to it.
  • an electrolytic connection pad of the first type may be a micro-insert or a set of micro-inserts in the form of a pin.
  • an electrolytic connection pad of the first type may be a fuse ball, if the temperature is not too much a constraint.
  • the fuse ball may be made of a fusible material based on indium, lead tin, lead-silver-copper, silver-tin-copper.
  • An electrolytic connection pad of the first type and / or an electrolytic connection pad of the second type may be made based on copper and / or nickel and / or gold.
  • An electronic component of a reported level can be assembled at the underlying adjacent level by gluing.
  • a dielectric layer can coat the coating layer and the electronic component laterally coated with the coating layer of the given level and have at least one opening at level of a top of a second type electrolytic connection pad of the reported reported level.
  • At least one conductive track may extend over the dielectric layer and the opening, this conductive track possibly forming the conductive element placed on a face facing the reported level directly above the given reported level corresponding to one of the two conductive elements located on either side of said coating layer.
  • a first-level electrolytic connection pad of the directly attached level directly above the given level can be located directly in the extension of an electrolytic connection pad second type reported reported level.
  • a first-level electrolytic connection pad of the attached level directly above the given reported level may be shifted relative to a second-type electrolytic pad of the given reported level.
  • the conductive element placed on a face facing the reported level reported electrically connected to a first-level directly connected level electrolytic connection pad directly above the given reported level is preferably a conductive track also connected to the electrolytic connection pad of second type of reported level directly above the given reported level. It is possible that two electrolytic connection pads of the same type of different levels are in the extension of one another.
  • the present invention also relates to a method of making a stacked electronic device comprising the stacked electronic components distributed over at least one level on a welcoming Basic optionally at least one electronic component, wherein: a 0) performs electrodeposited on the base level at least one electrolytic connection pad of the first type, the first type electrolytic pad being in direct electrical contact with a conductive member of the base level; b) relates at least one electronic component of the reported level said first level reported, on the base level and is assembled so that a conductive element carried by a face of the electronic component is in direct electrical contact with the electrolytic connection pad of the first type made in step a 0 ); c) electrolytically performs on the base level at least one electrolytic connection pad of the second type, the electrolytic connection pad of the second type being in direct electrical contact with at least one second conductive element of the base level, this pad of electrolytic connection of second type flush with or exceeding the electronic component of the first reported level; d °) coats the electrolytic connection pad of the second type made in step c
  • a first type connection pad made on the first reported level may be in direct electrical contact with a first conductive element of the first reported level.
  • the method may further comprise the steps in which: f °) relates at least one electronic component of the second level attached to the first level reported and is assembled so that a conductive element carried by one side of the component electronics is in direct electrical contact with the electrolytic connection pad of the first type made in step e °); g 0 ) electrolytically performs on the first level reported at least one electrolytic connection pad of the second type, the second type electrolytic connection pad being in direct electrical contact with a second conductive element of the first reported level, the electrolytic connection pad of second type flush or exceeding the electronic component of the second reported level; h °) coats the electrolytic connection pad of the second type made in step g 0 ) and the electronic component of the second reported level of a coating material, the top of the electrolytic connection pad of the second type being exposed, these steps contribute to achieving the second reported level.
  • the stacked electronic device has more than two reported levels, it is possible to repeat the steps e) at h °) at least one nth time (n greater than or equal to two) so as to obtain n + 1 levels reported, the first reported level becoming the nth-1 level reported, the second reported level becoming the nth reported level, the base level becoming the nth-2 level.
  • the second type electrolytic pad may be located outside the footprint that the reported level electronic component has on the underlying level.
  • steps d °) or h °) the exposure of the top of the electrolytic connection pad of the second type can be obtained by lapping at least the coating material and optionally the electronic component of the first reported level and / or the second level reported.
  • first conductive element and / or the second conductive element of the level base by etching a conductive bottom formed on the surface of the base level.
  • first conductive element and / or the second conductive element of the first reported level by etching a conductive bottom formed on the surface of the first reported level, this conductive bottom surmounting an open dielectric layer at the top of the electrolytic connection pad. of second type realized in step g 0 ).
  • the first conductive element and the second conductive element of the base level may be merged and / or the first conductive element and the second conductive element of the first level reported may be merged.
  • the first type electrolytic connection pad made in step e °) can be grown by electrolysis directly on the top of the electrolytic connection pad of the second type made in step c °).
  • connection pad of the first type made in step e °) turns into a fuse ball, if of course said stud first type of connection is made of a suitable material.
  • step b)) is carried out after step c °) and / or step f °) is carried out after step g 0 ).
  • step b °) when step b °) is carried out before step c °) and / or step f °) is carried out before step g 0 ), the component can be thinned electronic before step c °) and / or step f ° ) •
  • the stacked electronic device comprises several elementary stacked electronic devices
  • the cutout may be a cutout of at least one conductive element for electrically separating the stacked electronic elementary devices.
  • FIGS. 1A to IK illustrate steps of FIG. performing the first reported level of the stacked electronic device of the invention
  • FIGS. 2A and 2B illustrate optional steps for finishing the first reported level of the stacked electronic device of the invention
  • FIGS. 3A to 3E illustrate steps of producing the second reported level of the stacked electronic device of the invention
  • FIGS. 4A, 4B illustrate optional steps for finishing the second reported level of the stacked electronic device of the invention
  • FIGS. 5A to 5D illustrate steps of making the third reported level of the stacked electronic device of the invention
  • FIGS. 7A to 7C illustrate a configuration in which an electronic component of a reported level is particularly thick;
  • FIGS. 8A to 8C illustrate a configuration in which an electronic component of a reported level is particularly thin
  • FIGS. 9A1, 9A2, 9B1, 9B2, 9C and 9D illustrate configurations in which first-type electrolytic connection pads of a given level are made directly on second-type electrolytic connection pads of the underlying adjacent level ;
  • FIGS. 10A to 10D illustrate a configuration in which the electrolytic connection pads of the first type are fusible balls
  • FIGS. HA to HC illustrate a configuration in which first-level electrolytic connection pads of an attached level are electrically connected to second-type electrolytic connection pads of the underlying adjacent level by being offset therefrom. ;
  • FIG. 12 shows a top view of a stacked electronic device according to the invention during manufacture.
  • a base substrate 100 including or not an electronic component contributes to materializing a base level N1. It is assumed that in the example described, an electronic component is integrated in this substrate 100, it is referenced 110.
  • This base substrate 100 is deposited on the surface of a conducting ground 1.
  • This conducting ground 1 may be formed of a stack two sub-layers 1.1, 1.2. It may be, for example, an electrically conductive sub-layer 1.1 thickness of the order of 300 nanometers surmounting an underlayer of hooked 1.2.
  • the electrically conductive sub-layer 1.1 may for example be based on copper.
  • the hooked underlayer 1.2 may for example be based on titanium.
  • the anchored underlayer 1.2 based on titanium may have a thickness of the order of 20 nanometers.
  • This conducting ground 1 will serve, for example, to make at least one contact element, which can be connected to a contact of the electronic component 110 integrated in the substrate 100 or which can receive the power supply of the stacked electronic device. All of this is illustrated in Figure IA.
  • One or more electrolytic connection pads 10.1 of a first type will then be made on the base substrate 100. These connection pads are described as electrolytic because they are made by electrolysis as described below. These electrolytic connection pads 10.1 of the first type are intended to electrically connect a contact element of an electronic component which will be placed on a first reported level N2 on the base level to start forming the stack, to a contact element. the underlying neighbor level, that is, the Nl base level.
  • the first level N2 reported is near the base level N1 and overlying the base level N1.
  • the stacked electronic device object of the invention may comprise only one level reported N2 or more stacked on top of each other. For this purpose, in FIG.
  • a layer of resin 102 is coated with the conducting ground 1 of the level of NI base.
  • a resin pattern 11 is formed in the resin layer 102 by lithography for each of the electrolytic connection pads of the first type. These recessed patterns 11 are through holes in the resin 102 and reaching the conductive bottom 1.
  • the electrolytic connection pads 10.1 of the first type are formed of one or more micro-inserts in the form of pins coming from the level underlying Nl.
  • the micro-inserts may have a diameter of the order of 1 to 10 micrometers for a height of the order of 2 to 15 micrometers for the group.
  • the recessed patterns 11 in the resin 102 are then filled with the material of the electrolytic connection pad 10.1 of the first type, for example based on nickel and / or copper and / or gold, by electrolysis.
  • the resin layer 102 is then removed in FIG.
  • This step is also illustrated in Figure IE. This demarcation step of the conductive bottom 1 could be carried out before the formation of the electrolytic connection pads 10.1 of the first type.
  • the transfer is preferably carried out at this stage, if the electronic component 120 reported is thin or thinned. If it is thick, that is to say if it is thicker than connection pads of second type made later, it is preferable to postpone after the realization of these connection pads of the second type. It is assumed that in Figure IF the report is made but that in the figures IG and following it is not realized. If several electronic components are reported, they are placed side by side.
  • the electronic component 120 of the first reported level N2 it is arranged that its electrical contacts cl, c2 come into electrical contact with the electrolytic connection pads 10.1 of the first type thus created.
  • the electronic component 120 is assembled at the base level N1, using glue 2, for example of the polymer type BCB (benzocyclobutene) or epoxy.
  • the assembly coats the electrolytic connection pads of the first type 10.1.
  • the electrolytic connection pads of the first type 10.1 are therefore surmounted by the electronic component 120.
  • FIG. 1G which directly follows FIG. 1E, skipping the step of FIG. In Figure IG the electronic component of the first level reported N2 has not yet been reported.
  • electrolytic connection pads 20.1 of the second type intended to electrically connect a given level N1 with another level of the stacked electronic device object of the invention.
  • the electrolytic connection pads 20.1 of the second type may be located outside the right-of-way that the electronic component 120 which has just been assembled (or which will be assembled) on the underlying neighboring level has. Alternatively the electrolytic connection pads of the second type could pass through the electronic component 120 if provided for it. In the example described, the electrolytic connection pads 20.1 of the second type will connect tracks located at the base level N1 to other conductive tracks which are above the electronic component 120 of the first reported level N2.
  • the electrolytic connection pads 20.1 of the second type may have a diameter in a range of about 100 to 200 micrometers and a height of between about 50 and 150 micrometers. This height corresponds substantially to the thickness of a layer of a coating material laterally coating the electronic component 120 of the first reported level N2. They cross right through the thickness of this layer of coating material as will be seen later.
  • the electrolytic connection pads 20.1 of the second type can be flush or protrude in height the electronic component 120 of the first reported level N2.
  • the electrolytic connection pads 20.1 of the second type are also produced by lithography and electrolysis.
  • the substrate is deposited on the surface of base 100 coated conductive bottom 1 of the resin 103, is delimited in recessed patterns 12 corresponding to the electrolytic connection pads of second type 20.1.
  • the hollow patterns 12 expose the conductive bottom 1 ( Figure IG).
  • These hollow patterns 12 are filled, by electrolysis, with metal, for example based on copper and / or nickel and / or gold. Resin 103 is finally removed (Figure IH).
  • the electronic component 120 of the first reported level N2 has a thickness greater than the height of the electrolytic connection pads of the second type 20.1.
  • the top of the electrolytic connection pads of the second type 20.1 does not reach that of the electronic component 120 of the first reported level N2.
  • Coating is then carried out with a layer 220, for example of epoxy type resin, second type electrolytic connection pads 20.1 and the electronic component 120 of the first reported level N2.
  • a layer 220 for example of epoxy type resin, second type electrolytic connection pads 20.1 and the electronic component 120 of the first reported level N2.
  • This coating layer 220 will contribute to completing the first reported level N2 of the stacked electronic device of the invention, it laterally coats the electronic component 120 of the first reported level N2.
  • the height of the electronic component 120 of the first reported level N2 is reduced and the top of the second type electrolytic connection pads 20.1 are exposed.
  • the electrolytic connection pads of second type 20.1 pass right through the thickness of the coating layer 220.
  • the electronic component 120 of the first level reported N2 may have a height, after the break-in step, for example between about 40 and 60 micrometers. We can stop there if there is only one reported level N2. If there are more than one, we can continue by following the following steps. Subsequently, as shown in the figure
  • the dielectric layer 22 may have a thickness of between about 0.2 and 20 microns.
  • This dielectric layer 22 may be organic, for example BCB (benzocyclobutene) or epoxy resin, or mineral for example silicon nitride SiN or silicon oxide SiO 2 .
  • Fig. 2A is coated with a conducting ground 21 as previously shown in Fig. 1A. Referring to Figure 2B.
  • the conductive bottom may be multilayered with the underlayer first hooked.
  • the second reported level N3 is then carried out.
  • the The invention makes it possible to ensure electrical continuity between the electrolytic connection pads of the first type and those of the second type.
  • This configuration makes it possible in particular to carry out directly electrolysis of the connection pads of the first type and of the second type from the same continuous conducting base 21, which in particular makes it possible to reduce the costs.
  • this electrolysis can also be carried out for the studs of the reported level from the conductive element z2 in particular to avoid discovering the layer 1 which could be covered by the successive deposits.
  • a pad can be directly connected to a second type of electrolytic connection pad of the underlying level.
  • FIG. 3B one or more electrolytic connection pads of second type 20.2 are produced as described in FIGS.
  • a step of etching the conductive bottom 21 is performed to delimit conductive tracks z2 electrically connected to the electrolytic connection pads of the first type 10.2 and / or to the second type of connection pads 20.2.
  • An electrolytic connection pad 20.2 of the second type of a level by For example, the second reported level N3 can be connected by a conductive track z2 to a first type electrolytic conductive pad 10.2 of the same level N3 as itself or at a level other than its own, or to a second type electrolytic pad. on another level than his.
  • the etching step can be performed in two stages, one after the completion of the electrolytic connection pads of the first type 10.2 and the other after the production of the electrolytic connection pads of the second type 20.2.
  • FIG. 3C relates to one or more electronic components 130 of the second reported level N3 on the first type electrolytic connection pads 10.2 which have just been produced. This step could of course have taken place before the electrolytic connection pads of the second type 20.2 were made.
  • the adhesive used to assemble the electronic component is referenced 3.
  • a break-in step of the electronic component 130 of the second reported level N3 can be carried out, but this step is optional.
  • FIG. 3 is a coating of the electrolytic connection pads 20.2 of the second type and of the electronic component 130 which has just been added, this coating may be made with epoxy resin, the coating layer is referenced 230.
  • a break-in step illustrated in Figure 3E, the height of the second level reported N3 arranging to expose the top of the electrolytic connection pads 20.2 of the second type. If the stacked electronic device object of the invention has no other level, the method stops there, the second reported level N3 is completed.
  • the accessible electrolytic connection pads 20.2 of the second type can serve as contacts for example to be connected to a power source or to another electronic device.
  • the stacked electronic device object of the invention comprises at least a third reported level N4 superimposed on the second reported level N, can be formed a dielectric layer 23 which extends over the entire ground surface. Engraving apertures are locally provided to reveal the apex of second type electrolytic connection pads 20.2 (FIG. 4A). The engraving can be done through a mask obtained by lithography.
  • a conductive bottom 21 is deposited as was previously shown in FIG. 2B.
  • a third reported level N4 is then carried out.
  • FIGS. 4A, 4B are optional, especially if the electrolytic connection pads of the first type that are about to be formed are directly implanted on the electrolytic connection pads of the second type of the second reported level N3.
  • one or more electrolytic connection pads of the first type 10.3 and one or more electrolytic connection pads 20.3 of the second type are produced.
  • the conductive bottom 21 is etched so as to delimit conductive tracks z3 coming into contact with the electrolytic connection pads 10.3 of the first type and / or the electrolytic connection pads of the second type 20.3. This produces a rerouting step.
  • FIG. 5C after the production of the electrolytic connection pads of the second type 20.3 and the rerouting, there is reported at least one electronic component 140 of the third reported level N4 on the electrolytic connection pads 10.3 of the first type and assembled by gluing.
  • the procedure is as in FIG. If the electronic component 140 has a thickness greater than the height of the electrolytic connection pads of the second type 20.3, it is possible to proceed immediately to a lapping step to thin it.
  • the electronic component 140 of the third level reported N4 could have been reported beforehand, before the realization of the electrolytic connection pads 20.3 of the second type.
  • a coating is carried out with resin, for example of the epoxy type, electrolytic connection pads of the second type 20.3 and the electronic component 140 of the third reported level N4 as illustrated in FIG. 5D.
  • the coating layer is referenced 240.
  • This coating layer 240 is contribute to completing the third reported N4 level of the stacked electronic device of the invention. It coats the electronic component 140 laterally.
  • the stacked electronic device of the invention can be completed.
  • a level of the electronic device of the invention which has just been described, remote from the base level can thus be electrically connected to the base level N1 insofar as two electrolytic connection pads of the second type 20.1, 20.2 of different neighboring levels are located in the extension of one another as illustrated in Figures 3B to 4B.
  • the stack obtained by sawing S is entirely or partially cut for to separate.
  • the saw features S may have the function of disconnecting electrolytic connection pads of the first type or second type previously interconnected by conductive tracks z1, z2,... Without, however, finally leading to pieces totally detached from each other. others. This makes it possible to electrically isolate electronic components from each other, especially when the electrolytic growths are made from the same conductive layers.
  • the stack comprises only two reported levels N2, N3.
  • the cut of the conductive track referenced z2 between the two electrolytic connection pads of second type 20.1 is clearly seen.
  • the saw line S has split an attached electronic component in two, as illustrated in FIG. 6A with the electronic component 120.
  • a plurality of individual stacked electronic devices is then obtained, one of which is shown in FIG. 6B. .
  • a break-in step (FIG. 7B) of the electronic component 120 to thin it can take place before the coating step (FIG. 7C) .
  • the thickness of the electronic component 120 may remain greater than the height electrolytic connection pads 20.1 second type before coating.
  • the thickness of the electronic component 120 is smaller than the height of the electrolytic connection pads of the second type 20.1. There is therefore no break-in step prior to the coating step (FIG. 8B).
  • the break-in step (FIG. 8C) that follows the coating step does not attack the electronic component 120.
  • one or more electrolytic connection pads of the first type 10.2, implanted on an attached level N2 to be made directly on electrolytic connection pads of the second type 20.1 of said reported level N2. They are located directly in the extension of the electrolytic connection pads of second type 20.1 as illustrated in Figures 9Bl, 9B2, 9C and 9D. In this configuration, therefore, neither a dielectric layer nor a conducting base is produced after the breaking-in step as described in FIGS. 2A and 2B.
  • the first type electrolytic connection pads 10.2 of a given level are simply electrolytically grown directly on the electrolytic connection pads of the second type 20.1 of the underlying level.
  • the electrolytic connection pads of the second type 20.1 of the underlying level serve as an electrode for electrolytic growth.
  • FIG. 9B1 a resinous pattern 13 is formed in the resin layer 102 by lithography for each of the electrolytic connection pads of the first type 10.2 to be produced.
  • the recessed patterns 13 in the resin 102 expose the top of the electrolytic connection pads of the second type 20.1. They are then filled with the material of the electrolytic connection pad 10.2, for example based on nickel and / or copper and / or gold, by electrolysis.
  • the electrolytic connection pads of the first type 10.2 are not necessarily in the same material as the electrolytic connection pads 20.1 they overcome.
  • FIGS. 9A2 and 9B2 it is possible to produce a plurality of recessed patterns 13 distributed over the entire surface of the resin layer 102 (FIG. 9A2).
  • the recessed patterns 13 which are located above the electrolytic connection pads of the second type 20.1 expose them. This avoids problems of alignment. When filling by electrolysis, only the patterns located above the electrolytic connection pads of second type 20.1 will fill because the recessed patterns open on a conductive surface of electricity and polarized.
  • the resin layer 102 is then removed in FIG. 9C.
  • the electrolytic connection pads of the first type 10.2 of the second reported level are always micro-inserts. It is of course possible that the electrolytic connection pads of the first type are fusible balls if the temperature is not a constraint. Referring to Figures 10A-10D.
  • FIGS. 10 In this configuration, after the break-in step, no conductive bottom is deposited either, since the electrolytic connection pads of the first type 10.2 will be in the extension of the electrolytic connection pads of the second type. 20.1 of the underlying level.
  • the ground resin structure 102 is coated (FIG. 10A). The resin thickness is between about 20 and 100 micrometers.
  • a resin pattern 14 is also formed in the resin layer 102, by lithography, for electrolytic connection pads that must then be converted into fusible beads.
  • the hollow patterns 14 in the resin 102 are then filled with the fusible conductive material of the fusible beads, for example indium In, or an alloy based on tin and lead SnPb, tin, silver and copper SnAgCu, lead, silver and copper PbAgCu.
  • fusible conductive material in the field of electronics a conductive material capable of melting a sufficiently low temperature to prevent degradation of components that will be assembled with this material. A person skilled in the art of electronics knows perfectly what is a fusible conductive material. Referring to Figure 10B.
  • the resin layer 102 is then removed in FIG. 10C and the fusible beads 10.20 are formed by reflow.
  • One or more electronic components 130 of the second level reported N3 on the first reported level N2 can then be soldered back via the fusible beads 10.20 (FIG. 10D).
  • the contact elements 50 of the reported electronic components 130 are placed in such a way that they come into contact with each other. electrical with fusible beads type 10.20 thus created.
  • a dielectric layer 22 is deposited on the lapped structure, apertures 14 are etched at the top of the second type 20.1 electrolytic connection pads to make them n, the conductive bottom 21 is formed on the lapped structure partially coated with the dielectric layer 22, it is modeled to make conductive tracks z2 which form a rerouting towards the next type of electrolytic connection pads (Figure HA).
  • FIG. 12 is a top view of a stacked electronic device of the present invention; Manufacturing.
  • the disk-shaped base support 100 has a conductive peripheral ring 51.
  • the electronic components 120 of the first reported level N 2 are seen.
  • the sections z1.2 are sections of conductive tracks z1 connecting electronic components 120 via electrolytic connection pads of the first type (not visible because hidden under the components 120) to electrolytic connection pads of the second type 20.1.
  • the sections zl.l are sections of conductive tracks z1 connecting electrolytic connection pads of the second type 20.1 to the peripheral ring 51.

Abstract

The invention relates to a stacked electronic device formed from stacked electronic components (120, 130) distributed over one or more levels (N2, N3) added one on top of another starting from a base level (N1) optionally accommodating at least one electronic component (110). At least one electrolytic connection pad (10.1) of first type of an added level (N2) directly connects a conducting element (c1) placed on one face of an electronic component (120) of an added level (N2) to a conducting element (z1) placed on an opposite face of an adjacent level (N1), whereas at least one electrolytic connection pad (20.1) of second type of the added level (N2) passes right through an encapsulating layer (220) which laterally encapsulates the electronic component (120) of the added level (N2) and electrically connects, directly, two conducting elements (z1, z2) located on either side of said encapsulating layer (220).

Description

DISPOSITIF ELECTRONIQUE EMPILE ET PROCEDE DE REALISATION D'UN TEL DISPOSITIF ELECTRONIQUE STACKED ELECTRONIC DEVICE AND METHOD FOR PRODUCING SUCH AN ELECTRONIC DEVICE
DESCRIPTIONDESCRIPTION
DOMAINE TECHNIQUETECHNICAL AREA
La présente invention concerne un dispositif électronique empilé formé d'un empilement de composants électroniques devant être connectés électriquement entre eux. Par composant électronique, on entend tout élément nécessitant d'être relié électriquement à un autre élément et par exemple un circuit intégré, un composant passif ou actif discret, un MEMS, NEMS ou autre. Le composant électronique peut par exemple regrouper plusieurs sous éléments électroniques indépendants.The present invention relates to a stacked electronic device formed of a stack of electronic components to be electrically connected to each other. By electronic component is meant any element requiring to be electrically connected to another element and for example an integrated circuit, a passive or active discrete component, a MEMS, NEMS or other. The electronic component can for example group several independent electronic sub-elements.
ÉTAT DE LA TECHNIQUE ANTÉRIEURESTATE OF THE PRIOR ART
Actuellement dans les dispositifs électroniques empilés qui comportent plus de deux niveaux, on rapporte les composants électroniques les uns sur les autres et on les connecte par billes fusibles, par liaisons filaires, par métallisations . Dans le brevet US 5 311 401 les différents composants sont reliés électriquement entre eux par des métallisations qui s'étendent sur les flancs de l'empilement. Ces dispositifs électroniques ont des densités d'intégration trop faibles. De plus, la présence des métallisations ou des billes fusibles limite la température maximale qui peut être utilisée ultérieurement à leur réalisation. En outre des problèmes de compatibilité entre matériaux peuvent se poser notamment si du plomb est employé. La solution présentée dans le brevet US 5 311 401 est complexe, elle n'est pas collective, le dispositif électronique ne peut être fabriqué par lots et séparé ensuite de ses voisins .Currently in stacked electronic devices that have more than two levels, the electronic components are reported on each other and are connected by fusible beads, wire bonds, metallizations. In US Pat. No. 5,311,401 the various components are electrically interconnected by metallizations which extend on the sides of the stack. These electronic devices have too low integration densities. In addition, the presence of metallizations or fusible beads limits the maximum temperature that can be used later in their production. In addition, compatibility problems between materials can occur ask especially if lead is used. The solution presented in US Pat. No. 5,311,401 is complex, it is not collective, the electronic device can not be manufactured in batches and then separated from its neighbors.
Pour augmenter la densité d' intégration, il existe d'autres dispositifs électroniques comme ceux montrés dans le brevet US 5 104 820. Les composants électroniques sont empilés et solidarisés par collage de manière à former sensiblement des cubes. Les connexions entre deux composants se font par métallisation d'une ou plusieurs faces principales puis en gravant des lignes conductrices dans les métallisations . Ici encore le dispositif électronique ne peut être fabriqué de manière collective et son coût est élevé. Le procédé utilisé n'est rentable que pour des dispositifs électroniques à forte valeur ajoutée.To increase the integration density, there are other electronic devices such as those shown in US Pat. No. 5,104,820. The electronic components are stacked and bonded together to form substantially cubes. The connections between two components are made by metallization of one or more main faces and then etching conductive lines in the metallizations. Here again the electronic device can not be manufactured collectively and its cost is high. The process used is profitable only for electronic devices with high added value.
On connait également par la demande de brevet EP 1 775 768, un dispositif électronique formé d'un substrat de base sur lequel sont empilés trois niveaux de composants électroniques. Seul le premier niveau de composant électronique est relié à des pistes conductrices munies de plots, portées par le substrat de base. Cette connexion se fait par des micro protubérances conductrices supportées d'un côté par les plots et de l'autre par le composant électronique. L'assemblage se fait par de la colle conductrice au niveau des protubérances et par de l'adhésif isolant ailleurs. Chaque autre niveau de composant électronique est assemblé de cette façon au niveau de composant qui le précède. Aucune possibilité n'est prévue pour connecter un niveau de composant éloigné du substrat, au substrat.Patent application EP 1 775 768 also discloses an electronic device formed of a base substrate on which three levels of electronic components are stacked. Only the first level of electronic component is connected to conductive tracks provided with pads, carried by the base substrate. This connection is made by conductive micro protrusions supported on one side by the pads and on the other by the electronic component. The assembly is done by conductive glue at the protuberances and by insulating adhesive elsewhere. Each other level of electronic component is assembled in this way at the component level that precedes it. No possibility is foreseen for connect a component level remote from the substrate to the substrate.
Dans les demandes de brevet américain US 2003/0017647 et US 2004/0178495 les composants électroniques placés sur un substrat sont empilés en étant séparés par une couche diélectrique, les interconnexions entre un niveau et un niveau voisin se faisant par des billes fusibles, et celles entre le substrat d'un niveau et le substrat d'un autre niveau se faisant d'un côté par des billes fusibles et de l'autre par des plots de cuivre au travers de traversées (vias) métallisées.In the US patent applications US 2003/0017647 and US 2004/0178495, the electronic components placed on a substrate are stacked while being separated by a dielectric layer, the interconnections between a level and a neighboring level being made by fuse-links, and those between the substrate of a level and the substrate of another level being made on one side by fusible balls and on the other by copper pads through vias (vias) metallized.
Un inconvénient des structures divulguées dans ces documents est qu'un grand nombre de métaux sont utilisés pour faire les connexions, ces métaux venant en contact direct deux à deux. Dans ces documents sont cités le cuivre, l'argent, le titane, le nickel. De la corrosion risque d'apparaître à l'interface entre ces différents métaux. Un autre inconvénient est la complexité des connexions des différents niveaux ce qui conduit à des dispositifs électroniques coûteux et à des rendements médiocres.A disadvantage of the structures disclosed in these documents is that a large number of metals are used to make the connections, these metals coming into direct contact two by two. In these documents are cited copper, silver, titanium, nickel. Corrosion may occur at the interface between these different metals. Another disadvantage is the complexity of the connections of the different levels which leads to expensive electronic devices and poor yields.
Encore un autre inconvénient est lié à l'utilisation des billes fusibles. Leur point de fusion étant inférieur à environ 3000C cela limite la température qui peut être atteinte lors d'étapes ultérieures à leur formation. De plus, elles conduisent à des dispositifs électroniques épais car les espacements entre niveaux dus aux billes fusibles est important, de l'ordre de 50 à 100 micromètres au minimum. EXPOSE DE L' INVENTIONYet another disadvantage is related to the use of fusible beads. Their melting point being less than approximately 300 ° C. this limits the temperature that can be reached during steps subsequent to their formation. In addition, they lead to thick electronic devices because the spacings between levels due to the fuse beads is important, of the order of 50 to 100 micrometers minimum. SUMMARY OF THE INVENTION
La présente invention a justement comme but de proposer un dispositif électronique empilé à plus de deux niveaux à densité d' intégration accrue qui ne présente pas les inconvénients mentionnés ci-dessus notamment au niveau de la corrosion et du coûtThe object of the present invention is precisely to propose an electronic device stacked at more than two levels with an increased integration density which does not have the drawbacks mentioned above, especially with regard to corrosion and cost.
Un autre but de l'invention est de proposer un dispositif électronique empilé qui soit relativement peu épais compte tenu du nombre de niveaux empilés. Pour y parvenir, la présente invention est un dispositif électronique empilé comportant des composants électroniques empilés répartis sur plusieurs niveaux rapportés les uns sur les autres à partir d'un niveau de base accueillant éventuellement au moins un composant électronique. Au moins un plot de connexion électrolytique de premier type d'un niveau rapporté donné relie directement un élément conducteur placé sur une face d'un composant électronique du niveau rapporté à un élément conducteur placé sur une face en regard d'un niveau voisin sous-jacent. De plus, au moins un plot de connexion électrolytique de second type du niveau rapporté donné traverse de part en part une couche d'enrobage enrobant latéralement le composant électronique du niveau rapporté donné et relie électriquement directement deux éléments conducteurs situés de part et d'autre de ladite couche d'enrobage. En outre, le dispositif électronique empilé comporte des plots de connexion électrolytique de premier type d'un niveau rapporté directement sus-jacent au niveau rapporté donné, chacun est relié électriquement à un plot de connexion électrolytique de second type du niveau rapporté donné.Another object of the invention is to provide a stacked electronic device which is relatively thin in view of the number of stacked levels. To achieve this, the present invention is a stacked electronic device comprising stacked electronic components distributed over several levels reported on each other from a basic level optionally accommodating at least one electronic component. At least one electrolytic connection pad of the first type of a given reported level directly connects a conductive element placed on one face of an electronic component of the reported level to a conductive element placed on a face opposite a sub-adjacent level. underlying. In addition, at least one electrolytic connection pad of the second type of the given level reported crosses right through a coating layer laterally coating the electronic component of the reported level given and directly electrically connects two conductive elements located on either side of said coating layer. In addition, the stacked electronic device comprises electrolytic connection pads of the first type of a reported level directly above the given reported level, each is electrically connected to a second type electrolytic connection pad of the reported level reported.
Plusieurs composants électroniques peuvent se trouver côte à côte sur un même niveau. II est préférable pour limiter l'épaisseur du dispositif électronique empilé, qu'un plot de connexion électrolytique de premier type ait une hauteur inférieure à celle d'un plot de connexion électrolytique de second type, ce dernier ayant sa hauteur conditionnée par l'épaisseur du composant électronique à côté duquel il se trouve.Several electronic components can be side by side on the same level. It is preferable to limit the thickness of the stacked electronic device, that a first type of electrolytic connection pad has a height less than that of a second type electrolytic pad, the latter having its height conditioned by the thickness of the electronic component next to it.
Il est possible qu'un plot de connexion électrolytique de premier type soit un micro-insert ou un ensemble de micro-inserts en forme de picot. En variante, un plot de connexion électrolytique de premier type peut être une bille fusible, si la température n'est pas trop une contrainte. La bille fusible peut être réalisée dans un matériau fusible à base d' indium, de plomb -étain, de plomb-argent-cuivre, d' argent-étain-cuivre .It is possible for an electrolytic connection pad of the first type to be a micro-insert or a set of micro-inserts in the form of a pin. In a variant, an electrolytic connection pad of the first type may be a fuse ball, if the temperature is not too much a constraint. The fuse ball may be made of a fusible material based on indium, lead tin, lead-silver-copper, silver-tin-copper.
Un plot de connexion électrolytique de premier type et/ou un plot de connexion électrolytique de second type peuvent être réalisés à base de cuivre et/ou de nickel et/ou d'or. Un composant électronique d'un niveau rapporté peut être assemblé au niveau voisin sous- jacent par collage.An electrolytic connection pad of the first type and / or an electrolytic connection pad of the second type may be made based on copper and / or nickel and / or gold. An electronic component of a reported level can be assembled at the underlying adjacent level by gluing.
Une couche diélectrique peut revêtir la couche d'enrobage et le composant électronique enrobé latéralement par la couche d'enrobage du niveau rapporté donné et posséder au moins une ouverture au niveau d'un sommet d'un plot de connexion électrolytique de second type du niveau rapporté donné.A dielectric layer can coat the coating layer and the electronic component laterally coated with the coating layer of the given level and have at least one opening at level of a top of a second type electrolytic connection pad of the reported reported level.
Au moins une piste conductrice peut s'étendre sur la couche diélectrique et l'ouverture, cette piste conductrice formant éventuellement l'élément conducteur placé sur une face en regard du niveau rapporté directement sus-jacent au niveau rapporté donné correspondant à l'un des deux éléments conducteurs situés de part et d'autre de ladite couche d'enrobage.At least one conductive track may extend over the dielectric layer and the opening, this conductive track possibly forming the conductive element placed on a face facing the reported level directly above the given reported level corresponding to one of the two conductive elements located on either side of said coating layer.
Pour faciliter la réalisation et réduire les coûts et l'épaisseur du dispositif électronique empilé, un plot de connexion électrolytique de premier type du niveau rapporté directement sus-jacent au niveau rapporté donné peut être situé directement dans le prolongement d'un plot de connexion électrolytique de second type du niveau rapporté donné.To facilitate the production and to reduce the costs and the thickness of the stacked electronic device, a first-level electrolytic connection pad of the directly attached level directly above the given level can be located directly in the extension of an electrolytic connection pad second type reported reported level.
En variante, un plot de connexion électrolytique de premier type du niveau rapporté directement sus-jacent au niveau rapporté donné peut être décalé par rapport à un plot de connexion électrolytique de second type du niveau rapporté donné.Alternatively, a first-level electrolytic connection pad of the attached level directly above the given reported level may be shifted relative to a second-type electrolytic pad of the given reported level.
L'élément conducteur placé sur une face en regard du niveau rapporté donné relié électriquement à un plot de connexion électrolytique de premier type du niveau rapporté directement sus-jacent au niveau rapporté donné est de préférence une piste conductrice également connectée au plot de connexion électrolytique de second type du niveau rapporté directement sus- jacent au niveau rapporté donné. II est possible que deux plots de connexion électrolytiques de même type de niveaux différents soient dans le prolongement l'un de l'autre.The conductive element placed on a face facing the reported level reported electrically connected to a first-level directly connected level electrolytic connection pad directly above the given reported level is preferably a conductive track also connected to the electrolytic connection pad of second type of reported level directly above the given reported level. It is possible that two electrolytic connection pads of the same type of different levels are in the extension of one another.
La présente invention concerne également un procédé de réalisation d'un dispositif électronique empilé comportant des composants électroniques empilés répartis sur au moins un niveau sur un niveau de base accueillant éventuellement au moins un composant électronique, dans lequel on : a0) réalise par électrolyse sur le niveau de base au moins un plot de connexion électrolytique de premier type, le plot de connexion électrolytique de premier type étant en contact électrique direct avec un élément conducteur du niveau de base ; b°) rapporte au moins un composant électronique du niveau rapporté dit premier niveau rapporté, sur le niveau de base et on l'assemble de manière à ce qu'un élément conducteur porté par une face du composant électronique soit en contact électrique direct avec le plot de connexion électrolytique de premier type réalisé à l'étape a0) ; c°) réalise par électrolyse sur le niveau de base au moins un plot de connexion électrolytique de second type, le plot de connexion électrolytique de second type étant en contact électrique direct avec au moins un second élément conducteur du niveau de base, ce plot de connexion électrolytique de second type affleurant ou dépassant le composant électronique du premier niveau rapporté ; d°) enrobe le plot de connexion électrolytique de second type réalisé à l'étape c°) et le composant électronique du premier niveau rapporté d'un matériau d'enrobage, le sommet du plot de connexion électrolytique de second type étant à nu, les étapes a0) à d°) ne contribuant à réaliser que le premier niveau rapporté ; e°) réalise par électrolyse sur le premier niveau rapporté, des plots de connexion électrolytiques de premier type, chaque plot de connexion électrolytique de premier type étant en contact électrique avec un plot de connexion électrolytique de second type réalisé à l'étape c°) .The present invention also relates to a method of making a stacked electronic device comprising the stacked electronic components distributed over at least one level on a welcoming Basic optionally at least one electronic component, wherein: a 0) performs electrodeposited on the base level at least one electrolytic connection pad of the first type, the first type electrolytic pad being in direct electrical contact with a conductive member of the base level; b) relates at least one electronic component of the reported level said first level reported, on the base level and is assembled so that a conductive element carried by a face of the electronic component is in direct electrical contact with the electrolytic connection pad of the first type made in step a 0 ); c) electrolytically performs on the base level at least one electrolytic connection pad of the second type, the electrolytic connection pad of the second type being in direct electrical contact with at least one second conductive element of the base level, this pad of electrolytic connection of second type flush with or exceeding the electronic component of the first reported level; d °) coats the electrolytic connection pad of the second type made in step c °) and the electronic component of the first level of a coating material, the top of the electrolytic connection pad of the second type being exposed, the steps a 0 ) to d °) only contributing to achieving the first reported level; e) electrolytically on the first level reported electrolytic connection pads of the first type, each electrolytic connection pad of the first type being in electrical contact with an electrolytic connection pad of the second type made in step c) .
Un plot de connexion de premier type réalisé sur le premier niveau rapporté peut être en contact électrique direct avec un premier élément conducteur du premier niveau rapporté.A first type connection pad made on the first reported level may be in direct electrical contact with a first conductive element of the first reported level.
Le procédé peut comporter en outre les étapes dans lesquelles on : f°) rapporte au moins un composant électronique du second niveau rapporté sur le premier niveau rapporté et on l'assemble de manière à ce qu'un élément conducteur porté par une face du composant électronique soit en contact électrique direct avec le plot de connexion électrolytique de premier type réalisé à l'étape e°) ; g0) réalise par électrolyse sur le premier niveau rapporté au moins un plot de connexion électrolytique de second type, le plot de connexion électrolytique de second type étant en contact électrique direct avec un second élément conducteur du premier niveau rapporté, ce plot de connexion électrolytique de second type affleurant ou dépassant le composant électronique du second niveau rapporté ; h°) enrobe le plot de connexion électrolytique de second type réalisé à l'étape g0) et le composant électronique du second niveau rapporté d'un matériau d'enrobage, le sommet du plot de connexion électrolytique de second type étant à nu, ces étapes contribuant à réaliser le second niveau rapporté.The method may further comprise the steps in which: f °) relates at least one electronic component of the second level attached to the first level reported and is assembled so that a conductive element carried by one side of the component electronics is in direct electrical contact with the electrolytic connection pad of the first type made in step e °); g 0 ) electrolytically performs on the first level reported at least one electrolytic connection pad of the second type, the second type electrolytic connection pad being in direct electrical contact with a second conductive element of the first reported level, the electrolytic connection pad of second type flush or exceeding the electronic component of the second reported level; h °) coats the electrolytic connection pad of the second type made in step g 0 ) and the electronic component of the second reported level of a coating material, the top of the electrolytic connection pad of the second type being exposed, these steps contribute to achieving the second reported level.
Si l'on désire que le dispositif électronique empilé ait plus de deux niveaux rapportés, on peut réitérer les étapes e°) à h°) au moins une nième fois (n supérieur ou égal à deux) de manière à obtenir n+1 niveaux rapportés, le premier niveau rapporté devenant le nième-1 niveau rapporté, le second niveau rapporté devenant le nième niveau rapporté, le niveau de base devenant le nième-2 niveau.If it is desired that the stacked electronic device has more than two reported levels, it is possible to repeat the steps e) at h °) at least one nth time (n greater than or equal to two) so as to obtain n + 1 levels reported, the first reported level becoming the nth-1 level reported, the second reported level becoming the nth reported level, the base level becoming the nth-2 level.
Le plot de connexion électrolytique de second type peut être situé hors de l'emprise que le composant électronique du niveau rapporté possède sur le niveau sous-jacent.The second type electrolytic pad may be located outside the footprint that the reported level electronic component has on the underlying level.
Aux étapes d°) ou h°) la mise à nu du sommet du plot de connexion électrolytique de second type peut être obtenue par rodage au moins du matériau d'enrobage et éventuellement du composant électronique du premier niveau rapporté et/ou du second niveau rapporté .In steps d °) or h °) the exposure of the top of the electrolytic connection pad of the second type can be obtained by lapping at least the coating material and optionally the electronic component of the first reported level and / or the second level reported.
On peut réaliser le premier élément conducteur et/ou le second élément conducteur du niveau de base en gravant un fond conducteur formé en surface du niveau de base.It is possible to realize the first conductive element and / or the second conductive element of the level base by etching a conductive bottom formed on the surface of the base level.
Similairement , on peut réaliser le premier élément conducteur et/ou le second élément conducteur du premier niveau rapporté en gravant un fond conducteur formé en surface du premier niveau rapporté, ce fond conducteur surmontant une couche diélectrique ouverte au niveau du sommet du plot de connexion électrolytique de second type réalisé à l'étape g0) .Similarly, it is possible to produce the first conductive element and / or the second conductive element of the first reported level by etching a conductive bottom formed on the surface of the first reported level, this conductive bottom surmounting an open dielectric layer at the top of the electrolytic connection pad. of second type realized in step g 0 ).
Dans certaines configurations, le premier élément conducteur et le second élément conducteur du niveau de base peuvent être confondus et/ou le premier élément conducteur et le second élément conducteur du premier niveau rapporté peuvent être confondus.In some configurations, the first conductive element and the second conductive element of the base level may be merged and / or the first conductive element and the second conductive element of the first level reported may be merged.
On peut faire croître par électrolyse le plot de connexion électrolytique de premier type réalisé à l'étape e°) directement sur le sommet du plot de connexion électrolytique de second type réalisé à l'étape c°) .The first type electrolytic connection pad made in step e °) can be grown by electrolysis directly on the top of the electrolytic connection pad of the second type made in step c °).
On peut procéder à une étape de refusion entre l'étape e°) et l'étape f°) pour que le plot de connexion de premier type réalisé à l'étape e°) se transforme en bille fusible, si bien sûr ledit plot de connexion de premier type est réalisé dans un matériau approprié .We can proceed to a reflow step between step e °) and step f °) so that the connection pad of the first type made in step e °) turns into a fuse ball, if of course said stud first type of connection is made of a suitable material.
Dans certaines configurations, notamment si le composant électronique à rapporter est peu épais, il est possible que l'étape b°) soit réalisée après l'étape c°) et/ou l'étape f°) soit réalisée après l'étape g0) .In some configurations, especially if the electronic component to report is thin, it is possible that step b)) is carried out after step c °) and / or step f °) is carried out after step g 0 ).
Dans une configuration où le composant électronique est épais, lorsque l'étape b°) est réalisée avant l'étape c°) et/ou l'étape f°) est réalisée avant l'étape g0), on peut amincir le composant électronique avant l'étape c°) et/ou l'étape f°) •In a configuration where the electronic component is thick, when step b °) is carried out before step c °) and / or step f °) is carried out before step g 0 ), the component can be thinned electronic before step c °) and / or step f ° ) •
Lorsque le dispositif électronique empilé comporte plusieurs dispositifs électroniques empilés élémentaires, à l'issue de la réalisation du dernier niveau rapporté, on peut effectuer une découpe totale ou partielle du dispositif électronique empilé pour séparer les dispositifs électroniques empilés élémentaires les uns des autres. La découpe peut être une découpe d'au moins un élément conducteur visant à séparer électriquement les dispositifs électroniques empilés élémentaires.When the stacked electronic device comprises several elementary stacked electronic devices, at the end of the production of the last reported level, it is possible to perform a total or partial cutting of the stacked electronic device in order to separate the elementary stacked electronic devices from each other. The cutout may be a cutout of at least one conductive element for electrically separating the stacked electronic elementary devices.
BRÈVE DESCRIPTION DES DESSINS La présente invention sera mieux comprise à la lecture de la description d'exemples de réalisation donnés, à titre purement indicatif et nullement limitatif, en faisant référence aux dessins annexés sur lesquels : - les figures IA à IK illustrent des étapes de réalisation du premier niveau rapporté du dispositif électronique empilé de l'invention ;BRIEF DESCRIPTION OF THE DRAWINGS The present invention will be better understood on reading the description of exemplary embodiments given, purely by way of indication and in no way limiting, with reference to the appended drawings in which: FIGS. 1A to IK illustrate steps of FIG. performing the first reported level of the stacked electronic device of the invention;
- les figures 2A, 2B illustrent des étapes optionnelles permettant de finir le premier niveau rapporté du dispositif électronique empilé de 1' invention ; - les figures 3A à 3E illustrent des étapes de réalisation du second niveau rapporté du dispositif électronique empilé de l'invention ;FIGS. 2A and 2B illustrate optional steps for finishing the first reported level of the stacked electronic device of the invention; FIGS. 3A to 3E illustrate steps of producing the second reported level of the stacked electronic device of the invention;
- les figures 4A, 4B illustrent des étapes optionnelles permettant de finir le second niveau rapporté du dispositif électronique empilé de 1' invention ;FIGS. 4A, 4B illustrate optional steps for finishing the second reported level of the stacked electronic device of the invention;
- les figures 5A à 5D illustrent des étapes de réalisation du troisième niveau rapporté du dispositif électronique empilé de l'invention ;FIGS. 5A to 5D illustrate steps of making the third reported level of the stacked electronic device of the invention;
- les figures 6A, 6B illustrent des étapes permettant d'obtenir par découpe des dispositifs électroniques empilés élémentaires conformes à 1' invention ; - les figures 7A à 7C illustrent une configuration dans laquelle un composant électronique d'un niveau rapporté est particulièrement épais ;- Figures 6A, 6B illustrate steps for obtaining by cutting elementary stacked electronic devices according to the invention; FIGS. 7A to 7C illustrate a configuration in which an electronic component of a reported level is particularly thick;
- les figures 8A à 8C illustrent une configuration dans laquelle un composant électronique d'un niveau rapporté est particulièrement mince ;FIGS. 8A to 8C illustrate a configuration in which an electronic component of a reported level is particularly thin;
- les figures 9Al, 9A2, 9Bl, 9B2, 9C et 9D illustrent des configurations dans lesquelles des plots de connexion électrolytiques de premier type d'un niveau donné sont réalisés directement sur des plots de connexion électrolytiques de second type du niveau voisin sous-jacent ;FIGS. 9A1, 9A2, 9B1, 9B2, 9C and 9D illustrate configurations in which first-type electrolytic connection pads of a given level are made directly on second-type electrolytic connection pads of the underlying adjacent level ;
- les figures 1OA à 10D illustrent une configuration dans laquelle les plots de connexion électrolytiques de premier type sont des billes fusibles ; - les figures HA à HC illustrent une configuration dans laquelle des plots de connexion électrolytiques de premier type d'un niveau rapporté sont connectés électriquement à des plots de connexion électrolytiques de second type du niveau voisin sous- jacent en étant décalés par rapport à ces derniers ;FIGS. 10A to 10D illustrate a configuration in which the electrolytic connection pads of the first type are fusible balls; FIGS. HA to HC illustrate a configuration in which first-level electrolytic connection pads of an attached level are electrically connected to second-type electrolytic connection pads of the underlying adjacent level by being offset therefrom. ;
- la figure 12 montre une vue de dessus d'un dispositif électronique empilé conforme à l'invention en cours de fabrication.- Figure 12 shows a top view of a stacked electronic device according to the invention during manufacture.
Des parties identiques, similaires ou équivalentes des différentes figures décrites ci-après portent les mêmes références numériques de façon à faciliter le passage d'une figure à l'autre. Les différentes parties représentées sur les figures ne le sont pas nécessairement selon une échelle uniforme, pour rendre les figures plus lisibles .Identical, similar or equivalent parts of the different figures described below bear the same numerical references so as to facilitate the passage from one figure to another. The different parts shown in the figures are not necessarily in a uniform scale, to make the figures more readable.
EXPOSÉ DÉTAILLÉ DE MODES DE RÉALISATION PARTICULIERS On va maintenant décrire un exemple de procédé de réalisation d'un dispositif électronique empilé objet de l'invention. On part d'un substrat de base 100 incluant ou non un composant électronique. Ce substrat de base 100 contribue à matérialiser un niveau de base Nl. On suppose que dans l'exemple décrit, un composant électronique est intégré dans ce substrat 100, il est référencé 110. On dépose en surface de ce substrat de base 100 un fond conducteur 1. Ce fond conducteur 1 peut être formé d'un empilement de deux sous-couches 1.1, 1.2. Il peut s'agir, par exemple, d'une sous-couche 1.1 électriquement conductrice d'épaisseur de l'ordre de 300 nanomètres surmontant une sous-couche d'accroché 1.2. La sous-couche électriquement conductrice 1.1 peut être par exemple à base de cuivre. La sous-couche d'accroché 1.2 peut être par exemple à base de titane. La sous-couche d'accroché 1.2 à base de titane peut avoir une épaisseur de l'ordre de 20 nanomètres. Ce fond conducteur 1 va servir, par exemple, à faire au moins élément de contact, qui peut être relié à un contact du composant électronique 110 intégré dans le substrat 100 ou qui peut recevoir l'alimentation électrique du dispositif électronique empilé. Tout cela est illustré sur la figure IA.DETAILED DESCRIPTION OF PARTICULAR EMBODIMENTS An example of a method for producing a stacked electronic device that is the subject of the invention will now be described. We start from a base substrate 100 including or not an electronic component. This base substrate 100 contributes to materializing a base level N1. It is assumed that in the example described, an electronic component is integrated in this substrate 100, it is referenced 110. This base substrate 100 is deposited on the surface of a conducting ground 1. This conducting ground 1 may be formed of a stack two sub-layers 1.1, 1.2. It may be, for example, an electrically conductive sub-layer 1.1 thickness of the order of 300 nanometers surmounting an underlayer of hooked 1.2. The electrically conductive sub-layer 1.1 may for example be based on copper. The hooked underlayer 1.2 may for example be based on titanium. The anchored underlayer 1.2 based on titanium may have a thickness of the order of 20 nanometers. This conducting ground 1 will serve, for example, to make at least one contact element, which can be connected to a contact of the electronic component 110 integrated in the substrate 100 or which can receive the power supply of the stacked electronic device. All of this is illustrated in Figure IA.
On va ensuite réaliser un ou plusieurs plots de connexion électrolytiques 10.1 d'un premier type sur le substrat de base 100. Ces plots de connexion sont qualifiés d' électrolytiques car ils sont réalisés par électrolyse comme on le décrit ci-dessous. Ces plots de connexion 10.1 électrolytiques de premier type sont destinés à relier électriquement un élément de contact d'un composant électronique qui sera placé sur un premier niveau rapporté N2 sur le niveau de base pour commencer à former l'empilement, à un élément de contact du niveau voisin sous-jacent, c'est-à-dire du niveau de base Nl. Le premier niveau N2 rapporté est voisin du niveau de base Nl et sus-jacent au niveau de base Nl. Le dispositif électronique empilé objet de l'invention peut comporter qu'un seul niveau rapporté N2 ou plusieurs empilés les uns sur les autres. Pour cela on revêt, à la figure IB, d'une couche de résine 102 le fond conducteur 1 du niveau de base NI. A la figure IC, on forme dans la couche de résine 102 par lithographie un motif en creux 11 pour chacun des plots de connexion électrolytiques de premier type. Ces motifs en creux 11 sont des trous traversant dans la résine 102 et atteignant le fond conducteur 1. Il est préférable que les plots de connexion électrolytiques 10.1 de premier type soient formés d'un ou plusieurs micro-inserts en forme de picots issus du niveau sous-jacent Nl. Les micro- inserts peuvent avoir un diamètre de l'ordre de 1 à 10 micromètres pour une hauteur de l'ordre de 2 à 15 micromètres pour le groupe.One or more electrolytic connection pads 10.1 of a first type will then be made on the base substrate 100. These connection pads are described as electrolytic because they are made by electrolysis as described below. These electrolytic connection pads 10.1 of the first type are intended to electrically connect a contact element of an electronic component which will be placed on a first reported level N2 on the base level to start forming the stack, to a contact element. the underlying neighbor level, that is, the Nl base level. The first level N2 reported is near the base level N1 and overlying the base level N1. The stacked electronic device object of the invention may comprise only one level reported N2 or more stacked on top of each other. For this purpose, in FIG. 1B, a layer of resin 102 is coated with the conducting ground 1 of the level of NI base. In FIG. 1C, a resin pattern 11 is formed in the resin layer 102 by lithography for each of the electrolytic connection pads of the first type. These recessed patterns 11 are through holes in the resin 102 and reaching the conductive bottom 1. It is preferable that the electrolytic connection pads 10.1 of the first type are formed of one or more micro-inserts in the form of pins coming from the level underlying Nl. The micro-inserts may have a diameter of the order of 1 to 10 micrometers for a height of the order of 2 to 15 micrometers for the group.
Les motifs en creux 11 dans la résine 102 sont ensuite remplis du matériau du plot de connexion électrolytique 10.1 de premier type, par exemple à base de nickel et/ou de cuivre et/ou d'or, par électrolyse. On se réfère à la figure ID. On élimine ensuite la couche de résine 102 à la figure IE. On peut prévoir, à ce stade, une étape de lithographie suivie d'une gravure dans le fond conducteur 1 pour délimiter une ou plusieurs pistes conductrices zl reliées aux plots de connexion électrolytiques de premier type 10.1 et éventuellement de second type à venir. Cette étape est aussi illustrée à la figure IE. Cette étape de délimitation du fond conducteur 1 pourrait être réalisée avant la formation des plots de connexion électrolytiques 10.1 de premier type.The recessed patterns 11 in the resin 102 are then filled with the material of the electrolytic connection pad 10.1 of the first type, for example based on nickel and / or copper and / or gold, by electrolysis. Referring to Figure ID. The resin layer 102 is then removed in FIG. At this stage, it is possible to provide a lithography step followed by etching in the conducting ground 1 to delimit one or more conductive tracks z1 connected to the electrolytic connection pads of the first type 10.1 and possibly of the second type to come. This step is also illustrated in Figure IE. This demarcation step of the conductive bottom 1 could be carried out before the formation of the electrolytic connection pads 10.1 of the first type.
A ce stade, il est possible de rapporter au moins un composant électronique 120 contribuant à former le premier niveau rapporté N2 sur les plots de connexion électrolytiques 10.1 de premier type précédemment formés sur le substrat de base 100. Le report s'effectue de préférence à ce stade, si le composant électronique 120 rapporté est mince ou aminci. S'il est épais, c'est-à-dire s'il est plus épais que des plots de connexion de second type réalisés ultérieurement, il est préférable d'effectuer le report après la réalisation de ces plots de connexion de second type. On suppose que sur la figure IF le report est effectué mais que sur les figures IG et suivantes il n'est pas réalisé. Si l'on rapporte plusieurs composants électroniques, on les place côte à côte .At this stage, it is possible to relate at least one electronic component 120 contributing to form the first reported level N2 on the electrolytic connection pads 10.1 of the first type previously formed on the base substrate 100. The transfer is preferably carried out at this stage, if the electronic component 120 reported is thin or thinned. If it is thick, that is to say if it is thicker than connection pads of second type made later, it is preferable to postpone after the realization of these connection pads of the second type. It is assumed that in Figure IF the report is made but that in the figures IG and following it is not realized. If several electronic components are reported, they are placed side by side.
Lors du report du composant électronique 120 du premier niveau rapporté N2, on s'arrange pour que ses contacts électriques cl, c2 viennent en contact électrique avec les plots de connexion électrolytiques 10.1 de premier type ainsi créés. Le composant électronique 120 est assemblé au niveau de base Nl, à l'aide de colle 2, par exemple, de type polymère BCB (benzocyclobutène) ou époxy. L'assemblage enrobe les plots de connexion électrolytiques de premier type 10.1. Les plots de connexion électrolytiques de premier type 10.1 sont donc surmontés du composant électronique 120. On se réfère maintenant à la figure IG qui suit directement la figure IE, en sautant l'étape de la figure IF. Sur la figure IG le composant électronique du premier niveau rapporté N2 n'a pas encore été rapporté . On va réaliser maintenant un ou plusieurs plots de connexion électrolytiques 20.1 de second type destinés à relier électriquement un niveau donné Nl avec un autre niveau du dispositif électronique empilé objet de l'invention. Les plots de connexion électrolytiques 20.1 de second type pourront être localisés hors de l'emprise que le composant électronique 120 qui vient d'être assemblé (ou qui va être assemblé) sur le niveau voisin sous-jacent possède. En variante les plots de connexion électrolytiques de second type pourraient traverser le composant électronique 120 s'il est prévu pour cela. Dans l'exemple décrit, les plots de connexion électrolytiques 20.1 de second type vont connecter des pistes situées au niveau de base Nl à d'autres pistes conductrices qui se trouvent au dessus du composant électronique 120 du premier niveau rapporté N2. Les plots de connexion électrolytiques 20.1 de second type peuvent avoir un diamètre compris dans une plage allant d'environ 100 à 200 micromètres et une hauteur comprise entre environ 50 et 150 micromètres. Cette hauteur correspond sensiblement à l'épaisseur d'une couche d'un matériau d'enrobage enrobant latéralement le composant électronique 120 du premier niveau rapporté N2. Ils traversent de part en part l'épaisseur de cette couche de matériau d'enrobage comme on le verra ultérieurement. Les plots de connexion électrolytiques 20.1 de second type peuvent affleurer ou dépasser en hauteur le composant électronique 120 du premier niveau rapporté N2.During the transfer of the electronic component 120 of the first reported level N2, it is arranged that its electrical contacts cl, c2 come into electrical contact with the electrolytic connection pads 10.1 of the first type thus created. The electronic component 120 is assembled at the base level N1, using glue 2, for example of the polymer type BCB (benzocyclobutene) or epoxy. The assembly coats the electrolytic connection pads of the first type 10.1. The electrolytic connection pads of the first type 10.1 are therefore surmounted by the electronic component 120. Referring now to FIG. 1G, which directly follows FIG. 1E, skipping the step of FIG. In Figure IG the electronic component of the first level reported N2 has not yet been reported. We will now realize one or more electrolytic connection pads 20.1 of the second type intended to electrically connect a given level N1 with another level of the stacked electronic device object of the invention. The electrolytic connection pads 20.1 of the second type may be located outside the right-of-way that the electronic component 120 which has just been assembled (or which will be assembled) on the underlying neighboring level has. Alternatively the electrolytic connection pads of the second type could pass through the electronic component 120 if provided for it. In the example described, the electrolytic connection pads 20.1 of the second type will connect tracks located at the base level N1 to other conductive tracks which are above the electronic component 120 of the first reported level N2. The electrolytic connection pads 20.1 of the second type may have a diameter in a range of about 100 to 200 micrometers and a height of between about 50 and 150 micrometers. This height corresponds substantially to the thickness of a layer of a coating material laterally coating the electronic component 120 of the first reported level N2. They cross right through the thickness of this layer of coating material as will be seen later. The electrolytic connection pads 20.1 of the second type can be flush or protrude in height the electronic component 120 of the first reported level N2.
Les plots de connexion électrolytiques 20.1 de second type sont également réalisés par lithographie et électrolyse. On dépose en surface du substrat de base 100 revêtu du fond conducteur 1 de la résine 103, on délimite dedans des motifs en creux 12 correspondant aux plots de connexion électrolytiques de second type 20.1. Les motifs en creux 12 mettent à nu le fond conducteur 1 (figure IG) . On remplit ces motifs en creux 12, par électrolyse, de métal, par exemple à base de cuivre et/ou de nickel et/ou d'or. On finit par éliminer la résine 103 (figure IH) .The electrolytic connection pads 20.1 of the second type are also produced by lithography and electrolysis. The substrate is deposited on the surface of base 100 coated conductive bottom 1 of the resin 103, is delimited in recessed patterns 12 corresponding to the electrolytic connection pads of second type 20.1. The hollow patterns 12 expose the conductive bottom 1 (Figure IG). These hollow patterns 12 are filled, by electrolysis, with metal, for example based on copper and / or nickel and / or gold. Resin 103 is finally removed (Figure IH).
On peut effectuer une délimitation par lithographie et gravure du fond conducteur 1 de manière à délimiter des pistes conductrices zl notamment associés aux plots de connexion électrolytiques de second type 20.1, ainsi qu'aux plots de connexion électrolytiques 10.1 de premier type si cette étape de gravure n'a pas eu lieu avant la réalisation des plots de connexion électrolytiques 20.1 de second type. Cette étape peut être qualifiée d'étape de reroutage. Cette étape peut se faire par gravure à travers un masque obtenu par lithographie. Si le composant 120 du premier niveau rapporté Nl n'a pas encore été rapporté, on le rapporte maintenant (figure II) et on l'assemble. L'assemblage se fait comme décrit précédemment par collage. Le composant électronique 120 du premier niveau rapporté N2 a une épaisseur plus grande que la hauteur des plots de connexion électrolytiques de second type 20.1. Le sommet des plots de connexion électrolytiques de second type 20.1 n'atteint pas celui du composant électronique 120 du premier niveau rapporté N2. On peut facultativement effectuer une étape de rodage visant à amincir le composant électronique 120 du premier niveau rapporté N2. Cette étape n'est pas illustrée ici, mais elle est illustrée à la figure 7BIt is possible to carry out a delimitation by lithography and etching of the conducting ground 1 so as to delimit conducting tracks z1 notably associated with the electrolytic connection pads of the second type 20.1, as well as with the electrolytic connection pads 10.1 of the first type if this etching step did not take place before the realization of the electrolytic connection pads 20.1 of the second type. This step can be described as a rerouting step. This step can be done by etching through a mask obtained by lithography. If component 120 of the first reported level N1 has not yet been reported, it is now reported (Figure II) and assembled. The assembly is done as previously described by gluing. The electronic component 120 of the first reported level N2 has a thickness greater than the height of the electrolytic connection pads of the second type 20.1. The top of the electrolytic connection pads of the second type 20.1 does not reach that of the electronic component 120 of the first reported level N2. One can optionally perform a break-in step to thin the electronic component 120 of the first level reported N2. This step is not illustrated here, but is illustrated in Figure 7B
On procède ensuite à un enrobage avec une couche 220, par exemple de résine de type époxy, des plots de connexion électrolytiques de second type 20.1 et du composant électronique 120 du premier niveau rapporté N2. On se réfère à la figure IJ. Cette couche d'enrobage 220 va contribuer à compléter le premier niveau rapporté N2 du dispositif électronique empilé de l'invention, elle enrobe latéralement le composant électronique 120 du premier niveau rapporté N2.Coating is then carried out with a layer 220, for example of epoxy type resin, second type electrolytic connection pads 20.1 and the electronic component 120 of the first reported level N2. Referring to Figure IJ. This coating layer 220 will contribute to completing the first reported level N2 of the stacked electronic device of the invention, it laterally coats the electronic component 120 of the first reported level N2.
Par une étape de rodage (figure IK) , on réduit la hauteur du composant électronique 120 du premier niveau rapporté N2 et on met à nu le sommet des plots de connexion électrolytiques de second type 20.1. Les plots de connexion électrolytiques de second type 20.1 traversent de part en part l'épaisseur de la couche d'enrobage 220. Le composant électronique 120 du premier niveau rapporté N2 peut avoir une hauteur, après l'étape de rodage, comprise par exemple entre environ 40 et 60 micromètres. On peut s'arrêter là s'il n'y a qu'un seul niveau rapporté N2. S'il y en a plusieurs, on peut continuer en enchaînant les étapes suivantes . Ultérieurement, comme illustré à la figureBy a break-in step (FIG. 1K), the height of the electronic component 120 of the first reported level N2 is reduced and the top of the second type electrolytic connection pads 20.1 are exposed. The electrolytic connection pads of second type 20.1 pass right through the thickness of the coating layer 220. The electronic component 120 of the first level reported N2 may have a height, after the break-in step, for example between about 40 and 60 micrometers. We can stop there if there is only one reported level N2. If there are more than one, we can continue by following the following steps. Subsequently, as shown in the figure
2A, on peut former ensuite une couche diélectrique 22 qui s'étend sur toute la surface rodée et la graver localement pour faire apparaître les plots de connexion de second type 20.1. Au moins une ouverture est obtenue par la gravure, elle est référencée 22.1. La gravure peut se faire à travers un masque obtenu par lithographie. La couche diélectrique 22 peut avoir une épaisseur comprise entre environ 0,2 et 20 micromètres. Cette couche diélectrique 22 peut être organique, par exemple en BCB (benzocyclobutène) ou en résine époxy, ou minérale par exemple en nitrure de silicium SiN ou en oxyde de silicium SiO2.2A, it is then possible to form a dielectric layer 22 which extends over the entire ground surface and etches it locally to reveal the second type connection pads 20.1. At least one opening is obtained by etching, it is referenced 22.1. Engraving can be done through a mask obtained by lithography. The dielectric layer 22 may have a thickness of between about 0.2 and 20 microns. This dielectric layer 22 may be organic, for example BCB (benzocyclobutene) or epoxy resin, or mineral for example silicon nitride SiN or silicon oxide SiO 2 .
Pour terminer le premier niveau rapporté N2 sur le niveau de base Nl, on revêt la structure de la figure 2A, d'un fond conducteur 21 comme il a été montré précédemment à la figure IA. On se réfère à la figure 2B.To terminate the first reported level N2 on the base level N1, the structure of Fig. 2A is coated with a conducting ground 21 as previously shown in Fig. 1A. Referring to Figure 2B.
Le fond conducteur peut être multicouche avec en premier la sous-couche d'accroché.The conductive bottom may be multilayered with the underlayer first hooked.
On procède ensuite à la réalisation du second niveau rapporté N3.The second reported level N3 is then carried out.
On commence par réaliser plusieurs plots de connexion électrolytiques de premier type 10.2 comme on l'a décrit aux figures 1B-1E (figure 3A) sur le premier niveau rapporté N2. Chacun de ces plots de connexion électrolytiques de premier type 10.2 du second niveau rapporté est relié électriquement à un plot de connexion électrolytique de second type 20.1 du premier niveau rapporté N2. La croissance électrolytique a lieu à partir d'un fond conducteur 21, le fond conducteur servant d'électrode pour la croissance électrolytique. C'est d'ailleurs grâce au fond conducteur 21 que le contact électrique se fait entre chaque plot de connexion électrolytique de premier type 10.2 et un plot de connexion électrolytique de second type 20.1 du premier niveau rapporté N2. Par rapport à une autre configuration dans laquelle seulement quelques plots de connexion électrolytiques de premier type 10.2 du second niveau rapporté N3 seraient reliés électriquement à un plot de connexion électrolytique de second type 20.1 du premier niveau rapporté N2 mais pas à d'autres, l'invention permet d'assurer une continuité électrique entre les plots de connexion électrolytique de premier type et ceux de second type. Cette configuration permet en particulier de réaliser directement une électrolyse des plots de connexion de premier type et de second type à partir du même fond conducteur continu 21, ce qui permet notamment de réduire les coûts. Bien entendu, cette électrolyse peut également être réalisée pour les plots du niveau rapporté à partir de l'élément conducteur z2 notamment pour éviter de découvrir la couche 1 qui pourrait être recouverte par les dépôts successifs .We begin by making several electrolytic connection pads of the first type 10.2 as described in Figures 1B-1E (Figure 3A) on the first reported level N2. Each of these first-level second-type electrolytic connection pads 10.2 is electrically connected to a second-type electrolytic connection pad 20.1 of the first reported level N2. The electrolytic growth takes place from a conductive bottom 21, the conductive bottom serving as an electrode for electrolytic growth. It is moreover thanks to the conducting ground 21 that the electrical contact is made between each electrolytic connection pad of the first type 10.2 and a second type electrolytic connection pad 20.1 of the first reported level N2. With respect to another configuration in which only a few electrolytic connection pads of first type 10.2 of the second reported level N3 would be electrically connected to a second type electrolytic connection pad 20.1 of the first reported level N2 but not to others, the The invention makes it possible to ensure electrical continuity between the electrolytic connection pads of the first type and those of the second type. This configuration makes it possible in particular to carry out directly electrolysis of the connection pads of the first type and of the second type from the same continuous conducting base 21, which in particular makes it possible to reduce the costs. Of course, this electrolysis can also be carried out for the studs of the reported level from the conductive element z2 in particular to avoid discovering the layer 1 which could be covered by the successive deposits.
En variante, comme on le verra ultérieurement un plot peut être directement relié à un plot de connexion électrolytique de second type du niveau sous-jacent.Alternatively, as will be seen later a pad can be directly connected to a second type of electrolytic connection pad of the underlying level.
On réalise, à la figure 3B, un ou plusieurs plots de connexion électrolytiques de second type 20.2 comme on l'a décrit aux figures IG et IH.In FIG. 3B, one or more electrolytic connection pads of second type 20.2 are produced as described in FIGS.
On réalise une étape de gravure du fond conducteur 21 pour délimiter des pistes conductrices z2 reliées électriquement aux plots de connexion électrolytiques de premier type 10.2 et/ou aux plots de connexion de second type 20.2. Un plot de connexion électrolytique 20.2 de second type d'un niveau, par exemple le second niveau rapporté N3, peut être relié par une piste conductrice z2 à un plot conducteur électrolytique de premier type 10.2 du même niveau N3 que lui ou d'un autre niveau que le sien ou bien à un plot de connexion électrolytique de second type d'un autre niveau que le sien. L'étape de gravure peut être réalisée en deux fois, l'une après la réalisation des plots de connexion électrolytiques de premier type 10.2 et l'autre après la réalisation des plots de connexion électrolytiques de second type 20.2. On aurait pu envisager que l'étape de délimitation du fond conducteur 21 ait lieu avant la réalisation des plots de connexion électrolytiques de premier type 10.2 du second niveau rapporté N3. On rapporte à la figure 3C un ou plusieurs composants électroniques 130 du deuxième niveau rapporté N3 sur les plots de connexion électrolytiques de premier type 10.2 qui viennent d'être réalisés. Cette étape aurait bien sûr pu avoir lieu avant que les plots de connexion électrolytiques de second type 20.2 ne soient réalisés. La colle servant à l'assemblage du composant électronique est référencée 3.A step of etching the conductive bottom 21 is performed to delimit conductive tracks z2 electrically connected to the electrolytic connection pads of the first type 10.2 and / or to the second type of connection pads 20.2. An electrolytic connection pad 20.2 of the second type of a level, by For example, the second reported level N3 can be connected by a conductive track z2 to a first type electrolytic conductive pad 10.2 of the same level N3 as itself or at a level other than its own, or to a second type electrolytic pad. on another level than his. The etching step can be performed in two stages, one after the completion of the electrolytic connection pads of the first type 10.2 and the other after the production of the electrolytic connection pads of the second type 20.2. It could have been envisaged that the delimitation step of the conducting base 21 takes place before the production of the electrolytic connection pads of the first type 10.2 of the second reported level N3. FIG. 3C relates to one or more electronic components 130 of the second reported level N3 on the first type electrolytic connection pads 10.2 which have just been produced. This step could of course have taken place before the electrolytic connection pads of the second type 20.2 were made. The adhesive used to assemble the electronic component is referenced 3.
On peut procéder à ce stade, à une étape de rodage du composant électronique 130 du deuxième niveau rapporté N3, mais cette étape est facultative.At this stage, a break-in step of the electronic component 130 of the second reported level N3 can be carried out, but this step is optional.
On procède, à la figure 3D, à un enrobage des plots de connexion électrolytiques 20.2 de second type et du composant électronique 130 qui vient d'être rapporté, cet enrobage peut être fait avec de la résine époxy, la couche d'enrobage est référencée 230. Par une étape de rodage, illustrée à la figure 3E, on ajuste la hauteur du deuxième niveau rapporté N3 en s' arrangeant pour mettre à nu le sommet des plots de connexion électrolytiques 20.2 de second type. Si le dispositif électronique empilé objet de l'invention ne comporte pas d'autre niveau, le procédé s'arrête là, le deuxième niveau rapporté N3 étant terminé. Les plots de connexion électrolytiques 20.2 de second type accessibles peuvent servir de contacts par exemple devant être reliés à une source d'énergie ou à un autre dispositif électronique.FIG. 3 is a coating of the electrolytic connection pads 20.2 of the second type and of the electronic component 130 which has just been added, this coating may be made with epoxy resin, the coating layer is referenced 230. By a break-in step, illustrated in Figure 3E, the height of the second level reported N3 arranging to expose the top of the electrolytic connection pads 20.2 of the second type. If the stacked electronic device object of the invention has no other level, the method stops there, the second reported level N3 is completed. The accessible electrolytic connection pads 20.2 of the second type can serve as contacts for example to be connected to a power source or to another electronic device.
Si le dispositif électronique empilé objet de l'invention comporte au moins un troisième niveau rapporté N4 superposé sur le deuxième niveau rapporté N, on peut former une couche diélectrique 23 qui s'étend sur toute la surface rodée. On prévoit localement des ouvertures par gravure pour faire apparaître le sommet des plots de connexion électrolytiques de second type 20.2 (figure 4A) . La gravure peut se faire à travers un masque obtenu par lithographie.If the stacked electronic device object of the invention comprises at least a third reported level N4 superimposed on the second reported level N, can be formed a dielectric layer 23 which extends over the entire ground surface. Engraving apertures are locally provided to reveal the apex of second type electrolytic connection pads 20.2 (FIG. 4A). The engraving can be done through a mask obtained by lithography.
Pour terminer le deuxième niveau rapporté N3 (figure 4B) , on dépose un fond conducteur 21 comme il a été montré précédemment à la figure 2B.To finish the second reported level N3 (FIG. 4B), a conductive bottom 21 is deposited as was previously shown in FIG. 2B.
On procède ensuite à la réalisation d'un troisième niveau rapporté N4.A third reported level N4 is then carried out.
Ces étapes des figures 4A, 4B sont facultatives notamment si les plots de connexion électrolytiques de premier type que l'on s'apprête à former sont implantés directement sur les plots de connexion électrolytiques de second type du second niveau rapporté N3. Comme précédemment on réalise un ou plusieurs plots de connexion électrolytiques de premier type 10.3 et un ou plusieurs plots de connexion électrolytiques 20.3 de second type (figure 5A) . A la figure 5B, on grave le fond conducteur 21 de manière à délimiter des pistes conductrices z3 venant en contact avec les plots de connexions électrolytiques 10.3 de premier type et/ou les plots de connexion électrolytiques de second type 20.3. On réalise ainsi une étape de reroutage.These steps of FIGS. 4A, 4B are optional, especially if the electrolytic connection pads of the first type that are about to be formed are directly implanted on the electrolytic connection pads of the second type of the second reported level N3. As before, one or more electrolytic connection pads of the first type 10.3 and one or more electrolytic connection pads 20.3 of the second type (FIG. 5A) are produced. In FIG. 5B, the conductive bottom 21 is etched so as to delimit conductive tracks z3 coming into contact with the electrolytic connection pads 10.3 of the first type and / or the electrolytic connection pads of the second type 20.3. This produces a rerouting step.
Dans l'exemple décrit, on rapporte, à la figure 5C, après la réalisation des plots de connexion électrolytiques de second type 20.3 et le reroutage, au moins un composant électronique 140 du troisième niveau rapporté N4 sur les plots de connexion électrolytiques 10.3 de premier type et on les assemble par collage. On procède comme à la figure IF. Si le composant électronique 140 a une épaisseur plus grande que la hauteur des plots de connexion électrolytiques de second type 20.3, on peut procéder tout de suite à une étape de rodage visant à l'amincir. Ici encore le composant électronique 140 du troisième niveau rapporté N4 auraient pu être rapporté au préalable, avant la réalisation des plots de connexion électrolytiques 20.3 de second type.In the example described, in FIG. 5C, after the production of the electrolytic connection pads of the second type 20.3 and the rerouting, there is reported at least one electronic component 140 of the third reported level N4 on the electrolytic connection pads 10.3 of the first type and assembled by gluing. The procedure is as in FIG. If the electronic component 140 has a thickness greater than the height of the electrolytic connection pads of the second type 20.3, it is possible to proceed immediately to a lapping step to thin it. Here again the electronic component 140 of the third level reported N4 could have been reported beforehand, before the realization of the electrolytic connection pads 20.3 of the second type.
On procède ensuite à un enrobage avec de la résine, par exemple de type époxy, des plots de connexion électrolytiques de second type 20.3 et du composant électronique 140 du troisième niveau rapporté N4 comme illustré à la figure 5D . La couche d'enrobage est référencée 240. Cette couche d'enrobage 240 va contribuer à compléter le troisième niveau N4 rapporté du dispositif électronique empilé de l'invention. Elle enrobe latéralement le composant électronique 140.Then, a coating is carried out with resin, for example of the epoxy type, electrolytic connection pads of the second type 20.3 and the electronic component 140 of the third reported level N4 as illustrated in FIG. 5D. The coating layer is referenced 240. This coating layer 240 is contribute to completing the third reported N4 level of the stacked electronic device of the invention. It coats the electronic component 140 laterally.
Par une étape de rodage, également illustrée à la figure 5D, on met à nu le sommet des plots de connexion électrolytiques de second type 20.3. Cette étape de rodage peut aussi contribuer à amincir le composant électronique 140 du troisième niveau rapporté N4. Les plots de connexion électrolytiques 20.3 de second type traversent de part en part la couche d'enrobage 240.By a break-in step, also illustrated in FIG. 5D, the top of the electrolytic connection pads of second type 20.3 are exposed. This break-in step can also contribute to thinning the electronic component 140 of the third reported level N4. The electrolytic connection pads 20.3 of the second type pass right through the coating layer 240.
A l'issue de cette étape, le dispositif électronique empilé de l'invention peut être terminé. On peut bien sûr envisager de rapporter un ou plusieurs autres niveaux et on procédera pour chaque niveau supplémentaire comme il a été décrit précédemment pour le deuxième niveau rapporté ou le troisième ou selon la description qui suit et qui présente des variantes dans la façon de procéder. Un niveau du dispositif électronique de l'invention qui vient d'être décrit, éloigné du niveau de base peut ainsi être relié électriquement au niveau de base Nl dans la mesure où deux plots de connexion électrolytiques de second type 20.1, 20.2 de niveaux voisins différents sont situés dans le prolongement l'un de l'autre comme illustré sur les figures 3B à 4B.At the end of this step, the stacked electronic device of the invention can be completed. One can of course consider reporting one or more other levels and proceed for each additional level as described above for the second level reported or the third or the description that follows and which presents variations in how to proceed. A level of the electronic device of the invention which has just been described, remote from the base level can thus be electrically connected to the base level N1 insofar as two electrolytic connection pads of the second type 20.1, 20.2 of different neighboring levels are located in the extension of one another as illustrated in Figures 3B to 4B.
Dans la mesure où sur un même substrat de base 100, on a réalisé collectivement plusieurs dispositifs électroniques empilés élémentaires devant être individualisés, on découpe totalement ou partiellement l'empilement obtenu à la scie S pour les séparer. Les traits de scie S peuvent avoir pour fonction de déconnecter des plots de connexion électrolytiques de premier type ou de second type connectés entre eux auparavant par des pistes conductrices zl, z2,... sans pour autant conduire finalement à des morceaux détachés totalement les uns des autres. Cela permet d'isoler électriquement des composants électroniques entre eux notamment lorsque les croissances électrolytiques sont réalisées à partir des mêmes couches conductrices.Insofar as on the same base substrate 100, several stacked electronic elementary devices to be individualized have been collectively produced, the stack obtained by sawing S is entirely or partially cut for to separate. The saw features S may have the function of disconnecting electrolytic connection pads of the first type or second type previously interconnected by conductive tracks z1, z2,... Without, however, finally leading to pieces totally detached from each other. others. This makes it possible to electrically isolate electronic components from each other, especially when the electrolytic growths are made from the same conductive layers.
Aux figures 6A, 6B l'empilement ne comporte que deux niveaux rapportés N2, N3. Sur les figures 6, on voit bien la coupure de la piste conductrice référencée z2 entre les deux plots de connexion électrolytiques de second type 20.1. Le trait de scie S a scindé en deux un composant électronique rapporté, comme illustré sur la figure 6A avec le composant électronique 120. On obtient alors une pluralité de dispositifs électroniques empilés individuels, l'un d'entre eux est montré sur la figure 6B.In FIGS. 6A, 6B, the stack comprises only two reported levels N2, N3. In FIG. 6, the cut of the conductive track referenced z2 between the two electrolytic connection pads of second type 20.1 is clearly seen. The saw line S has split an attached electronic component in two, as illustrated in FIG. 6A with the electronic component 120. A plurality of individual stacked electronic devices is then obtained, one of which is shown in FIG. 6B. .
Il est bien sûr possible de rapporter deux composants électroniques 120 voisins par niveaux comme illustré sur la figure 6A. Les deux composants électroniques 130 sont placés côte à côte sur le même niveau.It is of course possible to report two adjacent electronic components 120 per level as shown in FIG. 6A. The two electronic components 130 are placed side by side on the same level.
Si au moins un composant électronique 120 d'un niveau est particulièrement épais comme sur la figure 7A, une étape de rodage (figure 7B) du composant électronique 120 pour l'amincir peut avoir lieu avant l'étape d'enrobage (figure 7C) . L'épaisseur du composant électronique 120 peut rester supérieure à la hauteur des plots de connexion électrolytiques 20.1 de second type avant l'enrobage.If at least one electronic component 120 of a level is particularly thick as in FIG. 7A, a break-in step (FIG. 7B) of the electronic component 120 to thin it can take place before the coating step (FIG. 7C) . The thickness of the electronic component 120 may remain greater than the height electrolytic connection pads 20.1 second type before coating.
En variante illustrée sur la figure 8A, l'épaisseur du composant électronique 120 est inférieure à la hauteur des plots de connexion électrolytiques de second type 20.1. Il n'y a donc pas d'étape de rodage préalable à l'étape d'enrobage (figure 8B) . L'étape de rodage (figure 8C) qui suit l'étape d'enrobage n'attaque pas le composant électronique 120.As a variant illustrated in FIG. 8A, the thickness of the electronic component 120 is smaller than the height of the electrolytic connection pads of the second type 20.1. There is therefore no break-in step prior to the coating step (FIG. 8B). The break-in step (FIG. 8C) that follows the coating step does not attack the electronic component 120.
Selon une autre variante, il est possible qu'un ou plusieurs plots de connexion électrolytiques de premier type 10.2, implantés sur un niveau rapporté N2, soient réalisés directement sur des plots de connexion électrolytiques de second type 20.1 dudit niveau rapporté N2. Ils sont situés directement dans le prolongement des plots de connexion électrolytiques de second type 20.1 comme illustré sur les figures 9Bl, 9B2, 9C et 9D . Dans cette configuration, on ne réalise donc pas ni de couche diélectrique, ni de fond conducteur à la suite de l'étape de rodage comme on l'avait décrit aux figures 2A et 2B. On fait simplement croître par électrolyse les plots de connexion électrolytiques de premier type 10.2 d'un niveau donné directement sur les plots de connexion électrolytiques de second type 20.1 du niveau sous-jacent. Les plots de connexion électrolytiques de second type 20.1 du niveau sous-jacent servent d'électrode pour la croissance électrolytique . A la suite de l'étape de rodage qui met à nu les plots de connexion électrolytiques 20.1 du premier niveau rapporté N2 illustrée à la figure IK, on revêt la structure rodée de résine 102 (figure 9Al) . A la figure 9Bl, on forme dans la couche de résine 102, par lithographie, un motif en creux 13 pour chacun des plots de connexion électrolytiques de premier type 10.2 à réaliser. Les motifs en creux 13 dans la résine 102, mettent à nu le sommet des plots de connexion électrolytiques de second type 20.1. Ils sont ensuite remplis du matériau du plot de connexion électrolytique 10.2, par exemple à base de nickel et/ou de cuivre et/ou d'or, par électrolyse. On se réfère à la figure 9Bl. Les plots de connexion électrolytique de premier type 10.2 ne sont pas forcément dans le même matériau que les plots de connexion électrolytique 20.1 qu'ils surmontent.According to another variant, it is possible for one or more electrolytic connection pads of the first type 10.2, implanted on an attached level N2, to be made directly on electrolytic connection pads of the second type 20.1 of said reported level N2. They are located directly in the extension of the electrolytic connection pads of second type 20.1 as illustrated in Figures 9Bl, 9B2, 9C and 9D. In this configuration, therefore, neither a dielectric layer nor a conducting base is produced after the breaking-in step as described in FIGS. 2A and 2B. The first type electrolytic connection pads 10.2 of a given level are simply electrolytically grown directly on the electrolytic connection pads of the second type 20.1 of the underlying level. The electrolytic connection pads of the second type 20.1 of the underlying level serve as an electrode for electrolytic growth. As a result of the break-in step which exposes the electrolytic connection pads 20.1 of the first level reported N2 illustrated in Figure IK, is coated resin lapped structure 102 (Figure 9A1). In FIG. 9B1, a resinous pattern 13 is formed in the resin layer 102 by lithography for each of the electrolytic connection pads of the first type 10.2 to be produced. The recessed patterns 13 in the resin 102, expose the top of the electrolytic connection pads of the second type 20.1. They are then filled with the material of the electrolytic connection pad 10.2, for example based on nickel and / or copper and / or gold, by electrolysis. Referring to Figure 9B1. The electrolytic connection pads of the first type 10.2 are not necessarily in the same material as the electrolytic connection pads 20.1 they overcome.
En variante illustrée aux figures 9A2 et 9B2, il est possible de réaliser une pluralité de motifs en creux 13 répartis sur toute la surface de la couche de résine 102 (figure 9A2) . Les motifs en creux 13 qui se trouvent au dessus des plots de connexion électrolytique de second type 20.1 les exposent. On évite ainsi des problèmes d'alignement. Lors du remplissage par électrolyse, seuls les motifs se trouvant au dessus des plots de connexion électrolytique de second type 20.1 se rempliront car les motifs en creux débouchent sur une surface conductrice de l'électricité et polarisée.In a variant illustrated in FIGS. 9A2 and 9B2, it is possible to produce a plurality of recessed patterns 13 distributed over the entire surface of the resin layer 102 (FIG. 9A2). The recessed patterns 13 which are located above the electrolytic connection pads of the second type 20.1 expose them. This avoids problems of alignment. When filling by electrolysis, only the patterns located above the electrolytic connection pads of second type 20.1 will fill because the recessed patterns open on a conductive surface of electricity and polarized.
On élimine ensuite la couche de résine 102 à la figure 9C. On peut ensuite rapporter et assembler un ou plusieurs composants électroniques 130 du second niveau rapporté N3 (figure 9D) . On place les éléments de contact des composants électroniques rapportés 130 de manière à ce qu' ils viennent en contact électrique avec les plots de connexion électrolytiques de premier type 10.2 ainsi créés. Sur les figures 9, les plots de connexion électrolytiques de premier type 10.2 du second niveau rapporté sont toujours des micro-inserts . Il est bien sûr possible que les plots de connexion électrolytiques de premier type soient des billes fusibles si la température n'est pas une contrainte. On se réfère aux figures 1OA à 10D. Cette série de figures est spécifique à une configuration proche de celle décrite précédemment dans laquelle les plots de connexion électrolytiques de premier type, implantés sur niveau rapporté, sont dans le prolongement direct des plots de connexion électrolytiques de second type du dit niveau rapporté. Il est bien sûr possible que les billes fusibles soient décalées par rapport au sommet des plots de connexion électrolytiques de second type d'un niveau rapporté sous jacent comme décrit précédemment aux figures 11, mais chacune d'entre elle est reliée électriquement à un plot de connexion électrolytique de second type du niveau sous- jacent.The resin layer 102 is then removed in FIG. 9C. One can then report and assemble one or more electronic components 130 of the second level reported N3 (Figure 9D). We place the elements contacting the electronic components reported 130 so that they come into electrical contact with the electrolytic connection pads of the first type 10.2 thus created. In FIGS. 9, the electrolytic connection pads of the first type 10.2 of the second reported level are always micro-inserts. It is of course possible that the electrolytic connection pads of the first type are fusible balls if the temperature is not a constraint. Referring to Figures 10A-10D. This series of figures is specific to a configuration similar to that described above in which the electrolytic connection pads of the first type, implanted on the reported level, are in the direct extension of the electrolytic connection pads of the second type of said level reported. It is of course possible for the fusible beads to be offset from the top of the electrolytic connection pads of the second type by an underlying reported level as previously described in FIG. 11, but each of them is electrically connected to a grounding pad. electrolytic connection of the second type of the underlying level.
On se réfère aux figures 10. Dans cette configuration, après l'étape de rodage, on ne dépose pas non plus de fond conducteur puisque les plots de connexion électrolytiques de premier type 10.2 vont être dans le prolongement des plots de connexion électrolytiques de second type 20.1 du niveau sous- jacent. A la suite de l'étape de rodage qui met à nu les plots de connexion électrolytiques 20.1 de second type du premier niveau rapporté N2, illustrée à la figure IK, on revêt la structure rodée de résine 102 (figure 10A) . L'épaisseur de résine est comprise entre environ 20 et 100 micromètres. A la figure 10A, on forme également dans la couche de résine 102, par lithographie, un motif en creux 14 pour des plots de connexion électrolytiques devant se transformer ensuite en billes fusibles. Les motifs en creux 14 dans la résine 102 sont ensuite remplis du matériau conducteur fusible des billes fusibles, par exemple l'indium In, ou un alliage à base d'étain et de plomb SnPb, d'étain, d'argent et de cuivre SnAgCu, de plomb, d'argent et de cuivre PbAgCu. On entend par matériau conducteur fusible dans le domaine de l'électronique, un matériau conducteur apte à fondre une température suffisamment basse pour éviter la dégradation de composants qui vont être assemblés avec ce matériau. Un homme du métier spécialiste d'électronique sait parfaitement ce qu'est un matériau conducteur fusible. On se réfère à la figure 10B. On élimine ensuite la couche de résine 102 à la figure 10C et on forme les billes fusibles 10.20 par refusion. On peut ensuite rapporter par soudure grâce aux billes fusibles 10.20 un ou plusieurs composants électroniques 130 du second niveau rapporté N3 sur le premier niveau rapporté N2 (figure 10D) . On place les éléments de contact 50 des composants électroniques 130 rapportés de manière à ce qu'ils viennent en contact électrique avec les billes fusibles type 10.20 ainsi créées .Referring to FIGS. 10. In this configuration, after the break-in step, no conductive bottom is deposited either, since the electrolytic connection pads of the first type 10.2 will be in the extension of the electrolytic connection pads of the second type. 20.1 of the underlying level. As a result of the break-in step which exposes the electrolytic connection pads 20.1 of the second type of the first reported level N2, illustrated in FIG. 1K, the ground resin structure 102 is coated (FIG. 10A). The resin thickness is between about 20 and 100 micrometers. In FIG. 10A, a resin pattern 14 is also formed in the resin layer 102, by lithography, for electrolytic connection pads that must then be converted into fusible beads. The hollow patterns 14 in the resin 102 are then filled with the fusible conductive material of the fusible beads, for example indium In, or an alloy based on tin and lead SnPb, tin, silver and copper SnAgCu, lead, silver and copper PbAgCu. The term fusible conductive material in the field of electronics, a conductive material capable of melting a sufficiently low temperature to prevent degradation of components that will be assembled with this material. A person skilled in the art of electronics knows perfectly what is a fusible conductive material. Referring to Figure 10B. The resin layer 102 is then removed in FIG. 10C and the fusible beads 10.20 are formed by reflow. One or more electronic components 130 of the second level reported N3 on the first reported level N2 can then be soldered back via the fusible beads 10.20 (FIG. 10D). The contact elements 50 of the reported electronic components 130 are placed in such a way that they come into contact with each other. electrical with fusible beads type 10.20 thus created.
Encore une autre variante va être décrite ci-après aux figures 11, elle concerne la fabrication des plots de connexion électrolytiques de premier type formés sur un niveau rapporté. Chacun de ces plots de connexion électrolytiques de premier type va être relié électriquement à un plot de connexion électrolytique de second type du niveau 20.1 sur lequel il est implanté. Les plots de connexion électrolytiques de premier type vont être décalés par rapport aux plots de connexion électrolytiques de second type 20.1. Comme décrit aux figures 2A, 2B, 3A, après l'étape de rodage, on dépose une couche diélectrique 22 sur la structure rodée, on grave des ouvertures 14 au niveau du sommet des plots de connexion électrolytiques de second type 20.1 pour les mettre à nu, on forme le fond conducteur 21 sur la structure rodée revêtue partiellement de la couche diélectrique 22, on le modèle pour réaliser des pistes conductrices z2 qui forment un reroutage vers les plots de connexion électrolytiques de premier type à venir (figure HA) .Yet another variant will be described below in Figures 11, it relates to the manufacture of electrolytic connection pads of the first type formed on a reported level. Each of these electrolytic connection pads of the first type will be electrically connected to a second type electrolytic connection pad of the level 20.1 on which it is implanted. The electrolytic connection pads of the first type will be shifted relative to the electrolytic connection pads of the second type 20.1. As described in FIGS. 2A, 2B, 3A, after the break-in step, a dielectric layer 22 is deposited on the lapped structure, apertures 14 are etched at the top of the second type 20.1 electrolytic connection pads to make them n, the conductive bottom 21 is formed on the lapped structure partially coated with the dielectric layer 22, it is modeled to make conductive tracks z2 which form a rerouting towards the next type of electrolytic connection pads (Figure HA).
Enfin on réalise lesdits plots de connexion électrolytiques de premier type 10.2 par lithographie et électrolyse comme décrit plus haut (figures HB et HC) . Par rapport à la description des figures 2 et 3, on réalise le modelage du fond conducteur 21 avant de réaliser les plots de connexion électrolytiques de premier type 10.2. La figure 12 illustre en vue de dessus un dispositif électronique empilé de l'invention en cours de fabrication. Le support de base 100 en forme de disque comporte un anneau périphérique conducteur 51.On voit les composants électroniques 120 du premier niveau rapporté N2. Les tronçons zl.2 sont des tronçons de pistes conductrices zl reliant des composants électroniques 120 via des plots de connexion électrolytiques de premier type (non visibles car cachés sous les composants 120) à des plots de connexion électrolytiques de second type 20.1. Les tronçons zl.l sont des tronçons de pistes conductrices zl reliant des plots de connexion électrolytiques de second type 20.1 l'anneau périphérique 51.Finally, said electrolytic connection pads of the first type 10.2 are produced by lithography and electrolysis as described above (FIGS. HB and HC). Compared with the description of FIGS. 2 and 3, the modeling of the conductive bottom 21 is carried out before making the electrolytic connection pads of the first type 10.2. FIG. 12 is a top view of a stacked electronic device of the present invention; Manufacturing. The disk-shaped base support 100 has a conductive peripheral ring 51. The electronic components 120 of the first reported level N 2 are seen. The sections z1.2 are sections of conductive tracks z1 connecting electronic components 120 via electrolytic connection pads of the first type (not visible because hidden under the components 120) to electrolytic connection pads of the second type 20.1. The sections zl.l are sections of conductive tracks z1 connecting electrolytic connection pads of the second type 20.1 to the peripheral ring 51.
Bien que plusieurs modes de réalisation de la présente invention aient été représentés et décrits de façon détaillée, on comprendra que différents changements et modifications puissent être apportés sans sortir du cadre de l'invention. Notamment certaines étapes du procédé peuvent avoir lieu dans un ordre différent. En outre, les différentes variantes décrites doivent être comprises comme n'étant pas forcément exclusives les unes des autres. Although several embodiments of the present invention have been shown and described in detail, it will be understood that various changes and modifications can be made without departing from the scope of the invention. In particular, certain steps of the method can take place in a different order. In addition, the various variants described must be understood as not necessarily exclusive of each other.

Claims

REVENDICATIONS
1. Dispositif électronique empilé comportant des composants électroniques (120, 130) empilés répartis sur plusieurs niveaux rapportés (N2,A stacked electronic device comprising stacked electronic components (120, 130) distributed over a plurality of reported levels (N2,
N3) les uns sur les autres à partir d'un niveau de baseN3) on top of each other from a basic level
(Nl) accueillant éventuellement au moins un composant électronique (110), dans lequel au moins un plot de connexion électrolytique de premier type (10.1) d'un niveau rapporté (N2) donné relie, directement un élément conducteur (cl, c2) placé sur une face d'un composant électronique (120) du niveau rapporté (N2), à un élément conducteur (zl) placé sur une face en regard d'un niveau voisin (Nl) sous-jacent, tandis qu'au moins un plot de connexion électrolytique de second type (20.1) du niveau rapporté donné (N2) traverse de part en part une couche d'enrobage (220) enrobant latéralement le composant électronique (110) du niveau rapporté (N2) donné et relie électriquement directement deux éléments conducteurs (zl, z2) situés de part et d'autre de ladite couche d'enrobage (220), caractérisé en ce qu' il comporte de plus des plots de connexion électrolytique de premier type (10.2) d'un niveau rapporté (N3) directement sus-jacent au niveau rapporté donné (N2), chacun est relié électriquement à un plot de connexion électrolytique de second type (20.1) du niveau rapporté (N2) donné.(N1) optionally accommodating at least one electronic component (110), in which at least one electrolytic connection pad of the first type (10.1) of a given level (N2) directly connects a conducting element (C1, C2) placed on one side of an electronic component (120) of the reported level (N2), to a conductive element (zl) placed on a face facing an adjacent neighboring level (Nl), while at least one stud electrolytic connection of second type (20.1) of the given reported level (N2) passes right through a coating layer (220) laterally coating the electronic component (110) of reported level (N2) given and directly electrically connecting two elements conductors (z1, z2) located on either side of said coating layer (220), characterized in that it further comprises first-type electrolytic connection pads (10.2) of a reported level (N3 ) directly above the given reported level (N2), c hacun is electrically connected to a second type electrolytic connection pad (20.1) of reported level (N2).
2. Dispositif électronique empilé selon la revendication 1, dans lequel plusieurs composants électroniques (130) se trouvent côte à côte sur un même niveau .Stacked electronic device according to claim 1, wherein a plurality of components electronics (130) are located side by side on the same level.
3. Dispositif électronique de premier type selon l'une des revendications 1 ou 2, dans lequel un plot de connexion électrolytique de premier type (10.1) a une hauteur inférieure à celle d'un plot de connexion électrolytique de second type (20.1) .3. Electronic device of the first type according to one of claims 1 or 2, wherein a first type of electrolytic connection pad (10.1) has a height less than that of a second type electrolytic pad (20.1).
4. Dispositif électronique empilé selon l'une des revendications 1 à 3, dans lequel un plot de connexion électrolytique de premier type (10.1) est un micro-insert ou un ensemble de micro-inserts en forme de picot.Stacked electronic device according to one of claims 1 to 3, wherein a first type electrolytic connection pad (10.1) is a micro-insert or a set of micro-inserts pin-shaped.
5. Dispositif électronique empilé selon l'une des revendications 1 à 3, dans lequel un plot de connexion électrolytique de premier type est une bille fusible (10.20) .Stacked electronic device according to one of claims 1 to 3, wherein a first type electrolytic pad is a fuse ball (10.20).
6. Dispositif électronique empilé selon la revendication 5, dans lequel la bille fusible (10.20) est réalisée dans un matériau fusible à base d' indium, de plomb-étain, de plomb-argent-cuivre, d' argent-étain-cuivre .Stacked electronic device according to claim 5, wherein the fuse ball (10.20) is made of a fuse material based on indium, lead-tin, lead-silver-copper, silver-tin-copper.
7. Dispositif électronique empilé selon l'une des revendications précédentes, dans lequel un plot de connexion électrolytique de premier type (10.1) et/ou un plot de connexion électrolytique de second type (20.1) sont réalisés à base de cuivre et/ou de nickel et/ou d'or.Stacked electronic device according to one of the preceding claims, wherein a first type electrolytic pad (10.1) and / or a second electrolytic pad is type (20.1) are made from copper and / or nickel and / or gold.
8. Dispositif électronique empilé selon l'une des revendications précédentes, dans lequel un composant électronique (110) d'un niveau rapporté (N2) est assemblé au niveau voisin (Nl) sous-jacent avec de la colle.8. Stacked electronic device according to one of the preceding claims, wherein an electronic component (110) of a reported level (N2) is assembled at the adjacent level (Nl) underlying with glue.
9. Dispositif électronique empilé selon l'une des revendications précédentes, dans lequel une couche diélectrique (22), revêtant la couche d'enrobage (220) et le composant électronique (120) enrobé latéralement par la couche d'enrobage (220) du niveau rapporté (N2) donné, possède au moins une ouverture au niveau d'un sommet d'un plot de connexion électrolytique de second type (20.1) du niveau rapporté (N2) donné.Stacked electronic device according to one of the preceding claims, wherein a dielectric layer (22), coating the coating layer (220) and the electronic component (120) laterally coated by the coating layer (220). reported reported level (N2), has at least one opening at a top of a second type electrolytic connection pad (20.1) of the reported level (N2) given.
10. Dispositif électronique empilé selon la revendication 9, dans lequel au moins une piste conductrice (z2) s'étend sur la couche diélectrique (22) et l'ouverture, cette piste conductrice (z2) formant éventuellement l'élément conducteur placé sur une face en regard du niveau rapporté (N3) directement sus-jacent au niveau rapporté donné (N2) correspondant à l'un des deux éléments conducteurs situés de part et d'autre de ladite couche d'enrobage (220) .Stacked electronic device according to claim 9, wherein at least one conductive track (z2) extends over the dielectric layer (22) and the opening, said conductive track (z2) optionally forming the conductive element placed on a face opposite the reported level (N3) directly above the given reported level (N2) corresponding to one of the two conductive elements located on either side of said coating layer (220).
11. Dispositif électronique empilé selon l'une des revendications précédentes, dans lequel un plot de connexion électrolytique de premier type (10.2) du niveau rapporté (N3) directement sus-jacent au niveau rapporté (N2) donné est situé directement dans le prolongement d'un plot de connexion électrolytique de second type (20.2) du niveau rapporté (N2) donné.Stacked electronic device according to one of the preceding claims, wherein a electrolytic connection pad of first type (10.2) of the reported level (N3) directly above the given level (N2) is situated directly in the extension of a second type electrolytic connection pad (20.2) of the reported level ( N2) given.
12. Dispositif électronique empilé selon l'une des revendications 1 à 10, dans lequel un plot de connexion électrolytique de premier type (10.3) du niveau rapporté (N3) directement sus-jacent au niveau rapporté donné (N2) est décalé par rapport à un plot de connexion électrolytique de second type (20.2) du niveau rapporté (N2) donné.Stacked electronic device according to one of claims 1 to 10, wherein an electrolytic connection pad of the first type (10.3) of the reported level (N3) directly above the given reported level (N2) is shifted with respect to an electrolytic connection pad of the second type (20.2) of the reported level (N2) given.
13. Dispositif électronique empilé selon l'une quelconque des revendications 11 ou 12, dans lequel un élément conducteur (z2) placé sur une face en regard du niveau rapporté donné (N2) relié électriquement à un plot de connexion électrolytique de premier type (10.2) du niveau rapporté (N3) directement sus-jacent au niveau rapporté (N2) donné est une piste conductrice également connectée au plot de connexion électrolytique de second type (20.2) du niveau rapporté (N3) directement sus-jacent au niveau rapporté (N2) donné.Stacked electronic device according to any one of claims 11 or 12, wherein a conductive element (z2) placed on a face facing the given reported level (N2) electrically connected to a first type electrolytic connection pad (10.2). ) of the reported level (N3) directly above the reported level (N2) is a conductive track also connected to the second type electrolytic connection pad (20.2) of the reported level (N3) directly above the reported level (N2) ) given.
14. Dispositif électronique empilé selon l'une des revendications précédentes, dans lequel deux plots de connexion électrolytiques de même type de niveaux différents sont dans le prolongement l'un de 1' autre . 14. Stacked electronic device according to one of the preceding claims, wherein two electrolytic connection pads of the same type of different levels are in the extension of one another.
15. Procédé de réalisation d'un dispositif électronique empilé comportant des composants électroniques (120, 130) empilés répartis sur au moins un niveau rapporté (N2, N3) sur un niveau de base (Nl) accueillant éventuellement au moins un composant électronique (110), dans lequel on a0) réalise par électrolyse sur le niveau de base (Nl) au moins un plot de connexion électrolytique de premier type (10.1), le plot de connexion électrolytique de premier type (10.1) étant en contact électrique direct avec un élément conducteur du niveau de base (Nl); b°) rapporte au moins un composant électronique (120) du niveau rapporté (N2) dit premier niveau rapporté, sur le niveau de base (Nl) et on l'assemble de manière à ce qu'un élément conducteur (cl, c2) porté par une face du composant électronique soit en contact électrique direct avec le plot de connexion électrolytique de premier type (10.1) réalisé à l'étape a0) ; c°) réalise par électrolyse sur le niveau de base (Nl) au moins un plot de connexion électrolytique de second type (20.1), le plot de connexion électrolytique de second type (20.1) étant en contact électrique direct avec au moins un second élément conducteur (1) du niveau de base (Nl), ce plot de connexion électrolytique de second type (20.1) affleurant ou dépassant le composant électronique (120) du premier niveau rapporté (N2) ; d°) enrobe le plot de connexion électrolytique de second type (20.1) réalisé à l'étape c°) et le composant électronique (120) du premier niveau rapporté (N2) d'un matériau d'enrobage (220), le sommet du plot de connexion électrolytique de second type (20.1) étant à nu, les étapes a0) à d°) ne contribuant à réaliser que le premier niveau rapporté15. A method of producing a stacked electronic device comprising stacked electronic components (120, 130) distributed on at least one reported level (N2, N3) on a base level (N1) optionally accommodating at least one electronic component (110). ), in which 0 ) is carried out by electrolysis on the base level (Nl) at least one electrolytic connection pad of the first type (10.1), the electrolytic connection pad of the first type (10.1) being in direct electrical contact with a conductive element of the base level (N1); b) relates at least one electronic component (120) of the reported level (N2), said first level, to the base level (N1) and is assembled so that a conductive element (c1, c2) carried by a face of the electronic component in direct electrical contact with the electrolytic connection pad of the first type (10.1) made in step a 0 ); c) electrolytically performs on the base level (Nl) at least one second type electrolytic connection pad (20.1), the second type electrolytic pad (20.1) being in direct electrical contact with at least one second element conductor (1) of the base level (N1), the electrolytic connection pad of the second type (20.1) flush with or exceeding the electronic component (120) of the first reported level (N2); d °) coats the electrolytic connection pad of second type (20.1) made in step c °) and the electronic component (120) of the first reported level (N2) of a coating material (220), the top electrolytic connection pad of second type (20.1) being exposed, the steps a 0 ) to d °) only contributing to achieving the first reported level
(N2) ; e°) réalise par électrolyse sur le premier niveau rapporté (N2) des plots de connexion électrolytique de premier type (10.2), chaque plot de connexion électrolytique de premier type (10.2) étant en contact électrique avec un plot de électrolytique de second type (20.1) réalisé à l'étape c°) .(N2); e °) electrolytically on the first reported level (N2) electrolytic connection pads of the first type (10.2), each electrolytic connection pad of the first type (10.2) being in electrical contact with an electrolytic pad of the second type ( 20.1) carried out in step c °).
16. Procédé de réalisation d'un dispositif électronique empilé selon la revendication 15, dans lequel un plot de connexion de premier type (10.2) réalisé sur le premier niveau rapporté (N2) est en contact électrique direct avec un premier élément conducteur (z2) du premier niveau rapporté (N2) .16. A method of producing a stacked electronic device according to claim 15, wherein a first type connection pad (10.2) made on the first reported level (N2) is in direct electrical contact with a first conductive element (z2). first reported level (N2).
17. Procédé de réalisation d'un dispositif électronique empilé selon l'une des revendications 15 ou 16, dans lequel en outre on : f°) rapporte au moins un composant électronique (130) du second niveau rapporté (N3) sur le premier niveau rapporté (N2) et on l'assemble de manière à ce qu'un élément conducteur (cl, c2) porté par une face du composant électronique (130) soit en contact électrique direct avec le plot de connexion électrolytique de premier type (10.2) réalisé à l'étape e°) ; g0) réalise par électrolyse sur le premier niveau rapporté (N2) au moins un plot de connexion électrolytique de second type (20.2), le plot de connexion électrolytique de second type (20.2) étant en contact électrique direct avec un second élément conducteur (z2) du premier niveau rapporté (N2), ce plot de connexion électrolytique de second type (20.2) affleurant ou dépassant le composant électronique (120) du premier niveau rapporté (N2) ; h°) enrobe le plot de connexion électrolytique de second type (20.2) réalisé à l'étape g0) et le composant électronique (130) du second niveau rapporté (N3) d'un matériau d'enrobage (230), le sommet du plot de connexion électrolytique de second type (20.2) étant à nu, ces étapes contribuant à réaliser le second niveau rapporté (N3) .17. A method of producing a stacked electronic device according to one of claims 15 or 16, wherein further on: f °) relates at least one electronic component (130) of the second reported level (N3) on the first level reported (N2) and is assembled so that a conductive element (cl, c2) carried by one face of the electronic component (130) is in direct electrical contact with the connection pad first type electrolytic (10.2) carried out in step e °); g 0 ) electrolytically performs on the first reported level (N2) at least one electrolytic connection pad of the second type (20.2), the second type electrolytic connection pad (20.2) being in direct electrical contact with a second conductive element ( z2) of the first reported level (N2), the electrolytic connection pad of the second type (20.2) flush with or exceeding the electronic component (120) of the first reported level (N2); h °) coats the second type electrolytic connection pad (20.2) made in step g 0 ) and the electronic component (130) of the second reported level (N3) of a coating material (230), the top electrolytic connection pad of second type (20.2) being exposed, these steps contributing to achieving the second reported level (N3).
18. Procédé de réalisation d'un dispositif électronique empilé selon la revendication 17, dans lequel on réitère les étapes e°) à h°) au moins une nième fois (n supérieur ou égal à deux) de manière à obtenir un nième+1 niveau rapporté, le premier niveau rapporté devenant le nième-1 niveau rapporté, le second niveau rapporté devenant le nième niveau rapporté, le niveau de base devenant le nième-2 niveau .18. A method of producing a stacked electronic device according to claim 17, wherein the steps e) to h °) are repeated at least one nth time (n greater than or equal to two) so as to obtain an nth + 1 reported level, the reported first level becoming the nth-1 level reported, the reported second level becoming the nth reported level, the base level becoming the nth-2 level.
19. Procédé de réalisation d'un dispositif électronique empilé selon l'une des revendications 15 à 18, dans lequel le plot de connexion électrolytique de second type (20.1) est situé hors de l'emprise que le composant électronique (120) du niveau rapporté (N2, N3) possède sur le niveau sous-jacent (Nl, N2) .19. A method of producing a stacked electronic device according to one of the Claims 15 to 18, wherein the second type electrolytic connection pad (20.1) is located out of the way that the electronic component (120) of the reported level (N2, N3) has on the underlying level (N1, N2).
20. Procédé de réalisation d'un dispositif électronique empilé selon l'une des revendications 15 ou 17, dans lequel aux étapes d°) ou h°) la mise à nu du sommet du plot de connexion électrolytique de second type (20.1) et du plot de connexion électrolytique de second type (20.2) est obtenue par rodage au moins du matériau d'enrobage (220, 230) et éventuellement du composant électronique (120, 130) du premier niveau rapporté (N2) et/ou du second niveau rapporté (N3) .20. A method of producing a stacked electronic device according to claim 15, wherein in steps d) or h °) exposing the top of the electrolytic connection pad of the second type (20.1) and of the second type electrolytic connection pad (20.2) is obtained by lapping at least the coating material (220, 230) and optionally the electronic component (120, 130) of the first reported level (N2) and / or the second level reported (N3).
21. Procédé de réalisation d'un dispositif électronique empilé selon l'une des revendications 15 à 20, dans lequel on réalise le premier élément conducteur (zl) et/ou le second élément conducteur (zl) du niveau de base (Nl) en gravant un fond conducteur (1) formé en surface du niveau de base21. A method of producing a stacked electronic device according to one of claims 15 to 20, wherein the first conductive element (zl) and / or the second conductive element (zl) of the base level (Nl) is produced by engraving a conductive bottom (1) formed at the surface of the base level
(Nl) .(Nl).
22. Procédé de réalisation d'un dispositif électronique empilé selon l'une des revendications 15 à 21, dans lequel on réalise le premier élément conducteur (z2) et/ou le second élément conducteur (z2) du premier niveau rapporté (N2) en gravant un fond conducteur (21) formé en surface du premier niveau rapporté (N2), ce fond conducteur (21) surmontant une couche diélectrique (22) ouverte au niveau du sommet du plot de connexion électrolytique de second type (20.1) réalisé à l'étape g0) .22. A method of producing a stacked electronic device according to one of claims 15 to 21, wherein the first conductive element (z2) and / or the second conductive element (z2) of the first reported level (N2) are made of engraving a conductive bottom (21) formed on the surface of the first reported level (N2), the conductive bottom (21) surmounting a dielectric layer (22) open at the top of the second type electrolytic connection pad (20.1) made in step g 0 ).
23. Procédé de réalisation d'un dispositif électronique empilé selon la revendication 22, dans lequel le premier élément conducteur (zl) et le second élément conducteur (zl) du niveau de base (Nl) sont confondus et/ou le premier élément conducteur (z2) et le second élément conducteur (z2) du premier niveau rapporté (N2) sont confondus.23. A method of producing a stacked electronic device according to claim 22, wherein the first conductive element (z1) and the second conductive element (z1) of the base level (N1) coincide and / or the first conductive element ( z2) and the second conducting element (z2) of the first reported level (N2) coincide.
24. Procédé de réalisation d'un dispositif électronique empilé selon l'une des revendications 15, 17 à 23, dans lequel on fait croître par électrolyse le plot de connexion électrolytique de premier type (10.2) réalisé à l'étape e°) directement sur le sommet du plot de connexion électrolytique de second type (20.1) réalisé à l'étape c°) .24. A method of producing a stacked electronic device according to one of claims 15, 17 to 23, wherein the first type electrolytic pad (10.2) made in step e °) is directly electrolytically grown. on the top of the electrolytic connection pad of the second type (20.1) made in step c °).
25. Procédé de réalisation d'un dispositif électronique empilé selon l'une des revendications 15 à 24, dans lequel on procède à une étape de refusion entre l'étape e°) et l'étape f°) pour que le plot de connexion de premier type réalisé à l'étape e°) se transforme en bille fusible (10.20) .25. Process for producing a stacked electronic device according to one of claims 15 to 24, in which a step of reflow between step e °) and step f °) is carried out so that the connection pad first type made in step e °) is transformed into a fuse ball (10.20).
26. Procédé de réalisation d'un dispositif électronique empilé selon l'une des revendications 15 à 24, dans lequel l'étape b°) est réalisée après l'étape c°) et/ou l'étape f°) est réalisée après l'étape g0) .26. A method of producing a stacked electronic device according to one of claims 15 to 24, wherein step b) is performed after step c °) and / or step f °) is performed after step g 0 ).
27. Procédé de réalisation d'un composant électronique empilé selon l'une des revendications 15 à 24, dans lequel lorsque l'étape b°) est réalisée avant l'étape c°) et/ou l'étape f°) est réalisée avant l'étape g0), on amincit le composant électronique (120) avant l'étape c°) et/ou l'étape f°) .27. A method of producing a stacked electronic component according to one of claims 15 to 24, wherein when step b °) is performed before step c °) and / or step f °) is performed before step g 0 ), the electronic component (120) is thinned before step c °) and / or step f °).
28. Procédé de réalisation d'un dispositif électronique empilé selon l'une des revendications 15 à 27, dans lequel lorsque le dispositif électronique empilé comporte au moins deux dispositifs électroniques empilés élémentaires, à l'issue de la réalisation du dernier niveau rapporté, on effectue une découpe partielle ou totale du dispositif électronique empilé pour séparer les dispositifs électroniques empilés élémentaires.28. A method of producing a stacked electronic device according to one of claims 15 to 27, wherein when the stacked electronic device comprises at least two stacked electronic elementary devices, after completion of the last reported level, it is performs a partial or total cut of the stacked electronic device to separate the stacked electronic elementary devices.
29. Procédé de réalisation d'un dispositif électronique empilé selon la revendication 28, dans lequel la découpe est une découpe d'au moins un élément conducteur visant à isoler électriquement les dispositifs électroniques empilés élémentaires. 29. A method of producing a stacked electronic device according to claim 28, wherein the blank is a cutout of at least one conductive element for electrically insulating the stacked electronic elementary devices.
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JP2011522431A (en) 2011-07-28

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