EP2244331A1

EP2244331A1 - Planar waveguide

Info

Publication number: EP2244331A1
Application number: EP09290299A
Authority: EP
Inventors: Patrice Gamand; Sidina Wane
Original assignee: NXP BV
Current assignee: NXP BV
Priority date: 2009-04-22
Filing date: 2009-04-22
Publication date: 2010-10-27

Abstract

A planar wave guide comprising a carrier (2), at least two ground planes (8a, 8b) arranged on the surface of the carrier, and at least one central line (10) on which a transmission signal propagates and which is arranged on the one surface of the carrier in between the ground planes. In order to improve loss factor and impedance, the central line extends from the surface of the carrier into the carrier.

Description

The subject matter relates to a planar waveguide, an integrated circuit comprising a planar waveguide, a use of a planar waveguide and a method for assembling a planar waveguide.
Coplanar transmission lines are widely used in the microwave domain as well as in integrated circuits. In particular for microwave-integrated circuits (MMIC) it is important to reduce the circuit dimensions from cost and reliability point of view. When designing planar transmission lines, it is necessary to reduce losses at high frequency and to achieve low impedance.
For example, Figure 1 illustrates a common structure of a coplanar waveguide. As can be seen in Figure 1, a coplanar waveguide may be comprised of a carrier 2, with a substrate 3, a dielectric layer 4 and a top metal layer 8. The coplanar waveguide according to prior art can be made with a top metal layer 8 having a certain pattern, i.e. a ground plane, top metal layers 8a and 8b, and a signal track 10 (also being a metal layer) with a defined space (gap) between the ground planes and the signal track.
On top of the dielectric layer 4, the metal layer 8 is then arranged to make a coplanar waveguide. Two ground planes 8a, 8b can be arranged on the surface of the carrier 2. In between the ground planes 8a, 8b, there can be arranged a central line 10. The central line 10 may have a width W, and the distance between the central line 10 and the ground plane 8b can be a gap G.
As can be seen, the ground planes 8 and the central line 10 are arranged coplanar on the surface of the carrier 2, in particular on the surface of the dielectric layer 4. The electromagnetic field of signals on the central line 10 propagates around the central line 10. The loss factor as well as the characteristic impedance strongly depend on the width W and the gap G, and need to be reduced. However, it has been found that in the shown coplanar structure the loss factor at high frequency is high. Further, the impedance characteristic of the described structure can hardly be below 20 Ohms, as in this case the gap G needs to be very small. However, some technology constraints require the gap G to be larger than 10 µm, for example larger than 50 µm, for example larger than 100 µm.
The constraint on the gap G as well as the constraint on the width W, which may be due to area constraints on the integrated circuit, provide for increased losses at high frequencies and higher impedance characteristics than desired.
In view of the above, it is an aim of the present application to provide for a planar waveguide having a low loss factor at high frequencies. It is a further aim to provide for a planar waveguide having a low impedance characteristic. It is another aim of the application to provide for small-built planar structures with improved transmission quality.
These and other aims are addressed by embodiments of the invention, which comprise a planar waveguide comprising a carrier, at least two ground planes arranged on one surface of the carrier, at least one central line on which a transmission signal propagates and which is arranged on the one surface of the carrier in between the ground planes, wherein the central line extends from the surface of the carrier into the carrier.
It has been found that the effect on impedance characteristic as well as on losses can be influenced by the structural design of the central line. Surprisingly it has been found that by extending the central line into the carrier, the gap constraints of certain technologies can be met, while still the distance between the central line and the ground planes can be reduced, by extending the central line into the carrier. On the surface of the carrier, the gap G is still within technology constraints. However, within the carrier, it is possible to extend the central line, thus reducing the overall distance between at least one ground plane and the central line.
It has been found that by extending the central line into the carrier, and for example reducing thus the effective distance between the central line, the loss factor can be improved in particular at high frequencies, in particular at frequencies above 10 GHz, in particular at frequencies between 10 and 100 GHz. Furthermore, it has been found that the impedance characteristic can be improved within a range of 1 GHz to 100 GHz. For example, the impedance can be reduced by at least 5 Ohms, preferably at least 10 Ohms by extending the central line into the carrier and possibly reducing thus the effective distance between the central line and the ground plane. The central line extends further into the carrier than the ground planes.
According to an embodiment, the central line is arranged in between the ground planes with a gap to at least one ground plane. The gap to the ground plane on the surface may be imposed due to technology constraints. For example, some technologies require a space between the central line and the ground plane of at least 10 µm. By providing the gap between the ground plane and the central line, these technology constraints can be met.
According to embodiments, the carrier comprises at least one substrate and at least one top metal layer, wherein the central line extends at least through the top metal layer. For example, it may be possible to deposit first a first dielectric layer on top of a carrier. Then it may be possible to deposit a first metal layer with the appropriate shape onto the dielectric layer. On top of the first metal layer a second dielectric layer may be deposited. Via holes may be created in that second dielectric layer in order to connect the first metal layer to a second, topmost top metal layer 10, to make a final signal line. Ground planes may also be deposited as topmost top metal layers.
Several metal and dielectric layers, for instance using an Integrated Circuit technology, i.e. Silicon or Gallium Arsenide or multi layer ceramic or insulating substrate technologies, allows for creating appropriate structures.
For example, the dielectric layer(s) may be composed of SiO2, Si3N4, SiN, Polyimide, or the like.
Further, according to embodiments, the central line may have an increased width within the carrier. It has been found that the effective distance between at least one ground plane, preferably both ground planes, and the central line can be reduced by increasing the width of the central line at the portion which extends into the carrier. For example, the width of the portion of the central line being arranged on the surface of the carrier is 30 µm, the width of the central line arranged below the surface of the carrier, i.e. within the carrier, can be 60 µm. Thus, the gap G between the central line and the ground planes, can be reduced at least by a portion of the central line being arranged underneath the surface of the carrier. This allows for providing a delta parameter, which may be the effective distance of the central line being projected onto the surface of the carrier and the ground planes. For example, the effective width can be smaller than the width of the central line on the surface of the carrier.
It has been found that a bar may extend from the central line into the carrier, thus extending at least into the top metal layer and connecting a lower portion of the central line with a portion of the central line being arranged on the surface of the substrate.
According to embodiments, the bar is arranged substantially centered on the central line such that the central line is T-shaped.
In order to reduce the effective width between the central line and the at least one ground plane, in particular to adjust the delta parameter, embodiments provide for a flange extending from the bar and being arranged within the carrier. The flange may be parallel to the portion of the central line being arranged on the surface of the carrier.
According to embodiments, the width of the flange may be bigger than the width of the central line. By adjusting the width of the flange, the effective distance between at least one ground plane and the central line, i.e. the delta parameter, can be adjusted.
According to embodiments, the flange can be straight. For example, the flange may run in parallel to the surface of the carrier and thus in parallel to the central line.
According to embodiments, the flange may be v-shaped. According to the example, the flange may be stepped. It may be possible that the flange may be v-shaped, being opened into the direction of the carrier. It may for example be possible to have a stepped flange, whereby each step of the flange may constitute one layer of the central line. For example, in multi-layer technology, where one central line and several ground planes are arranged on top of each other, multi-layered, each step of the flange may constitute one central line within the respective layer.
According to one further aspect, there is provided an integrated circuit comprising a waveguide as described above. An integrated circuit having a planar waveguide as described above may propagate microwave signals at reduced losses.
According to a further aspect, the use of a wave guide as described above is provided in microwave signal propagation.
Another aspect is a method for assembling a waveguide of claim 1 comprising arranging a first dielectric layer onto a carrier, arranging a first metal layer onto the first dielectric layer, arranging a second dielectric layer on the first metal layer, arranging a top metal layer on the second dielectric layer, wherein the top metal layer is comprised of at least one central line and at least one ground line, and wherein the at least one central line is electrically connected to at least the first metal layers by via holes through the second dielectric layer.
These and other aspects of the application will be apparent from and elucidated with reference to the following figures. In the figures show:

Fig. 1: a conventional coplanar waveguide structure;
Fig. 2: a side view onto a coplanar waveguide structure according to embodiments;
Fig. 3: a side view onto a coplanar waveguide according to embodiments;
Fig. 4: a side view of the central line with a bar and a stepped flange;
Fig. 5a: a diagram of a loss factor in dB/mm ; and
Fig. 5b: a diagram of impedance characteristic.

Figure 2 illustrates a coplanar waveguide structure according to embodiments. The illustration in Figure 2 is schematically and shows the coplanar structure in a side view. As can be seen, a carrier 2 with a substrate 3, a first dielectric layer 4 and a second dielectric layer 6 are is used for carrying on its surface a top metal layer comprised of at least two ground planes 8a, 8b and a central line 10. In between the ground planes 8a, 8b there is arranged the central line 10, which extends, parallel to the ground planes 8a, 8b, on the surface of carrier 2. As can be seen, a gap G between the central line 10 and the ground planes 8a, 8b is provided. On the central line 10, a high frequency signal may propagate. An electromagnetic field may then propagate around the central line 10. As can be seen, central line 10 comprises a bar 12, being arranged centrally to the central line 10. The bar 12 ends in a flange 14, which flange 14 may be arranged in between the first dielectric layer 4 and the second dielectric layer 6 and may constitute a metal layer.
As can be seen, bar 12 extends by via holes through the second dielectric layer 6 to connect to the flange 14. The flange 14 is arranged beneath the surface of carrier 2, more particularly in between dielectric layer 6 and dielectric layer 4.
As can be seen, the flange 14 has a width which is bigger than the width W of the portion of the central line 10 being arranged on the surface of the carrier 2. By extending the width of the flange 14 beyond the width of the portion of the central line 10 on top of the carrier 2, the gap G between the central line 10 and the ground planes 8a, 8b can be reduced to obtain a delta parameter δ, which can be used to optimize the loss factor and the impedance. By reducing the distance between the flange 14 and the ground planes 8, the loss factor as well as the impedance can be reduced for high frequencies. By providing the flange 14 beneath the surface of carrier 12, in particular beneath dielectric layer 6, technology constraints regarding gap G may be complied with, and further the loss factor as well as the characteristic impedance can be improved.
The central line extends further into the carrier than the ground planes.
Figure 3 illustrates another possible structure of a coplanar waveguide according to embodiments. As can be seen in Figure 3, besides extending the central line 10 into the dielectric layer 6, it may also be possible for at least one of the ground planes 8a, 8b to extend into at least the second dielectric layer 6, i.e. using a bar extending into via holes.
Figure 4 illustrates a central line 10 in more detail according to an embodiment. As can be seen, a top portion 10a of the central line 10 can be straight. This top portion 10a can be arranged on the surface of the carrier 2. Centrally to the top portion 10a, there can be arranged a bar 12. Top portion 10a and bar 12 constitute a T-shape. Bar 12 may extend into flange 14. As can be seen, flange 14 can be v-shaped, with the opening in the direction of carrier 2. Moreover, flange 14 can be stepped, where several steps may be constituted within flange 14. The effective width of flange 14 may be bigger than the width of the top portion 10a of the central line 10. By providing steps in flange 14, different layers of central lines may be provided, in particular when used in multi-layered architectures.
Figure 5a illustrates the loss factor of a planar waveguide according to the above described embodiments compared to conventional coplanar waveguides. The abscissa indicates the frequency, whereas the ordinate indicates the loss factor in dB/mm. Slope 16 illustrates the loss factor of a conventional coplanar wave guide. As can be seen, at about 10 GHz, the loss factor increases to about -0,8 dB/mm at 100 GHz. In contrast to that, the slope 18 shows the loss factor of the coplanar waveguides according to embodiments. As can be seen, at about 100 GHz, the loss factor is only -0,4 dB/mm, compared to - 0,8 dB/mm for a conventional coplanar waveguide.
Figure 5b illustrates the impedance Re (Zc) of a coplanar waveguide according to embodiments compared to a conventional coplanar waveguide. The abscissa again illustrates the frequency in gigahertz, and the ordinate illustrates the impedance in Ohm. As can be seen from slope 20, the impedance of a conventional coplanar waveguide is around 70 and 80 Ohms between 1 and 100 GHz. Compared to that, the impedance of a coplanar waveguide according to embodiments lies between 64 and 62 Ohm, which is an improvement of more than 10 Ohm. The reduction of loss factor and impedance is obtained due to the confinement of the electromagnetic fields in the low permittivity region and because the currant curving effects are reduced in the waveguide according to embodiments.
By way of the described structure, it is possible to reduce the losses because the resistance of the signal line (central line 10) can be reduced. For example, the area of the metal cross section can be larger than in a conventional design. The characteristic impedance can be lowered because the electric field between the signal line and the ground planes may be bigger, due to a bigger gap G. This electric field may increase the capacitance to ground C and therefore reduce the impedance of the signal line.

Claims

Planar waveguide comprising:
- a carrier (2),

- at least two ground planes (8a, 8b) arranged on one surface of the carrier (2),

- at least one central line (10) on which a transmission signal propagates and which is arranged on the one surface of the carrier (2) in between the ground planes (8a, 8b), wherein

- the central line (10) extends from the surface of the carrier (2) into the carrier (2).
Planar waveguide of claim 1, wherein the central line (10) is arranged in between the ground planes (8a, 8b) with a gap (G) to at least one ground plane (8a, 8b).
Planar waveguide of claim 1, wherein the carrier (2) comprises at least one substrate (3) and at least one dielectric layer (6), and wherein the central line (10) extends at least through the top dielectric layer (6).
Planar waveguide of claim 1, wherein the central line (10) has an increased width within the carrier (2).
Planar waveguide of claim 1, wherein a bar (12) extends from the central line (10) into the carrier (2).
Planar waveguide of claim 5, wherein the bar (12) is arranged substantially centered on the central line (10) such that the bar (12) and the central line (10) are T-shaped.
Planar waveguide of claim 5, wherein a flange (14) extends from the bar (12) and is arranged within the carrier (2).
Planar waveguide of claim 7, wherein a width (W) of the flange (14) is bigger than the width (W) of the central line (10).
Planar waveguide of claim 7, wherein the flange (14) is straight.
Planar waveguide of claim 7, wherein the flange (14) is v-shaped.
Planar waveguide of claim 7, wherein the flange (14) is stepped.
Integrated circuit comprising a waveguide of claim 1.
Use of a waveguide of claim 1 in microwave signal propagation.
Method for assembling a waveguide of claim 1 comprising:
arranging a first dielectric layer onto a carrier,

arranging a first metal layer onto the first dielectric layer,

arranging a second dielectric layer on the first metal layer,

arranging a top metal layer on the second dielectric layer, wherein the top metal layer is comprised of at least one central line and at least one ground line, and wherein the at least one central line is electrically connected to at least the first metal layers by via holes through the second dielectric layer.