EP2227727B1 - Datenprozessor-leistungsfähigkeitsvorhersage - Google Patents
Datenprozessor-leistungsfähigkeitsvorhersage Download PDFInfo
- Publication number
- EP2227727B1 EP2227727B1 EP07859537.8A EP07859537A EP2227727B1 EP 2227727 B1 EP2227727 B1 EP 2227727B1 EP 07859537 A EP07859537 A EP 07859537A EP 2227727 B1 EP2227727 B1 EP 2227727B1
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- Prior art keywords
- task
- data processor
- performance
- tasks
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Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Program initiating; Program switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
- G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
- G06F9/4881—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
- G06F9/4893—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues taking into account power or heat criteria
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3206—Monitoring of events, devices or parameters that trigger a change in power modality
- G06F1/3228—Monitoring task completion, e.g. by use of idle timers, stop commands or wait commands
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
- G06F11/3409—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment for performance assessment
- G06F11/3419—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment for performance assessment by assessing time
- G06F11/3423—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment for performance assessment by assessing time where the assessed time is active or idle time
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Definitions
- the performance predictor 112 predicts the short-term software workload on the CPU for each task using an algorithm which tracks the history of the recent software workload of each task running in the OS and extrapolates it to derive a prediction of required performance in the next coming period.
- the performance predictor 112 is arranged to distinguish between blocking and non-blocking operating system access calls.
- the performance predictor 112 in the embodiment of the present invention shown in Figure 1 is arranged to distinguish for a given task A between: -
- the idle time compensator 124 receives signals 126, 128 and 130 from the OS 104 identifying respectively whether an OS access call of the current application task is blocking or non-blocking for use of the CPU for other tasks, the uncorrected ('raw') idle time associated with the current task and other information relative to the current task. The idle time compensator 124 then subtracts from the raw idle time for each task 134 any inactive time during which the CPU was anyway unavailable to perform that same task and provides to the performance predictor 112 outputs 132 defining the idle time calculation thus modified for each task identified at 134.
- the video application programme is shown as requiring frames of n time slots 200 to be played back from an input buffer (not shown) for a task A.
- Each frame is followed by a slot 202 in which the processing of the frames waits for a synchronisation signal and the CPU can be inactive.
- no other task than task A calls for servicing by the OS.
- the OS would be available to perform tasks other than task A provided the other tasks are completed by the CPU sufficiently before the next slot 200 where the next synchronisation signal for task A requires processing in the CPU.
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Software Systems (AREA)
- Computer Hardware Design (AREA)
- Quality & Reliability (AREA)
- Power Sources (AREA)
Claims (11)
- Ein Datenverarbeitungsapparat (100) aufweisend
einen Datenprozessor (102), welcher ein Betriebssystem (104) aufweist zum Ausführen von Aufgaben von einem Anwendungsprogramm (106), und
einen Leistung und Performance Kontroller (110, 112, 118) zum Steuern von Parametern und Ausführungsmodi von den Aufgaben mittels des Datenprozessors, wobei der Leistung und Performance Kontroller einen Performance Prädiktor (112) enthält zum Erzeugen einer Schätzung von benötigter Performance von dem Datenprozessor (102) für die Aufgaben unter Berücksichtigung inaktiver Perioden von den Aufgaben und Anpassen des Performance und Leistung Verbrauchs von dem Datenprozessor als Antwort auf die Schätzung,
wobei der Performance Prädiktor (112, 124) eingerichtet ist zum Unterscheiden für jede der Aufgaben zwischen:- verfügbaren inaktiven Perioden (210) von dem Datenprozessor (102) für die Aufgabe, während welcher der Datenprozessor verfügbar war, um dieselbe Aufgabe zu verarbeiten, welche bei Erzeugen der Schätzung von benötigter Performance für dieselbe Aufgabe enthalten sind, und- nicht verfügbaren inaktiven Perioden (220) von dem Datenprozessor für die Aufgabe, während welcher der Datenprozessor nicht verfügbar war zum Verarbeiten der Aufgabe und
der Datenprozessor (102) andere Aufgaben nicht verarbeitet hat, und
nicht verfügbare aktive Perioden (220) von dem Datenprozessor (102), während welcher der Datenprozessor nicht verfügbar war, um dieselbe Aufgabe zu verarbeiten, aber andere Aufgaben verarbeitet hat, welche bei Erzeugung der Schätzung von benötigter Performance für dieselbe Aufgabe ausgeschlossen sind. - Datenverarbeitungsapparat gemäß Anspruch 1, wobei der Datenprozessor (102) auf nicht verfügbare inaktive Perioden (220) für eine erste Aufgabe reagiert, um das Betriebssystems zu einer anderen Aufgabe zu schalten, falls es nicht durch die inaktive erste Aufgabe blockiert ist, oder um in einen Leerlaufmodus zu treten, falls keine andere Aufgabe zum Verarbeiten bereit ist.
- Datenverarbeitungsapparat gemäß einem der vorhergehenden Ansprüche, wobei die Aufgaben Eingabe/Ausgabe Zugriffe (204, 206) enthalten und der Leistung und Performance Kontroller (110, 112, 118, 124) auf die Eingabe/Ausgabe Zugriffe von einer Aufgabe reagiert, um entsprechende nicht verfügbare inaktive Perioden (220) bei Erzeugen der Schätzung für diese Aufgabe auszuschließen.
- Datenverarbeitungsapparat gemäß einem der vorhergehenden Ansprüche, wobei der Leistung und Performance Kontroller (110, 112, 118, 124) auf einen abklingenden Durchschnitt von Auslastung für eine Aufgabe reagiert in Erzeugen der Schätzung für diese Aufgabe.
- Datenverarbeitungsapparat gemäß einem der vorhergehenden Ansprüche, wobei der Leistung und Performance Kontroller (110, 112, 118, 124) eingerichtet ist, eine Taktfrequenz und/oder eine Versorgungsspannung für den Datenprozessor (102) anzupassen beim Anpassen des Performance und Leistung Verbrauchs von dem Datenprozessor als Antwort auf die Schätzung.
- Ein Verfahren zum Verarbeiten von Daten unter Verwendung eines Datenprozessors (102), welcher aufweist
ein Betriebssystem (104) zum Ausführen von Aufgaben von einem Anwendungsprogramm (106), und
einen Leistung und Performance Kontroller (110, 112, 118), welcher Parameter und Ausführungsmodi von den Aufgaben mittels des Datenprozessors steuert,
wobei der Leistung und Performance Kontroller einen Performance Prädiktor (112) enthält, welcher eine Schätzung von benötigter Performance von dem Datenprozessor (102) für die Aufgaben erzeugt, unter Berücksichtigung von inaktiven Perioden von den Aufgaben und Anpassen des Performance und Leistung Verbrauchs von dem Datenprozessor als Antwort auf die Schätzung. wobei der Performance Prädiktor (112, 114) für jede der Aufgaben unterscheidet zwischen:- verfügbaren inaktiven Perioden (210) von dem Datenprozessor (102) für die Aufgabe, während welcher der Datenprozessor verfügbar ist, um dieselbe Aufgabe weiter zu verarbeiten, und- nicht verfügbaren inaktiven Perioden (220) für den Datenprozessor für die Aufgabe, während welcher der Datenprozessor nicht verfügbar war zum Verarbeiten der Aufgabe und der Datenprozessor (102) nicht verfügbar war zum Verarbeiten von anderen Aufgaben, undnicht verfügbare aktive Perioden (220) von dem Datenprozessor (102), während welcher der Datenprozessor nicht verfügbar war, um dieselbe Aufgabe zu verarbeiten, aber andere Aufgaben verarbeitet hat, welche bei Erzeugen der Schätzung von benötigter Performance für die selbe Aufgabe ausgeschlossen waren. - Ein Verfahren zum Verarbeiten von Daten gemäß Anspruch 6, wobei der Datenprozessor (102) auf nicht verfügbare inaktive Perioden (220) für eine erste Aufgabe reagiert, um das Betriebssystems zu einer anderen Aufgabe zu schalten, falls es nicht mittels der inaktiven ersten Aufgabe blockiert wird, oder um in einen Leerlaufmodus zu treten, falls keine andere Aufgabe zum Verarbeiten bereit ist.
- Ein Verfahren zum Verarbeiten von Daten gemäß Anspruch 6 oder 7, wobei die Aufgaben Eingabe/Ausgabe Zugriffe enthalten (204, 206), und der Leistung und Performance Kontroller (110, 112, 118, 124) auf die Eingabe/ Ausgabe Zugriffe von einer Aufgabe reagiert, um entsprechende nicht verfügbare inaktive Perioden (220) bei Erzeugen der Schätzung für die Aufgabe auszuschließen.
- Ein Verfahren zum Verarbeiten von Daten gemäß einem der Ansprüche 6 bis 8, wobei der Leistung und Performance Kontroller (110, 112, 118, 124) auf einen abklingenden Durchschnitt von Auslastung für eine Aufgabe reagiert beim Erzeugen der Schätzung für diese Aufgabe.
- Ein Verfahren zum Verarbeiten von Daten gemäß einem der Ansprüche 6 bis 9, wobei der Leistung und Performance Kontroller (110, 112, 118, 124) eine Taktfrequenz und/oder eine Versorgungsspannung für den Datenprozessor (102) anpasst beim Anpassen des Performance und Leistung Verbrauches von dem Datenprozessor als Antwort auf die Schätzung.
- Ein Computerprogramm eingerichtet zum Ausführen eines Verfahrens zum Verarbeiten von Daten gemäß einem der Ansprüche 6 bis 10, wenn es in einem Datenverarbeitungsapparat installiert ist.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/IB2007/055333 WO2009083753A1 (en) | 2007-12-28 | 2007-12-28 | Data processor performance prediction |
Publications (2)
Publication Number | Publication Date |
---|---|
EP2227727A1 EP2227727A1 (de) | 2010-09-15 |
EP2227727B1 true EP2227727B1 (de) | 2016-08-24 |
Family
ID=39739581
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP07859537.8A Active EP2227727B1 (de) | 2007-12-28 | 2007-12-28 | Datenprozessor-leistungsfähigkeitsvorhersage |
Country Status (4)
Country | Link |
---|---|
US (1) | US8452999B2 (de) |
EP (1) | EP2227727B1 (de) |
JP (1) | JP5312478B2 (de) |
WO (1) | WO2009083753A1 (de) |
Families Citing this family (26)
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US9128703B1 (en) * | 2008-10-30 | 2015-09-08 | Amazon Technologies, Inc. | Processor that transitions to an idle mode when no task is scheduled to execute and further enters a quiescent doze mode or a wait mode depending on the value of a reference counter |
US8276015B2 (en) * | 2009-02-23 | 2012-09-25 | International Business Machines Corporation | Managing the power-performance range of an application |
US8631411B1 (en) | 2009-07-21 | 2014-01-14 | The Research Foundation For The State University Of New York | Energy aware processing load distribution system and method |
US8909950B1 (en) * | 2010-04-18 | 2014-12-09 | Aptima, Inc. | Systems and methods of power management |
US8776069B2 (en) * | 2010-12-07 | 2014-07-08 | International Business Machines Corporation | Energy and performance optimizing job scheduling |
TWI493332B (zh) | 2011-11-29 | 2015-07-21 | Intel Corp | 用於電力管理的方法與設備及其平台與電腦可讀取媒體 |
WO2013126144A2 (en) | 2012-02-20 | 2013-08-29 | Aptima, Inc. | Systems and methods for network pattern matching |
US8649765B1 (en) * | 2012-08-08 | 2014-02-11 | Telefonaktiebolaget L M Ericsson (Publ) | Communication apparatus using biometrics |
US9465620B2 (en) * | 2012-12-20 | 2016-10-11 | Intel Corporation | Scalable compute fabric |
EP2759907B1 (de) * | 2013-01-29 | 2024-05-22 | Malikie Innovations Limited | Verfahren zur Überwachung und Anpassung der Leistung einer mobilen Computervorrichtung |
US9285858B2 (en) * | 2013-01-29 | 2016-03-15 | Blackberry Limited | Methods for monitoring and adjusting performance of a mobile computing device |
US20140237272A1 (en) * | 2013-02-19 | 2014-08-21 | Advanced Micro Devices, Inc. | Power control for data processor |
US10409353B2 (en) * | 2013-04-17 | 2019-09-10 | Qualcomm Incorporated | Dynamic clock voltage scaling (DCVS) based on application performance in a system-on-a-chip (SOC), and related methods and processor-based systems |
JP6186862B2 (ja) * | 2013-05-07 | 2017-08-30 | 富士通株式会社 | 情報処理装置、省電力化制御方法および省電力化制御プログラム |
JP6175980B2 (ja) * | 2013-08-23 | 2017-08-09 | 富士通株式会社 | Cpuの制御方法、制御プログラム、情報処理装置 |
US9329663B2 (en) | 2013-09-09 | 2016-05-03 | Apple Inc. | Processor power and performance manager |
US9501128B2 (en) | 2013-10-30 | 2016-11-22 | Globalfoundries Inc. | Cooperative reduced power mode suspension for high input/output (‘I/O’) workloads |
FR3014215B1 (fr) * | 2013-12-03 | 2015-12-11 | Thales Sa | Procede de gestion des ressources de calcul d'applications logicielles |
CN103926995B (zh) * | 2014-04-16 | 2017-12-08 | 乐视致新电子科技(天津)有限公司 | 智能终端及增强其续航性能的方法、装置 |
KR102270239B1 (ko) * | 2014-08-07 | 2021-06-28 | 삼성전자 주식회사 | 전자장치에서 소프트웨어를 실행하기 위한 방법 및 장치 |
EP3126998A4 (de) * | 2015-02-26 | 2017-11-29 | Strato Scale Ltd. | Reihungsschemata für netzwerk- und speicher-e/a-anforderungen zur minimierung der arbeitslaststillzeit und interferenz zwischen arbeitslasten |
GB2545508B (en) * | 2015-12-18 | 2019-04-10 | Imagination Tech Ltd | Controlling operation of a GPU |
US10956220B2 (en) * | 2017-06-04 | 2021-03-23 | Apple Inc. | Scheduler for amp architecture using a closed loop performance and thermal controller |
US11347679B2 (en) * | 2018-02-08 | 2022-05-31 | Alibaba Group Holding Limited | Hybrid system-on-chip for power and performance prediction and control |
US11243598B2 (en) * | 2018-06-01 | 2022-02-08 | Apple Inc. | Proactive power management of a graphics processor |
US11714564B2 (en) | 2020-01-06 | 2023-08-01 | Arm Limited | Systems and methods of power management |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7058824B2 (en) * | 2001-06-15 | 2006-06-06 | Microsoft Corporation | Method and system for using idle threads to adaptively throttle a computer |
JP2003337713A (ja) * | 2002-05-21 | 2003-11-28 | Hitachi Ltd | プロセッサの制御方法 |
US20030233592A1 (en) * | 2002-06-14 | 2003-12-18 | Hung-Ming Lin | Power saving method using frame rate control in computer graphics systems |
US7194385B2 (en) | 2002-11-12 | 2007-03-20 | Arm Limited | Performance level setting of a data processing system |
US7321942B2 (en) * | 2002-11-12 | 2008-01-22 | Arm Limited | Performance counter for adding variable work increment value that is dependent upon clock frequency |
JP4025260B2 (ja) * | 2003-08-14 | 2007-12-19 | 株式会社東芝 | スケジューリング方法および情報処理システム |
US20080147357A1 (en) * | 2006-12-15 | 2008-06-19 | Iintrinisyc Software International | System and method of assessing performance of a processor |
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2007
- 2007-12-28 EP EP07859537.8A patent/EP2227727B1/de active Active
- 2007-12-28 WO PCT/IB2007/055333 patent/WO2009083753A1/en active Application Filing
- 2007-12-28 JP JP2010540179A patent/JP5312478B2/ja active Active
- 2007-12-28 US US12/810,172 patent/US8452999B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
EP2227727A1 (de) | 2010-09-15 |
JP5312478B2 (ja) | 2013-10-09 |
JP2011508328A (ja) | 2011-03-10 |
US20100287396A1 (en) | 2010-11-11 |
WO2009083753A1 (en) | 2009-07-09 |
US8452999B2 (en) | 2013-05-28 |
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