EP2195990A2 - Procédé et système pour transmettre et recevoir des signaux - Google Patents

Procédé et système pour transmettre et recevoir des signaux

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Publication number
EP2195990A2
EP2195990A2 EP09714114A EP09714114A EP2195990A2 EP 2195990 A2 EP2195990 A2 EP 2195990A2 EP 09714114 A EP09714114 A EP 09714114A EP 09714114 A EP09714114 A EP 09714114A EP 2195990 A2 EP2195990 A2 EP 2195990A2
Authority
EP
European Patent Office
Prior art keywords
ldpc
bits
blocks
demuxing
type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP09714114A
Other languages
German (de)
English (en)
Other versions
EP2195990A4 (fr
Inventor
Woo Suk Ko
Sang Chul Moon
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
LG Electronics Inc
Original Assignee
LG Electronics Inc
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Filing date
Publication date
Application filed by LG Electronics Inc filed Critical LG Electronics Inc
Publication of EP2195990A2 publication Critical patent/EP2195990A2/fr
Publication of EP2195990A4 publication Critical patent/EP2195990A4/fr
Withdrawn legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00Arrangements affording multiple use of the transmission path
    • H04L5/0001Arrangements for dividing the transmission path
    • H04L5/0003Two-dimensional division
    • H04L5/0005Time-frequency
    • H04L5/0007Time-frequency the frequencies being orthogonal, e.g. OFDM(A), DMT
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65Purpose and implementation aspects
    • H03M13/6522Intended application, e.g. transmission or communication standard
    • H03M13/655UWB OFDM
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0057Block codes
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0064Concatenated codes
    • H04L1/0065Serial concatenated codes
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0071Use of interleaving
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/26Systems using multi-frequency codes
    • H04L27/2601Multicarrier modulation systems
    • H04L27/2626Arrangements specific to the transmitter only
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/26Systems using multi-frequency codes
    • H04L27/2601Multicarrier modulation systems
    • H04L27/2647Arrangements specific to the receiver only
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/32Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
    • H04L27/34Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
    • H04L27/3405Modifications of the signal space to increase the efficiency of transmission, e.g. reduction of the bit error rate, bandwidth, or average power
    • H04L27/3416Modifications of the signal space to increase the efficiency of transmission, e.g. reduction of the bit error rate, bandwidth, or average power in which the information is carried by both the individual signal points and the subset to which the individual points belong, e.g. using coset coding, lattice coding, or related schemes

Definitions

  • the present invention relates to a method of efficiently transmitting and receiving signals and efficient transmitter and receiver for an OFDM (Orthogonal Frequency Division Multiplexing) system including a TFS (Time-Frequency Slicing).
  • OFDM Orthogonal Frequency Division Multiplexing
  • TFS Time-Frequency Slicing
  • TFS Time Frequency Slicing
  • RF Radio Frequency
  • OFDM Orthogonal Frequency Division Multiplexing
  • FDM frequency-division multiplexing
  • a large number of closely-spaced orthogonal sub-carriers are used to carry data.
  • the data are divided into several parallel data streams or channels, one for each sub-carrier.
  • Each sub-carrier is modulated with a conventional modulation scheme (such as quadrature amplitude modulation or phase shift keying) at a low symbol rate, maintaining total data rates similar to conventional single-carrier modulation schemes in the same bandwidth.
  • a conventional modulation scheme such as quadrature amplitude modulation or phase shift keying
  • OFDM has developed into a popular scheme for wideband digital communication, whether wireless or over copper wires, used in applications such as digital television and audio broadcasting, wireless networking and broadband internet access.
  • TFS which uses multiple RF bands for each transmitter
  • OFDM orthogonal frequency division multiplexing
  • an object of the present invention to provide a method of efficiently transmitting and receiving signals and efficient transmitter and receiver for an OFDM system including TFS.
  • One of the embodiments of the present invention provides a receiver for receiving signals comprising: a demodulator configured to demodulate received signals by Orthogonal Frequency Division Multiplexing (OFDM) method; a demapper configured to transform OFDM symbols in the demodulated signals into bitstreams; a bit deinterleaver configured to deinterleave bits between Low Density Parity Check (LDPC) blocks of the bitstreams, wherein the bit deinterleaving comprises writing the bits of at least one of the LDPC block to a memory in a row direction of the memory and reading the bits from the memory in a twisted fashion and in a column direction of the memory, wherein the read bits from each round of the reading in the twisted fashion correspond to a LDPC block of the bitstreams; and a decoder configured to correct errors in the deinterleaved bits of the bitstreams.
  • OFDM Orthogonal Frequency Division Multiplexing
  • demapper configured to transform OFDM symbols in the demodulated signals into bitstreams
  • Another embodiment of the present invention provides a method of receiving signals comprising: demodulating received signals by Orthogonal Frequency Division Multiplexing (OFDM) method; transforming OFDM symbols in the demodulated signals into bitstreams; deinterleaving bits between Low Density Parity Check (LDPC) blocks of the bitstreams, wherein the bit deinterleaving comprises writing the bits of at least one of the LDPC block to a memory in a row direction of the memory and reading the bits from the memory in a twisted fashion and in a column direction of the memory, wherein the read bits from each round of the reading in the twisted fashion correspond to a LDPC block of the bitstreams; and correcting errors in the deinterleaved bits of the bitstreams.
  • OFDM Orthogonal Frequency Division Multiplexing
  • LDPC Low Density Parity Check
  • Yet another embodiment of the present invention provides a method of transmitting signals comprising: error-correction-coding a transport stream for delivering a service; bitinterleaving bits between Low Density Parity Check (LDPC) blocks of the coded transport stream, wherein the bit interleaving comprises writing the bits of at least one of the LDPC block to a memory in a twisted fashion and in a column direction of the memory and reading the bits from the memory in a row direction of the memory; mapping the bitinterleaved bits into symbols; building a signal frame of the symbols; and modulating the signal frame by an Orthogonal Frequency Division Multiplexing (OFDM) method and transmitting the modulated signal.
  • OFDM Orthogonal Frequency Division Multiplexing
  • Fig. 1 is a block diagram of an example of a TFS (Time Frequency Slicing)-OFDM (Orthogonal Frequency Division Multiplexing) transmitter.
  • TFS Time Frequency Slicing
  • OFDM Orthogonal Frequency Division Multiplexing
  • Fig. 2 is a block diagram of an example of the input processor shown in the Fig. 1.
  • Fig. 3 is a block diagram of an example of the BICM (Bit-Interleaved Coding and Modulation) shown in Fig. 1.
  • BICM Bit-Interleaved Coding and Modulation
  • Fig. 4 is a block diagram of an example of the Frame Builder shown in Fig. 1.
  • Fig. 5 is a block diagram of an example of the MIMO/MISO decoder shown in Fig. 1.
  • Fig. 6 is a block diagram of an example of the modulator, specifically an example of an OFDM modulator.
  • Fig. 7 is a block diagram of an example of the analog processor shown in Fig. 1.
  • Fig. 8 is a block diagram of an example of a TFS-OFDM receiver.
  • Fig. 9 is a block diagram of an example of the AFE (Analog Front End) shown in Fig. 8.
  • Fig. 10 is a block diagram of an example of the demodulator, specifically an OFDM demodulator.
  • Fig. 11 is a block diagram of an example of the MIMO/MISO decoder shown in Fig. 8.
  • Fig. 12 is a block diagram of an example of the frame parser shown in Fig. 8.
  • Fig. 13 is a block diagram of an example of the BICM decoder shown in Fig. 8.
  • Fig. 14 is a block diagram of an example of the output processor shown in Fig. 8.
  • Fig. 15 shows equations used for LDPC decoder in prior arts.
  • Fig. 16 shows that a range of output of atanh is from negative infinity to positive infinity.
  • Fig. 17 shows a comparison between using a conventional LDPC decoder and a LDPC decoder of present invention regarding number of error bits as a number of iterations increases when Sum-Product algorithm is used.
  • Fig. 18 shows a size of bit-interleaver.
  • Fig. 19 shows how inter LDPC block interleaving can increase a diversity gain.
  • Fig. 20 shows an example of Inter-Block Bit Interleaving (IB-BI).
  • Fig. 21 shows a result of a simulation.
  • Fig. 22 shows the result of the simulation on BER graph.
  • Figs. 23 and 24 show an example of varying BI_SIZE.
  • Fig. 25 shows a simulation result at different coderates.
  • Fig. 26 shows the simulation result on BER graph.
  • Fig. 27 shows the simulation result on BER graph with RQD.
  • Fig. 28 shows an example of configurable diversity gain when IB-BI is applied to 16QAM, BBC+SONY.
  • Fig. 29 shows an example of IB-BI applied to a variable bitrate (VBR) PLP.
  • VBR variable bitrate
  • Fig. 30 shows a diagram assigning IB-BI blocks for various size of PLP.
  • Fig. 31 shows examples of IB-BI assignments using the above rules for varying number of LDPC blocks and different sizes of PLP.
  • Fig. 32 shows a maximum BI size which can be transmitted by a transmitter.
  • Fig. 33 shows a performance comparison between BBC+Sony and BBC + CTW (Column Twisting).
  • Fig. 34 shows another result of the simulations.
  • Fig. 35 shows performance comparison between BBC and LG-hat demux regarding Additive White Gaussian Noise (AWGN).
  • AWGN Additive White Gaussian Noise
  • Fig. 36 shows performance comparison between BBC and LG-hat demux.
  • Fig. 37 shows a diagram of interaction between various interleavers.
  • Fig. 1 shows an example of proposed TFS (Time Frequency Slicing)-OFDM (Orthogonal Frequency Division Multiplexing) transmitter.
  • a multiple MPEG2-TS (Transport Stream) and a multiple Generic stream can be inputted into a TFS transmitter.
  • the input processor (101) can split the inputted streams into a multiple output signals for a multiple PLP (Physical Layer Path).
  • the BICM (Bit-Interleaved Coding and Modulation) (102) can encode and interleave the PLP individually.
  • the frame builder (103) can transform the PLP into total R of RF bands.
  • MIMO (Multiple-Input Multiple-Output)/MISO (Multiple-Input Single-Output) (104) technique can be applied for each RF band.
  • Each RF band for each antenna can be individually modulated by the modulator (105a, b) and can be transmitted to antennas after being converted to an analog signal by the analog processor (106a, b).
  • Fig. 8 shows an example of a TFS-OFDM receiver.
  • AFE Analog Front End
  • demodulators 802a,b
  • MIMO/MISO Decoder 803
  • Frame parser 804
  • BICM decoder 805
  • output processor 806
  • Fig. 2 is an example of the input processor.
  • MPEG-TS Transport Stream
  • Generic streams Internet protocol
  • GSE General Stream Encapsulation
  • Each output from the TS-MUX and GSE can be split for multiple services by the service splitter (202a, b).
  • PLP is a processing of each service.
  • Each PLP can be transformed into a frame by the BB (Baseband) Frame (103a ⁇ d).
  • Fig. 3 is an example of the BICM.
  • the Outer encoder (301) and the inner encoder (303) can add redundancy for error correction in a transmission channel.
  • the outer interleaver (302) and the inner interleaver (304) can interleave data randomly to mitigate burst errors.
  • Fig. 4 is an example of the frame builder.
  • QAM mapper (401a, b) can transform inputted bits into QAM symbols.
  • Hybrid QAM can be used.
  • Time domain interleaver (402a, b) can interleave data in time domain to make the data be robust against burst error. At this point, an effect of interleaving many RF bands can be obtained in a physical channel because the data are going to be transmitted to a multiple RF bands.
  • TFS frame builder (403) can split inputted data to form TFS frames and send the TFS frames to total R of RF bands according to a TFS scheduling.
  • Each RF band can be individually interleaved in frequency domain by frequency domain interleaver (404a, b) and can become robust against frequency selective fading.
  • Ref Reference Signals
  • PL Physical Layer
  • pilots can be inserted when the TFS frame is built (405).
  • an Odd-QAM which transmits odd number of bits per QAM symbol
  • hybrid 128-QAM can be obtained by hybriding 256-QAM and 64-QAM
  • hybrid 32-QAM can be obtained by hybriding 64-QAM and 16-QAM
  • hybrid 8-QAM can be obtained by hybriding 16-QAM and 4-QAM.
  • Fig. 5 shows an example of MIMO/MISO Encoder.
  • MIMO/MISO Encoder (501) applies MIMO/MISO method to obtain an additional diversity gain or payload gain.
  • MIMO/MISO Encoder can output signals for total A of antennas.
  • MIMO encoding can be performed individually on total A of antenna signals for each RF band among total R of RF bands.
  • A is equal to or greater than 1.
  • Fig. 6 shows an example of a modulator, specifically an example of an OFDM modulator.
  • PAPR Peak-to-Average Power Ratio
  • IFFT 602
  • PAPR reduction 2 603
  • ACE Active Constellation Extension
  • a tone reservation can be used for the PAPR reduction 2 (603).
  • guard interval 604 can be inserted.
  • Fig. 7 shows an example of the analog processor.
  • Output of each modulator can be converted to an analog-domain signal by a DAC (Digital to Analog Conversion) (701), then can be transmitted to antenna after up-conversion (702).
  • Analog filtering (703) can be performed.
  • Fig. 8 shows an example of a TFS-OFDM receiver.
  • AFE Analog Front End
  • demodulators 802a,b
  • MIMO/MISO Decoder 803
  • Frame parser 804
  • BICM decoder 805
  • output processor 806
  • Fig. 9 shows an example of an AFE (Analog Front End).
  • FH (Frequency Hopping)-tuner (901) can perform a frequency hopping and tune signals according to inputted RF center frequency. After down-conversion (902), signals can be converted to digital signals by ADC (Analog to Digital Conversion) (903).
  • AFE Analog Front End
  • Fig. 10 shows an example of a demodulator, specifically an OFDM demodulator.
  • TFS detector 1001 can detect TFS signals in a received digital signal.
  • TFS sync (1002) can synchronize in time and frequency domains.
  • GI Guard Interval
  • symbols in frequency domain can be obtained by performing FFT (1004) for OFDM demodulation.
  • Channel Estimation (1005) can estimate distortion in a transmission channel based on pilot signals.
  • Channel Equalization (1006) can compensate distortion in the transmission channel.
  • PL Physical Layer
  • Fig. 11 shows an example of MIMIO/MISO decoder. Diversity and multiplexing gain can be obtained from data received from total B of antennas. For MIMO, B is greater than 1. For MISO, B is 1.
  • Fig. 12 shows an example of a Frame parser.
  • Total R of the inputted RF bands data can undergo frequency deinterleaving (1201a, b), then can be reconstructed into datastream by TFS frame parser for each PLP (Physical Layer Path) according to a TFS scheduling.
  • PLP Physical Layer Path
  • input data for BICM decoder can be obtained by using time domain deinterleaver (1203a, b) and QAM demapper (1204a, b).
  • hybrid QAM demapper can be used as the QAM demapper.
  • Fig. 13 shows an example of a BICM decoder.
  • Inner deinterleaver (1301) and outer deinterleaver (1303) can convert burst errors in a transmission channel into random errors.
  • Inner decoder (1302) and outer decoder (1304) can correct errors in the transmission channel.
  • Fig. 14 shows an example of an output processor.
  • BB Baseband frame parser (1401a ⁇ d) can reconstruct input data into total P of PLP data.
  • Service mergers 1402a, b) can merge data into a single TS (Transport Stream) and a single GSE stream.
  • TS-demux 1403a
  • GSE Decapsulation 1403b
  • Fig. 15 shows equations used for LDPC decoder in prior arts.
  • atanh is required and atanh is defined with input range of from -1 to 1.
  • the output of atanh is from negative infinity to positive infinity as shown in Fig. 16.
  • the present embodiment of invention suggests modifying the output of the atanh to be limited within certain value, currently '3.75'. Consequently, the check node value is limited as '7.5' according to the second equation shown in Fig. 15.
  • This limitation of atanh value can be chosen among numbers between 3 and 6. Accordingly, the number chosen will be corresponding to numbers between 6 and 12 for maximum available check node value.
  • error oscillation phenomenon in LDPC decoder can be prevented as shown in Fig.
  • FIG. 17 shows a comparison between using a conventional LDPC decoder and using a LDPC decoder of present invention regarding number of error bits as a number of iterations increases when Sum-Product algorithm is used.
  • Fig. 17 shows that an error oscillation, which can occur at LDPC decoder can be minimized by modifying the output of the atanh.
  • Fig. 3 shows an example of the BICM.
  • Error floor caused during LDPC can be prevented by using BICM with BCH decoding.
  • a BCH encoder and LDPC encoder can be used for Outer code and Inner code shown in Fig. 3, respectively.
  • Due to nature of LDPC i.e., an effect of interleaving is innately exhibited by LDPC encoder, a combination of BCH encoder(301), LDPC encoder(303), Inner Intrlv(304) without Outer Intrlv(302) can be implemented.
  • the Inner Intrlv(304) also can be replaced with Symbol interleaver, Time interleaver, Frequency interleaver.
  • a combination which corresponds to combination used in a transmitter can be implemented.
  • Fig. 13 shows an example of BICM decoding of a receiver, a counterpart of the BICM shown in Fig. 3.
  • LDPC decoder and BCH decoder can be used for Inner decode(1302) and Outer Decode(1304) shown in Fig. 13.
  • Inner/Outer Deintrlv(1301, 1030) may or may not be used depending on a method of transmission.
  • Aforementioned method of preventing error oscillation by limiting value of check node of LDPC decoder can be applied to LDPC decoder of BICM demodulation.
  • interleavers there can be various types of interleavers in DVB-T2 System.
  • the scope of interleavers is to transform correlated real channels into statistically independent channels.
  • a bit-interleaver is to spread bits within one LDPC block
  • cell/time/frequency interleavers are to spread cells between several LDPC blocks or RF channels.
  • symbol mapping is performed only within a LDPC block
  • correlated channel fading over bits in one LDPC block can still exist.
  • burst type of fading can remain at the input of bit deinterleaver.
  • An inter-LDPC block interleaver can spread this type of burst fading into several LDPC blocks.
  • additional interleaving gain can be achieved.
  • symbol mapping is performed across the LDPC blocks and each cell can contain bits from different LDPC blocks.
  • Fig. 18 shows a size of bit interleaver or number of LDPC blocks.
  • the example in the figure shows a BI_SIZE of three bits, which is a configurable parameter.
  • the maximum value of the BI_SIZE is limited by QAM size. For example, for 256-QAM, maximum additional memory will be 8 x 64,800 bits.
  • Fig. 19 shows how inter LDPC block interleaving can increase a diversity gain.
  • Fig. 20 shows an example of Inter-Block Bit Interleaving (IB-BI). Specifically, it shows the IB-BI applied to 16-QAM, BBC+SONY DEMUX. Total of m LDPC blocks can be used to do bit-interleaving for 2m-QAM.
  • the IB-BI can consist of maximum (2m) columns x (length of LDPC/2) rows memory. With column rotation, one symbol can get bits from different LDPC blocks. DEMUX structure of each LDPC block needs not to be changed. Therefore, it can be understood that the IB-BI can be used at least in 16-QAM, BBC+SONY DEMUX.
  • Fig. 21 shows a result of a simulation.
  • the result shows that proposed IB-BI improves SNR performance gain by 2.7 dB. This diversity gain is expected to give performance gain with all erasure ratio / code rate.
  • the IB-BI can introduce an additional diversity gain to T2 system. Especially, significant performance gain can be obtained with Rayleigh + Erasure channel such as SFN or mobile scenario. IB-BI can give significant gain whenever multiple LDPC blocks fill a time interleaver. For example, IB-BI can be applied to cases such as a low rate service with extended time interleaving, a high rate service with multiple time interleaving frames per TFS frame, and a moderate rate service with time interleaving depth of multiple LDPC blocks.
  • Fig. 22 shows the result of the simulation on BER graph.
  • Fig. 25 shows a simulation result at different coderates.
  • the result showed that proposed IB-BI gives up to 2.8 dB SNR performance gain.
  • Fig. 26 shows the simulation result on BER graph.
  • Fig. 27 shows the simulation result on BER graph with RQD.
  • Fig. 28 shows an example of configurable diversity gain when IB-BI is applied to 16QAM, BBC+SONY. As shown, by varying the number of LDPC blocks to be interleaved, trade off between memory usage and diversity gain can be performed.
  • Fig. 29 shows an example of IB-BI applied to a variable bitrate (VBR) PLP.
  • VBR PLP variable bitrate
  • PLP size can change and it is possible to get partial inter-block interleaving effect with VBR PLP.
  • Fig. 30 shows a diagram assigning IB-BI blocks for various size of PLP.
  • the rules can be mathematically expressed as follows. If a total number of LDPC block for one PLP is N and a maximum IB-BI size is m, where m cannot be bigger than k, with 2k-QAM, first, a total number of IB-BI block, NIBBI can be determined as ⁇ N/m>, where ⁇ n> is the smallest integer number which is not smaller than n. Second, the biggest size of IB-BI, S can be determined as ⁇ N/NIBBI>. Third, the number of the biggest size of IB-BI, NS can be determined as [N/S], where [n] is the biggest integer number which is not bigger than n.
  • Fig. 31 shows examples of IB-BI assignments using the above rules for varying number of LDPC blocks and different sizes of PLP.
  • Fig. 32 shows a maximum BI size which can be transmitted by a transmitter.
  • the maximum BI size can be inserted into layer-1 (L1) signaling information region of a second pilot signal of a signal frame of the transport stream.
  • L1 layer-1
  • sizes of 64,800 and 16,200 LDPC blocks can be used.
  • receiver can get information about the assignments of IB-BI block from MAX_BI_SIZE and the number of LDPC blocks for one PLP.
  • Fig. 33 shows a performance comparison between BBC+Sony and BBC + CTW (Column Twisting).
  • Bit interleavers were BBC + column twisting with/without parity interleaver and BBC and LG-hat bit demux with Sony bit interleaver.
  • Fig. 34 shows another result of the simulations.
  • Fig. 35 shows performance comparison between BBC and LG-hat demux regarding Additive White Gaussian Noise (AWGN).
  • AWGN Additive White Gaussian Noise
  • Fig. 36 shows performance comparison between BBC and LG-hat demux regarding Rayleigh & Erasure.
  • BBC demux shows clear benefits for Rayleigh & erasure channel.
  • LG-hat demux shows up to 0.3 dB SNR gain compared to BBC demux.
  • Fig. 37 shows a diagram of interaction between various interleavers. An effect of having two kinds of bit interleavers was investigated. Switching between two interleavers may require negligible additional complexity. Regarding interaction, BBC and LG-hat demux differ in number of columns, which may cause unexpected effect. LG-hat demux can be easily modified to have the structure same as BBC demux, which not only can maintain the reliability control of demux but also can keep the interaction between interleavers.
  • Two demuxs can be a solution because, first, negligible additional hardware complexity is required compared to a single demux use, second a same demux structure as baseline is obtainable with slight modification of LG-hat demux. Consequently, for best performance, using two kinds of demuxs optimized for each coderate set is suggested.
  • Figs. 38 ⁇ 51 show examples of LG bit demuxs for coderate of 3/5.
  • RAI proposed using new bit demux for coderate of 3/5, which maintains the use of S2 LDPC code.
  • LG-bowl demux showed good performance among various demuxs at first round of simulation. However, the number of columns is not same as that of BBC demux. It is shown that existing demux could be easily modified to have an identical structure as BBC demux. In addition, modified demux is expected not to cause unknown interaction problem while keeping its original reliability control properties.
  • the proposed LG bit demux for coderate 3/5 can be made by modifying existing LG-bowl demux to have competitive performance compared to other proposals for coderate 3/5.
  • BER performance of coderate 3/5 showed that using parity interleaver loses SNR gain of 0.13 dB when BBC demux is used.

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  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Theoretical Computer Science (AREA)
  • Error Detection And Correction (AREA)

Abstract

La présente invention concerne des procédés permettant de transmettre efficacement des signaux, un récepteur efficace ainsi que des procédés permettant de recevoir efficacement les signaux. Plus particulièrement, cette invention concerne la réception de signaux et le désentrelaçement des chiffres binaires entre des blocs de contrôle de parité à faible densité de trains binaires des signaux reçus de manière torsadée. De plus, la présente invention concerne des procédés permettant de transmettre efficacement des signaux, lesquels procédés sont des équivalents des procédés de réception.
EP09714114.7A 2008-02-28 2009-03-02 Procédé et système pour transmettre et recevoir des signaux Withdrawn EP2195990A4 (fr)

Applications Claiming Priority (7)

Application Number Priority Date Filing Date Title
US3207508P 2008-02-28 2008-02-28
US3300308P 2008-03-02 2008-03-02
US3536108P 2008-03-10 2008-03-10
US3572208P 2008-03-11 2008-03-11
US3691708P 2008-03-14 2008-03-14
US4339208P 2008-04-08 2008-04-08
PCT/KR2009/001000 WO2009108027A2 (fr) 2008-02-28 2009-03-02 Procédé et système pour transmettre et recevoir des signaux

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EP2195990A2 true EP2195990A2 (fr) 2010-06-16
EP2195990A4 EP2195990A4 (fr) 2014-02-19

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WO (1) WO2009108027A2 (fr)

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Publication number Priority date Publication date Assignee Title
JP2011097245A (ja) * 2009-10-28 2011-05-12 Sony Corp 受信装置、受信方法、プログラム、および受信システム
CN101808068B (zh) * 2009-10-29 2013-04-10 清华大学 联合ldpc码msk迭代解调方法及系统

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EP1737133A1 (fr) * 2005-06-21 2006-12-27 Samsung Electronics Co., Ltd. Appareil et méthode pour la transmission/réception de donnés dans un système de communication à plusieurs antennes par l'utilisation de codes LDPC
WO2009072813A2 (fr) * 2007-12-04 2009-06-11 Lg Electronics Inc. Procédé et système d'émission et de réception de signaux

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US7322005B2 (en) * 2003-06-13 2008-01-22 Broadcom Corporation LDPC (Low Density Parity Check) coded modulation symbol decoding using non-Gray code maps for improved performance
KR100659266B1 (ko) * 2004-04-22 2006-12-20 삼성전자주식회사 다양한 코드율을 지원하는 저밀도 패러티 검사 코드에 의한데이터 송수신 시스템, 장치 및 방법
US7434138B2 (en) * 2005-06-27 2008-10-07 Agere Systems Inc. Structured interleaving/de-interleaving scheme for product code encoders/decorders

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Publication number Priority date Publication date Assignee Title
EP1737133A1 (fr) * 2005-06-21 2006-12-27 Samsung Electronics Co., Ltd. Appareil et méthode pour la transmission/réception de donnés dans un système de communication à plusieurs antennes par l'utilisation de codes LDPC
WO2009072813A2 (fr) * 2007-12-04 2009-06-11 Lg Electronics Inc. Procédé et système d'émission et de réception de signaux

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See also references of WO2009108027A2 *

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WO2009108027A2 (fr) 2009-09-03
EP2195990A4 (fr) 2014-02-19
WO2009108027A3 (fr) 2009-10-22

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