EP1956707A1 - Appareil et procédé d'interpolation d'un signal - Google Patents

Appareil et procédé d'interpolation d'un signal Download PDF

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Publication number
EP1956707A1
EP1956707A1 EP07250534A EP07250534A EP1956707A1 EP 1956707 A1 EP1956707 A1 EP 1956707A1 EP 07250534 A EP07250534 A EP 07250534A EP 07250534 A EP07250534 A EP 07250534A EP 1956707 A1 EP1956707 A1 EP 1956707A1
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EP
European Patent Office
Prior art keywords
multiplier
original data
interpolation apparatus
signal interpolation
output
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Application number
EP07250534A
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German (de)
English (en)
Inventor
Chih-Chihuan Liang
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ITE Tech Inc
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Afa Technologies Inc
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Publication date
Application filed by Afa Technologies Inc filed Critical Afa Technologies Inc
Priority to EP07250534A priority Critical patent/EP1956707A1/fr
Publication of EP1956707A1 publication Critical patent/EP1956707A1/fr
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H17/00—Networks using digital techniques
    • H03H17/0009—Time-delay networks
    • H03H17/0018—Realizing a fractional delay
    • H03H17/0027—Realizing a fractional delay by means of a non-recursive filter

Definitions

  • the present invention relates to a signal interpolation apparatus. More particularly, the present invention relates to a signal interpolation apparatus and method for simplifying a high order LaGrange interpolator by exploiting symmetry and linear properties.
  • FIG. 1 represents an analog waveform.
  • FIGs. 2 and 3 merely show the sampling results in the sampling periods T 1 and T 2 , respectively.
  • a quadratic interpolator with a fractional delay controller is used.
  • An interpolator 500 generates new data b k+1 by using original data a k-1 , a k , a k+1 and the fractional delay values provided by the delay controller, as shown in FIG. 5 .
  • the data in FIG. 6 is connected in series after the masked dots are removed, as shown in FIG. 7 .
  • the waveform in FIG. 7 is the same as that in FIG. 3 . Therefore, if the interpolator is an ideal one, the sampling data of the square dots may be recreated by using the sampling data of the circular dots in FIG. 1 . As a result, the accuracy of the interpolator determines the quality of the performance of sampling rate conversion.
  • LaGrange interpolator is a member of a simple and highly accurate finite input response (FIR) fractional delay filter, and is one of the most attractive interpolator implementations since it requires a fewer number of multiplications and additions for updating a coefficient than other methods, wherein the coefficient is obtained from Equation (1):
  • N the order of the filter
  • D the fractional delay
  • the present invention is directed to provide a signal interpolation apparatus and method, wherein the symmetry property is similar to the linear property, thereby greatly reducing the hardware complexity of the high order LaGrange interpolation apparatus.
  • the signal interpolation apparatus comprises a delay line, a coefficient generator, a symmetric combiner, and a T combiner.
  • the delay line receives original data x(n) and outputs original data x(n), x(n-1), ..., x(n-N), wherein x(n) represents the n th original data, and N represents the order of the interpolation calculation.
  • the T combiner calculates w 1 (D) ⁇ w 2 (D) ⁇ w 3 (D) ⁇ SC_out+x(n-a) ⁇ -w 3 (D) ⁇ x(n-a-1) ⁇ and outputs new data y(n).
  • the present invention provides a signal interpolation method, for performing the interpolation calculation on the original data x(n), x(n-1), ..., x(n-N) according to the fractional delay value D, so as to obtain the new data y(n), wherein N represents the order of the interpolation calculation.
  • the signal interpolation calculation comprises the following steps.
  • ⁇ m 0 a - 1 - 1 m + 1 ⁇ S m ⁇ D ⁇ x ⁇ n - m - S ⁇ N - m D ⁇ x ⁇ n - N - m is calculated to claim the calculation result SC_out.
  • w 1 (D) ⁇ w 2 (D). ⁇ w 3 (D).SC_out+x(n-a) ⁇ -w 3 (D) ⁇ x(n-a-1) ⁇ is calculated to obtain the new data y(n).
  • the symmetry property is similar to the linear property, thereby greatly reducing the hardware complexity of the high order LaGrange interpolation apparatus.
  • FIG 1 is a waveform graph of generally sampling an analog waveform through different sampling periods.
  • FIGs. 2 and 3 merely show the sampling results in the sampling periods T 1 and T 2 , respectively.
  • FIG 5 shows that a common interpolator generates the new data b k+1 by using the original data a k-1 , a k ,a k+1 and the fractional delay values provided by the delay controller.
  • FIG. 6 shows that the interpolator masks its output (i.e., output 0) when finding that the fractional delay values are larger than 1.
  • FIG 7 shows the waveform formed after the data in FIG. 6 is connected in series with the masked points being removed.
  • FIG 10 is a block diagram of the high order LaGrange interpolation apparatus according to an embodiment of the present invention.
  • FIG. 11 is a block diagram of the high order LaGrange interpolation apparatus according to another embodiment of the present invention.
  • FIG. 12 shows an exemplary embodiment of the symmetric combiner in FIG. 11 according to the present invention.
  • FIG 13 shows an exemplary embodiment of the coefficient generator in FIG. 11 according to the present invention.
  • FIG 14 is a re-drawn view of FIG. 11 .
  • Equation (1) can be rewritten into Equation (5)
  • linear approximation may be simply used as a divider.
  • Sr m (D) ⁇ S m (D) -r m ⁇ D+g m , wherein r m , g m are constants, which is called linear property.
  • FIG 10 is a block diagram of the high order LaGrange interpolation apparatus according to an embodiment of the present invention.
  • the interpolation apparatus performs an interpolation calculation on the original data x(n), so as to obtain the new data y(n).
  • the interpolation apparatus includes a delay line 1010, a combiner 1020, and a coefficient generator 1030.
  • the delay line 1010 includes a plurality of delayers DL to provide the original data x(n), x(n-1), ..., x(n-N) required by the interpolation calculation.
  • the coefficient generator 1030 calculates coefficients h(0,D), h(1,D), ..., h(N,D) according to the fractional delay D, and provides the coefficients to the combiner 1020.
  • the combiner 1020 combines the original data x(n), x(n-1), ..., x(n-N) and the coefficients h(0,D), h(1,D), ..., h(N,D), so as to output the new data y(n).
  • the new data y(n) in FIG. 10 is represented as:
  • Equation (8) h(m, D) in Equation (8) is replaced by Equation (7), and the following equation is obtained:
  • FIG. 10 is a block diagram of the high order LaGrange interpolation apparatus according to another embodiment of the present invention.
  • the interpolation apparatus includes a delay line 1110, a symmetric combiner 1121, a T combiner 1122, and a coefficient generator 1130.
  • FIG 12 shows an exemplary embodiment of the symmetric combiner 1121 in FIG. 11 according to the present invention.
  • S 0 (D) ⁇ x(n) is subtracted from S ⁇ N (D) ⁇ x(n - N)
  • S ⁇ 1 (D) ⁇ x(n -1) is subtracted from S ⁇ N-1 (D) ⁇ x(n - (N -1))
  • the rest may be deduced by analogy.
  • FIG. 13 shows an exemplary embodiment of the coefficient generator 1130 in FIG. 11 according to the present invention.
  • the coefficient generator 1130 is used to generate coefficients S ⁇ m (D), w 1 (D) , w 2 (D) , and w 3 (D), and provides the coefficients for both the symmetric combiner 1121 and the T combiner 1122.
  • a is an ideal value N + 1 2 - 1
  • r m,1 and G m,1 are constants, in this embodiment, r m,1 and G m,1 must be calculated in advance and stored in the constant table 1131. According to the fractional delay D, the desired r ⁇ m,1 and G ⁇ m,1 are obtained from the constant table 1131 by table lookup, and then provided to the coefficient generator 1130 to calculate S ⁇ m (D) .
  • FIG. 14 is a re-drawn view of FIG. 11 .
  • the coefficient multiplier 1130 needs 4 ⁇ a - 1 + 1 ⁇
  • Table 1 Comparative table about the hardware complexities of the LaGrange interpolators in the embodiments of the present invention and the prior arts.

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EP07250534A 2007-02-09 2007-02-09 Appareil et procédé d'interpolation d'un signal Withdrawn EP1956707A1 (fr)

Priority Applications (1)

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EP07250534A EP1956707A1 (fr) 2007-02-09 2007-02-09 Appareil et procédé d'interpolation d'un signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP07250534A EP1956707A1 (fr) 2007-02-09 2007-02-09 Appareil et procédé d'interpolation d'un signal

Publications (1)

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EP1956707A1 true EP1956707A1 (fr) 2008-08-13

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2017530784A (ja) * 2014-10-06 2017-10-19 アナログ ディヴァイスィズ インク 超音波ビームフォーミングのためのシステムおよび方法
CN107769781A (zh) * 2017-11-01 2018-03-06 兰州大学 一种保证时域逐点最大重构误差的模拟信号采样与重构的方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5812608A (en) 1995-05-05 1998-09-22 Nokia Technology Gmbh Method and circuit arrangement for processing received signal
WO1999060701A1 (fr) * 1998-05-18 1999-11-25 Technische Universiteit Delft Procede et dispositif de filtrage d'un signal numerique avec un retard fractionne
US6766338B1 (en) 1999-12-22 2004-07-20 Texas Instruments Incorporated High order lagrange sample rate conversion using tables for improved efficiency

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5812608A (en) 1995-05-05 1998-09-22 Nokia Technology Gmbh Method and circuit arrangement for processing received signal
WO1999060701A1 (fr) * 1998-05-18 1999-11-25 Technische Universiteit Delft Procede et dispositif de filtrage d'un signal numerique avec un retard fractionne
US6766338B1 (en) 1999-12-22 2004-07-20 Texas Instruments Incorporated High order lagrange sample rate conversion using tables for improved efficiency

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2017530784A (ja) * 2014-10-06 2017-10-19 アナログ ディヴァイスィズ インク 超音波ビームフォーミングのためのシステムおよび方法
US10613205B2 (en) 2014-10-06 2020-04-07 Analog Devices, Inc. Systems and methods for ultrasound beamforming
CN107769781A (zh) * 2017-11-01 2018-03-06 兰州大学 一种保证时域逐点最大重构误差的模拟信号采样与重构的方法
CN107769781B (zh) * 2017-11-01 2020-11-03 兰州大学 一种保证时域逐点最大重构误差的模拟信号采样与重构的方法

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