EP1887556A3 - Method and device for monitoring the phase setting in flat screens - Google Patents

Method and device for monitoring the phase setting in flat screens Download PDF

Info

Publication number
EP1887556A3
EP1887556A3 EP07121516A EP07121516A EP1887556A3 EP 1887556 A3 EP1887556 A3 EP 1887556A3 EP 07121516 A EP07121516 A EP 07121516A EP 07121516 A EP07121516 A EP 07121516A EP 1887556 A3 EP1887556 A3 EP 1887556A3
Authority
EP
European Patent Office
Prior art keywords
monitoring
phase
flag
graphics card
phase setting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
EP07121516A
Other languages
German (de)
French (fr)
Other versions
EP1887556A2 (en
Inventor
Paul-Friedrich Von Hase
Albertus Soemantri
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Technology Solutions Intellectual Property GmbH
Original Assignee
Fujitsu Technology Solutions GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=7902628&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=EP1887556(A3) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Fujitsu Technology Solutions GmbH filed Critical Fujitsu Technology Solutions GmbH
Priority to DE20023973U priority Critical patent/DE20023973U1/en
Publication of EP1887556A2 publication Critical patent/EP1887556A2/en
Publication of EP1887556A3 publication Critical patent/EP1887556A3/en
Ceased legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/003—Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • G09G5/006—Details of the interface to the display terminal
    • G09G5/008—Clock recovery
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/08—Arrangements within a display terminal for setting, manually or automatically, display parameters of the display terminal

Abstract

Die Erfindung betrifft ein Verfahren und eine Einrichtung zur Überwachung der Einstellung der Phase zwischen dem Pixeltakt einer Grafikkarte und dem Abtasttakt eines Flachbildschirmes mit einer analogen Schnittstelle in einem Flachbildschirm-Grafikkarte-Rechner-System. Dabei wird ein Merker gesetzt, wenn die Phase des Flachbildschirmes benutzerseitig eingestellt wurde. Der Merker wird beim Einschalten des Flachbildschirmes oder beim Umschalten des Videomodus am Rechner und/oder dem Austausch der Grafikkarte und/oder beim Austausch des Rechners abgefragt und es wird eine Anzeige gegeben oder eine Einstellung der Phase eingeleitet, wenn bei der Abfrage festgestellt wird, daß der Merker nicht gesetzt ist.

Figure imgaf001
The invention relates to a method and a device for monitoring the adjustment of the phase between the pixel clock of a graphics card and the sampling clock of a flat screen with an analog interface in a flat-panel graphics card computer system. In this case, a flag is set when the phase of the flat screen has been set by the user. The flag is queried when switching on the flat screen or when switching the video mode on the computer and / or the replacement of the graphics card and / or the exchange of the computer and it is given an indication or initiated an adjustment of the phase when the query is found that the flag is not set.
Figure imgaf001
EP07121516A 1999-03-26 2000-03-17 Method and device for monitoring the phase setting in flat screens Ceased EP1887556A3 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
DE20023973U DE20023973U1 (en) 1999-03-26 2000-03-17 flat

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE1999113915 DE19913915C1 (en) 1999-03-26 1999-03-26 Method and device for monitoring the phase setting in flat screens
EP00929228A EP1171867A1 (en) 1999-03-26 2000-03-17 Method and device for monitoring the adjustment of the phase pertaining to flat screens

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
EP00929228A Division EP1171867A1 (en) 1999-03-26 2000-03-17 Method and device for monitoring the adjustment of the phase pertaining to flat screens

Publications (2)

Publication Number Publication Date
EP1887556A2 EP1887556A2 (en) 2008-02-13
EP1887556A3 true EP1887556A3 (en) 2009-07-01

Family

ID=7902628

Family Applications (2)

Application Number Title Priority Date Filing Date
EP00929228A Withdrawn EP1171867A1 (en) 1999-03-26 2000-03-17 Method and device for monitoring the adjustment of the phase pertaining to flat screens
EP07121516A Ceased EP1887556A3 (en) 1999-03-26 2000-03-17 Method and device for monitoring the phase setting in flat screens

Family Applications Before (1)

Application Number Title Priority Date Filing Date
EP00929228A Withdrawn EP1171867A1 (en) 1999-03-26 2000-03-17 Method and device for monitoring the adjustment of the phase pertaining to flat screens

Country Status (6)

Country Link
EP (2) EP1171867A1 (en)
JP (1) JP4638606B2 (en)
CN (1) CN1150508C (en)
DE (2) DE19913915C1 (en)
TW (1) TWI227463B (en)
WO (1) WO2000058938A1 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101820531A (en) * 2010-03-16 2010-09-01 江苏瀚远科技股份有限公司 Video anti-counterfeiting monitoring device and monitoring method
DE102013201667A1 (en) 2013-02-01 2014-08-07 Zf Friedrichshafen Ag Assembly for a hybrid powertrain

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5384576A (en) * 1990-08-18 1995-01-24 Totoku Electric Co., Ltd. CRT display device
JPH08328529A (en) * 1995-05-29 1996-12-13 Canon Inc Display device
WO1998025401A1 (en) * 1996-12-05 1998-06-11 In Focus Systems, Inc. Pixel clock phase and frequency correction
US5926174A (en) * 1995-05-29 1999-07-20 Canon Kabushiki Kaisha Display apparatus capable of image display for video signals of plural kinds

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3914249A1 (en) * 1989-04-29 1990-12-13 Georg Rudolph Clock pulse recovery from input signal - digitises input signal by comparison clock pulse in different phase positions, and correcting comparison pulse frequency
DE19751719A1 (en) * 1997-11-21 1999-05-27 Thomson Brandt Gmbh Signal processing method for an analog image signal
JPH11184425A (en) * 1997-12-24 1999-07-09 Sharp Corp Display device
WO2000058936A1 (en) * 1999-03-26 2000-10-05 Fujitsu Siemens Computers Gmbh Method and device for adjusting the phase for flat screens

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5384576A (en) * 1990-08-18 1995-01-24 Totoku Electric Co., Ltd. CRT display device
JPH08328529A (en) * 1995-05-29 1996-12-13 Canon Inc Display device
US5926174A (en) * 1995-05-29 1999-07-20 Canon Kabushiki Kaisha Display apparatus capable of image display for video signals of plural kinds
WO1998025401A1 (en) * 1996-12-05 1998-06-11 In Focus Systems, Inc. Pixel clock phase and frequency correction

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 1997, no. 4 30 April 1997 (1997-04-30) *

Also Published As

Publication number Publication date
WO2000058938A1 (en) 2000-10-05
JP2002540476A (en) 2002-11-26
EP1887556A2 (en) 2008-02-13
CN1345436A (en) 2002-04-17
JP4638606B2 (en) 2011-02-23
DE19913915C1 (en) 2000-11-23
TWI227463B (en) 2005-02-01
CN1150508C (en) 2004-05-19
EP1171867A1 (en) 2002-01-16
DE20023973U1 (en) 2008-07-10

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