EP1869684A1

EP1869684A1 - Electric multilayer component and method for the production of a multilayer component

Info

Publication number: EP1869684A1
Application number: EP06722777A
Authority: EP
Inventors: Christian Block; Günter Engel; Thomas Feichtinger; Volker Wischnat
Original assignee: Epcos AG
Current assignee: TDK Electronics AG
Priority date: 2005-04-11
Filing date: 2006-04-11
Publication date: 2007-12-26
Also published as: DE102005016590A1; JP2008537328A; US20090116168A1; WO2006108397A1

Abstract

Disclosed is an electric multilayer component comprising a base (10) with dielectric layers and inner electrodes (1, 1', 2, 2') that are disposed therebetween. The inner electrodes (1, 2) are electrically interconnected via outer electrodes (11, 12) located on lateral faces of the base (10). At least one of the inner electrodes (1, 1', 2, 2') is in contact with a contact area (21, 22) of the component by means of a through-contact (31, 32).

Description

description

Electric multilayer component and method for producing a multilayer component

A multilayered electrical component will be described. Furthermore, a method for producing a multilayer component is specified.

A multilayer component with a functional unit integrated in a basic body is known, for example, from the document DE 103 13 891 A1. A method for producing a multilayer component is known from the publication DE 103 17 596 A1.

An object to be solved is to specify a multilayer component with an advantageous contacting of the functional unit of the component. Another object to be solved is to provide a method for producing such a multilayer component.

The invention relates to a multilayer electrical component comprising a base body with dielectric layers and structured metal layers arranged therebetween, in which inner electrodes are formed, which are electrically connected to one another via external electrodes arranged on side surfaces of the base body.

In this case, in a first preferred variant, an electrical connection between an outer electrode and a contact surface arranged on a main surface of the main body to the outer side of the component towards z. B. isolated by means of a compound covering this compound insulating layer. This insulating layer is optionally part of the terminal dielectric Layer of the main body.

In a second preferred variant, at least one of the inner electrodes is contacted by means of a via contact with a contact surface of the component. Preferably, a first inner electrode facing the contact surface is connected to this contact surface by means of the through-connection.

At least one further contact surface may be arranged on the underside of the base body, which is connected by means of a plated-through hole with a second inner electrode facing this contact surface, which is galvanically isolated from the first inner electrode.

In a third preferred variant, a terminal first inner electrode connected to a first outer electrode and a terminal second inner electrode connected to a second outer electrode are formed in one and the same plane and in each case contacted by a via contact with a contact surface of the component.

The features of the first, second and third preferred variants can be combined as desired.

Hereinafter, the multi-layer device and its advantageous embodiments will be explained in more detail.

The dielectric layers and the metal layers are alternately stacked. The dielectric layers are preferably made of a ceramic material.

The contact surface is a connection of the component arranged on the surface of the base body, that is to say an exposed solderable surface. The contact surface is preferably arranged on the underside of the Grundkδrpers, but may alternatively be arranged on its upper side. The contact surface is preferably a galvanically reinforced metal surface. The contact surfaces are preferably with Ball Grid Array (BGA) or Land Grid Array (LGA).

An outer electrode is arranged on a side surface, that is on a lateral surface of the base body. An outer electrode usually consists of a baked-on metal paste, which in itself - in contrast to a contact surface - is only partially solderable to not solderable. The outer electrodes can be used to improve the z. B. be provided with a solderable coating. In a variant but can be dispensed with.

The first and second internal electrodes are called counter-polarized internal electrodes. The inner electrodes and the dielectric layers arranged between them form a stack. The at least one inner electrode contacted by the through-connection is preferably a terminal inner electrode of this stack.

The multilayer component is preferably a multilayer capacitor. Superposed oppositely polarized, d. H. Internal electrodes connected to different external electrodes and the dielectric layers arranged between them form a capacitor stack. In the main body, a plurality of capacitor stacks may be arranged next to each other, with different capacitor stacks preferably being contactable via different contact surfaces.

The multilayer component can also be a multilayer varistor. In this case, preferably a first stack is connected by first inner electrodes connected to a first outer electrode and a second stack formed by second internal electrodes connected to a second external electrode. The stacks are arranged side by side. A first and a second inner electrode, which are formed in a metal layer, therefore lie next to one another.

There is an electrical connection between the contact surface and the outer electrode, which is however preferably hidden. The contact surface is preferably electrically connected to an outer electrode associated therewith exclusively via an electrical connection concealed in the base body.

The electrical connection is formed in a variant by the through-hole and connected to this inner electrode. In this case, the electrical connection between a contact surface and the outer electrode is buried in the base body.

In a further variant, the arranged on a side surface of the body outer electrode may be electrically connected to an arranged on the underside of the body electrically conductive layer, wherein a portion of this electrically conductive layer is provided as a contact surface. Another part of this electrically conductive layer provided as an electrical connection between the contact surface and the outer electrode is preferably completely covered with an insulating layer (passivation layer) towards the surface of the component.

In one variant, a terminal first and a terminal second inner electrode are formed in a plane and each contacted by a via with a contact surface. A terminal inner electrode and an inner electrode following in the stack are each preferably connected to the same ben outer electrode electrically connected.

A first terminal dielectric layer of the main body, through which the via is guided, in a variant has a greater thickness than the thickness of the dielectric layers in the capacitor stack or in the varistor stack. A second terminal dielectric layer facing away from the first terminal dielectric layer may also be made thicker than the dielectric layers in the capacitor stack or in the varistor stack.

The first and / or the second terminal dielectric layer may be formed from a plurality of sub-layers arranged one above the other. The partial layers are similar in one variant with respect to the material and the thickness. However, the sub-layers may also be different in material and / or thickness.

The suitable for forming a capacitor stack dielectric layers may, for. B. from the following materials: COG, X7R, Z5U, Y5V, HQM. The dielectric layers suitable for forming a varistor stack may e.g. B. consist of a varistor ceramic ZnO-Bi or ZnO-Pr.

The internal electrodes and / or external electrodes can contain Ni, Cu, Ag, Pd and / or Pt or consist of the stated metals. The internal electrodes can also metal alloys such. B. AgPd or AgPt included. The vias are preferably of the same material as the internal electrodes.

The LGA or BGA balls may consist of Sn, SnAg, SnAgCu, SnPb or Au, or contain the materials mentioned. The contact surfaces which serve for the solder balls as UBM (Under Bump Metallization), are preferably formed of several layers. As a base layer, ie the lowest layer is z. B. Ag, AgPt, AgPd or Cu suitable. On the base layer, a barrier layer z. B. be arranged from Ni. On the barrier layer is preferably an oxidation protective layer z. B. Au or Pd arranged. The contact surfaces may, however, in principle consist of a layer which preferably contains a silver alloy.

Furthermore, a first method for producing a multilayer component is specified. The method comprises the following steps:

A) producing a first terminal dielectric layer with electrical vias,

B) producing electrically conductive layers contacting the plated-through holes on both sides of the first terminal dielectric layer,

C) producing a multilayer body comprising a plurality of component areas, wherein a layer sequence of dielectric layers and metal layers arranged one above the other is produced on the first terminal dielectric layer,

D) separation of component areas,

E) metallizing side surfaces of a device region to form outer electrodes of the device.

Furthermore, a second method for producing a multilayer component is specified. The method comprises the following steps:

A) producing a first terminal dielectric layer with electrical vias,

B) producing electrically conductive layers contacting the plated-through holes on both sides of the first terminal dielectric layer, C) producing a multilayer body comprising a plurality of component areas, wherein a layer sequence of dielectric layers and metal layers arranged one above the other is produced on the first terminal dielectric layer,

D) applying the multilayer body to a carrier and cutting through component regions, wherein the arrangement of device regions is maintained on the carrier,

E) filling interstices formed between the adjacent device regions with an electrically conductive paste and baking this paste,

F) separating component regions along the intermediate spaces to form components.

Advantageous embodiments of the first and second methods are explained below.

The multilayer body to be produced in step C) is preferably produced by pressing, decarburizing and sintering a body which comprises the terminal dielectric layer and the layer sequence. This is the case in particular with a multilayer body made of a ceramic material.

The electrically conductive layers disposed on the exposed surface of the first terminal dielectric layer are preferably printed with bumps prior to step F).

The electrically conductive layers disposed on the exposed surface of the first terminal dielectric layer are preferably provided to form surface mount pads of the device.

At least areas of the electrically conductive layers arranged on the exposed surface of the first terminal dielectric layer are provided as contact areas. preferably galvanically reinforced with a solderable material.

An insulating layer can be applied to a part of an electrically conductive layer which electrically connects a region of this electrically conductive layer provided as the contact surface and an outer electrode.

A second terminal dielectric layer of the multilayer body facing away from the first terminal dielectric layer may be formed from a plurality of sublayers arranged one above the other.

In a variant of the method, the first terminal dielectric layer is formed from a plurality of partial layers arranged one above the other.

In a variant of the second method, a part of the multilayer body having the component regions may be surrounded by an edge region which is free of hidden component structures and which is separated after step C) of device regions by interspaces to be filled with the electrically conductive paste in step E) Arrangement of device areas and the edge region is maintained on the support, and wherein the edge region is separated in step F) of component areas along the intermediate spaces.

The multi-layer component and the method steps are explained below with reference to schematic and not to scale figures. Show it:

Figure IA in cross section a multilayer component with internal electrodes, which are electrically connected to each other by means of an outer electrode and by means of plated-through holes with a contact surface; Figure IB is a plan view of the underside of the device according to Figure IA;

FIG. 2 shows method steps of a method for producing a component according to FIG. 1A;

Figure 3A in cross section a multilayer component with a plurality of independently contactable capacitor stacks;

Figure 3B is a plan view of the underside of the device according to Figure 3A;

FIG. 4 shows method steps of a method for producing a component according to FIG. 1A or 3A;

FIG. 5A shows in cross-section a multilayer component in which an outer electrode is electrically connected to an electrically conductive layer having a contact surface, wherein a part of the electrically conductive layer is covered by a passivation layer;

Figure 5B is a plan view of the underside of the device according to Figure 5A;

FIG. 6 shows a multilayer body which comprises edge regions which differ from component regions.

The underside of the multilayer component shown in FIGS. 1A, 3A and 5A points upwards.

FIGS. 1A and 1B show a multilayer component with a main body 10, which comprises dielectric layers and metal layers arranged therebetween. Figure IA speaks a section along a line AA shown in Fig. IB. This also applies to FIGS. 3A and 3B or 5A and 5B.

The metal layers are each patterned in FIG. 1A to form at least one inner electrode. First inner electrodes 1, 1 "are connected to a first outer electrode 11 and second inner electrodes 2, 2 'are connected to a second outer electrode 12. The outer electrodes are arranged on opposite side surfaces of the base body Together with the interposed dielectric layers form a capacitor stack 102nd

The terminal first inner electrode 1 'and the terminal second inner electrode 2' are arranged in a metal layer. These internal electrodes are in each case contacted by means of a plated-through hole 31, 32 with an electrically conductive layer 201, 202 which forms the contact surface 21, 22 in this variant. The contact surfaces 21, 22 are equipped with bumps - in this example BGA bumps.

The first terminal dielectric layer 100 is produced as the first layer of the main body 10, see FIGS. 2a to 2c. This layer has a greater thickness than the dielectric layers, which are arranged between the internal electrodes 1, 2.

The second terminal dielectric layer 101 also has a greater thickness than the dielectric layers of the capacitor stack 102.

The contact surfaces 21, 22 are formed in FIG. 1B with a round outline, since they are provided for mounting with BGA bumps. FIGS. 3A, 3B show a variant of the multilayer component illustrated in FIGS. 1A, 1B, which comprises a plurality of independently contactable functional units, in the example shown four capacitor stacks. Various functional units have different pairs of outer electrodes 11, 12; 11-1, 12-1; 11-2, 12-2; 11-3, 12-3 and are to different pairs of contact surfaces 21, 22; 21-1, 22-1; 21-2, 22-2; 21-3, 22-3 connected. The contact surfaces are rectangular in this embodiment and are suitable for assembly with LGA bumps.

FIGS. 2 and 4 show various methods for producing a multilayer component according to FIGS. 1A, 1B or 3A, 3B. FIGS. 2a to 2d and 4a to 4d show method steps for providing a sintered multilayer body 10 'comprising a plurality of component areas B1, B2, B3. The component areas Bl, B2, B3 are precursor components for the component to be produced.

In Figure 2a, a first terminal dielectric layer 100 is shown in which holes are punched to form vias 31, 32 and filled with an electrically conductive paste. On both sides of the layer 100, the vias contacting electrically conductive layers 201, 202, 1 ', 2 "produced (Fig. 2b), wherein the electrically conductive layers 201 and 1" and 202 and 2 "by means of the vias 31, 32 with each other Electrically conductive layers 201, 202, which are provided as contact surfaces, are produced on one side of this layer, and on the opposite side of this layer, electrically conductive layers 1 'and 2 "are produced which serve as terminal internal electrodes and in a later method step be connected to the outer electrodes. A layer sequence 110 is produced on the terminal dielectric layer 100, wherein dielectric layers, preferably ceramic-containing layers, are laminated in alternating sequence with metal layers. The layer and the layer sequence 110 together form a multilayer body 10 '. It is advantageous, the terminal dielectric layer 101 of the multilayer body z. B. by superimposing a plurality of dielectric sub-layers thicker form than the inner dielectric layers. These partial layers are preferably similar to the inner dielectric layers.

The layer 100 can also be formed from several partial layers in this way. However, it is also possible to form the layer 100 and / or the layer 101 in each case as a single layer of a higher thickness.

The multi-layer body 10 "is pressed (Fig. 2d), decarburized and sintered The sintered multi-layer body 10" is applied to a support 7 and fixed to its surface, preferably by adhesive forces.

The multi-layer body 10 "comprises several areas B1, B2, B3 provided as component areas, which are separated from one another, for example by means of sawing, whereby interspaces 6 are created between the component areas (Figure 2e) however, as a whole, the arrangement of the device regions on the carrier is also substantially maintained The gaps 6 are filled in the step shown in Figure 2f with an electrically conductive material 61, such as a metal paste, which is subsequently baked A gap 6 is in the form of a groove separating two rows of device areas. Bumps 41, 42 are attached to the electrically conductive layers 201, 202 provided as contact surfaces (FIG. 2 g). The component areas B1, B2, B3 of the multi-layer body 10 "are separated in the step shown in Fig. 2h along imaginary lines (saw lines) shown in phantom in the figure, whereby components with external electrodes 11, 12 are formed on their side surfaces approximately through the middle of the spaces 6 through.

The electrically conductive layers 201, 202, 1 ", 2", 1, 2 of the metal layers are preferably produced in a screen printing process. The electrically conductive layers 201, 202 provided as contact surfaces are preferably galvanically reinforced after the sintering of the multilayer body 10 ".

FIG. 4 schematically shows method steps of a further method.

The method steps shown in FIGS. 4a to 4d for producing a multilayer body 10 "correspond to the method steps explained in FIGS. 2a to 2d.

After the multi-layer body 10 "has been provided, component areas B1, B2, B3 are separated by sawing, for example by sawing, and the side surfaces of each component area are metallized, ie covered with a metal paste, to form outer electrodes 11, 12 of the component. which is burned.

It is advantageous to arrange the multi-layer body 10 "on the separation of the component areas on a support 7, the component areas being detached from the support after the separation. In the variant shown in FIGS. 5A and 5B, the outer electrode 11, 12 arranged on a side surface of the main body 10 extends beyond an edge of this lateral surface and forms an electrically conductive layer 201, 202 on the underside of the main body 10. A part of this electrically conductive layer is provided as a contact surface 21, 22. Preferably, only this region of the electrically conductive layer is exposed or uncovered by the insulating layer 52. The remaining part of this electrically conductive layer, which is provided as an electrical connection 28, 29 between the contact surface and the laterally arranged outer electrode 11, 12, is completely covered with the insulating layer 52 (passivation layer) in the direction of the surface of the component.

The contact surfaces 21, 22 are equipped with bumps 41, 42. The insulating layer 52 serves as a solder stop during the melting of the bumps 41, 42.

FIG. 6 shows a variant in which a part of the multilayer body having the component areas B1, B2, B3 is surrounded by an edge area RB which is free from hidden component structures (in particular internal electrodes). The edge region RB is separated from terminal device regions B1 and BN by the gaps 6 "to be filled with the metal paste in the method step shown in Fig. 2e, whereby the arrangement of device regions and the edge region on the carrier 7 is preserved the step shown in Fig. 2h separated from the terminal device areas Bl, BN along the gaps. LIST OF REFERENCE NUMBERS

10 basic body

10 'multilayer body

100 first terminal dielectric layer

101 second terminal dielectric layer

102 capacitor stack

110 layer sequence of dielectric layers and metal layers

I, 2 first and second inner electrode

1 ", 2 'terminal first and second inner electrode

II, 12 first and second outer electrode

11-j, 12 -j first and second outer electrodes, j = 1, 2, 3, 21, 22 first and second contact surfaces

21-j, 22-j first and second contact surface, j = 1, 2, 3, 201, 202 electrically conductive layer having a contact surface

28, 29 electrical connection between an outer electrode and arranged on a main surface of the body contact surface

31, 32 through-hole 41, 42 bumps 50, 51, 52 insulating layer

6 formed between component areas intermediate space

6 'between the edge region of the multi-layer body 10' and

Component areas formed gap 61 electrically conductive material for filling the

Interspaces 6, 6 '

7 carriers

Bl, B2, B3, BN component areas RB edge area

Claims

claims

1. Electric multilayer component, comprising a base body (10) with dielectric layers and interposed internal electrodes (1, 1 ', 2, 2'), wherein the internal electrodes (1, 2) of a variety over on side surfaces of the base body (10) arranged external electrodes (11, 12) are electrically connected to each other, and wherein an electrical connection (I ", 31; 2", 32, 28, 29) between an outer electrode (11, 12) and one on a main surface of the base body (10) arranged contact surface (21, 22) is insulated towards the outside of the device.

2. Multi-layer component according to claim 1, wherein the electrical connection (28, 29) in the interior of the base body (10).

3. Multi-layer component according to claim 1 or 2, wherein at least one of the internal electrodes (1, 1 ', 2, 2') with the contact surface (21, 22) by means of a through-contact (31, 32) is contacted.

4. A multilayer device according to claim 1, wherein an outer electrode (11, 12) is electrically connected to an electrically conductive layer (201, 202) having the contact surface (21, 22), and wherein a part of this electrically conductive layer (11 201, 202) between the contact surface (21, 22) and the outer electrode (11, 12) is covered by an insulating layer (51).

5. Electrical multilayer component, comprising a base body (10) with dielectric layers and interposed internal electrodes (1, 1 ", 2, 2"), wherein the internal electrodes (1, 2) on on side surfaces of External body (10) arranged outer electrodes (11, 12) are electrically connected to each other, and wherein at least one of the internal electrodes (1, 1 ", 2, 2") with a contact surface (21, 22) of the base body (10) by means of a via ( 31, 32) is contacted.

6. Multi-layer component according to claim 5, wherein the contact surface (21) on the underside of the base body (10) is arranged.

7. Multi-layer component according to one of claims 1 to 6, wherein the electrical connection (28, 29) between a contact surface (21, 22) and one of these associated outer electrode

(11, 12) is covered towards the surface of the device out with an insulating layer (51).

8. The multilayer component according to claim 1, wherein first inner electrodes (1) connected to a first outer electrode (11) and second inner electrodes (2) connected to a second outer electrode (12) are arranged alternately one above the other.

9. A multilayer component according to claim 8, wherein a terminal first and a terminal second inner electrode (1 ', 2 ") formed in a plane and in each case by means of a through-contact (31, 32) contacted with a contact surface (21, 22) of the device are.

10. The multilayer component according to claim 9, wherein the terminal inner electrode {2 '') and a subsequent inner electrode (2) are electrically connected to the same outer electrode (12).

11. Multilayer component according to one of claims 1 to 10, wherein the inner electrodes (1, 1 ", 2, 2") and the dielectric layers arranged between them form a capacitor stack (102).

12. The multilayer component according to claim 11, wherein a plurality of adjacently arranged capacitor stacks are provided in the main body, and wherein different capacitor stacks are provided via different contact surfaces (21, 22, 21-1, 22-1, 21-2). 22-2, 21-3, 22-3) are contactable.

13. The multilayer component according to claim 11, wherein the base body (10) has a first terminal dielectric layer (100) through which the plated-through hole (31, 32) is made, whose thickness is greater than that of the dielectric layers of the Capacitor stack (102).

14. The multilayer component according to claim 13, wherein the first terminal dielectric layer (100) has a plurality of sublayers arranged one above the other.

15. The multilayer component according to claim 13, wherein the base body has a second terminal dielectric layer facing away from the first terminal dielectric layer, the thickness of which is greater than that of the dielectric layers of the capacitor stack (102).

16. The multilayer component according to claim 15, wherein the second terminal dielectric layer (101) has a plurality of sublayers arranged one above the other.

17. A multilayer device according to any one of claims 1 to 16, wherein the dielectric layers include a ceramic material.

18. Multi-layer component according to one of claims 1 to 17, wherein the contact surfaces (21, 22) are printed with ball grid array bumps.

19. Multi-layer component according to one of claims 1 to 17, wherein the contact surfaces (21, 22) are printed with land grid array bumps.

20. An electrical multilayer component, comprising a base body (10) with dielectric layers and interposed internal electrodes (1, 1 ', 2, 2 "), wherein the internal electrodes (1, 2) arranged on side surfaces of the base body (10) outer electrodes (11, 12) are electrically connected to one another, and wherein a terminal first inner electrode connected to a first outer electrode (11) and a terminal second inner electrode connected to a second outer electrode (12) are formed in a plane and in each case by means of a through-connection (31, 32) are contacted with a contact surface (21, 22) of the component.

21. A method for producing a multilayer component comprising the steps of:

A) producing a first terminal dielectric layer (100) with electrical feedthroughs (31, 32),

B) producing contact vias (31, 32) of contacting electrically conductive layers (I ", 2 ', 201, 202) on both sides of the first terminal dielectric layer (100),

C) generating a multi-layer body (10 ") comprising a plurality of component areas (Bl, B2, B3), wherein a layer sequence (110) of dielectric layers and metal layers arranged one above the other is produced on the first terminal dielectric layer (100), D) separating component regions (Bl, B2, B3),

E) metallizing side surfaces of a device region to form outer electrodes (11, 12) of the device.

22. Method for producing a multilayer component with the steps:

B) generating electrically conductive layers (1 ', 2 ", 201, 202) contacting the plated-through holes (31, 32) on both sides of the first terminal dielectric layer (100),

C) producing a multilayer body (10 ') comprising a plurality of component areas (Bl, B2, B3), wherein a layer sequence (110) of dielectric layers and metal layers arranged one above the other is produced on the first terminal dielectric layer (100),

D) applying the multilayer body (10 ') to a carrier (7) and severing component regions (Bl, B2, B3),

E) filling interstices (6) formed between the adjacent component regions (Bl, B2) with an electrically conductive material (61),

F) separating component regions (Bl, B2, B3) along the intermediate spaces (6) to form components.

23. The method of claim 22, wherein the arrangement of device areas on the carrier (7) in step D) is maintained.

The method of claim 23, wherein prior to step F), the electrically conductive layers (1 ', 2', 201, 202) disposed on the exposed surface of the first terminal dielectric layer (100) are printed with bumps (41, 42) ,

25. Method according to claim 22, wherein the electrically conductive layers (1 ", 2", 201, 202) arranged on the exposed surface of the first terminal dielectric layer (100) are designed to form surface-mountable contact surfaces (21, 22) of the component are provided.

The method of claim 25, wherein the electrically conductive layers (1 ", 2 ', 201, 202) disposed on the exposed surface of the first terminal dielectric layer (100) are galvanically reinforced.

27. The method according to claim 25 or 26, wherein on a part of an electrically conductive layer (201, 202) which electrically connects a contact surface (21, 22) provided for this region of this electrically conductive layer and an outer electrode (11, 12) electrically, an insulating layer (51) is applied.

28. The method according to any one of claims 22 to 27, wherein the multi-layer body (10 ') with a of the first terminal dielectric layer (100) facing away from the second terminal dielectric layer (101) is formed, consisting of a plurality of superposed sub-layers.

29. The method according to any one of claims 22 to 28, wherein the first terminal dielectric layer (100) is formed of a plurality of superposed sub-layers.

30. The method according to any one of claims 23 to 29, wherein a the component areas (Bl, B2, B3) comprising part of the multi-layer body (10 ") is surrounded by a hidden component structures free edge region (RB), which after step C) of Component areas by in step E) with the electrically conductive material (61) to be filled gaps {6 ") is separated, wherein the arrangement of device areas (Bl, B2, B3) and the edge region (RB) is maintained on the support (7), wherein the edge region (RB) in Step F) of component regions (Bl, B2, B3) is separated along the intermediate spaces (6 ').

31. The method according to any one of claims 21 to 30, wherein in step C) of the multi-layer body (10 ') is produced by pressing, decarburization and sintering of a body comprising the terminal dielectric layer (100) and the layer sequence (110) ,

32. The multilayer component according to claim 1,

wherein the outer electrode extends beyond the edge of the main body and forms a conductive layer which has the contact surface and is covered by a passivation layer in the regions other than the contact surface.

33. The method of claim 21, wherein firstly the first terminal layer is provided with the via contacts and the metal layers on its two major surfaces, and wherein the layer sequence is thereafter connected to the first terminal layer.