EP1863082A3 - Method of producing semiconductor substrate - Google Patents

Method of producing semiconductor substrate Download PDF

Info

Publication number
EP1863082A3
EP1863082A3 EP07008808A EP07008808A EP1863082A3 EP 1863082 A3 EP1863082 A3 EP 1863082A3 EP 07008808 A EP07008808 A EP 07008808A EP 07008808 A EP07008808 A EP 07008808A EP 1863082 A3 EP1863082 A3 EP 1863082A3
Authority
EP
European Patent Office
Prior art keywords
wafer
hydrogen ion
oxide film
hydrogen
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP07008808A
Other languages
German (de)
French (fr)
Other versions
EP1863082A2 (en
EP1863082B1 (en
Inventor
Satoshi Murakami
Nobuyuki Morimoto
Hideki Nishihata
Akihito Endo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumco Corp
Original Assignee
Sumco Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumco Corp filed Critical Sumco Corp
Publication of EP1863082A2 publication Critical patent/EP1863082A2/en
Publication of EP1863082A3 publication Critical patent/EP1863082A3/en
Application granted granted Critical
Publication of EP1863082B1 publication Critical patent/EP1863082B1/en
Ceased legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

There is provided a method for suppressing the occurrence of defects such as voids or blisters even in the laminated wafer having an oxide film of a thickness thinner than the conventional one, wherein hydrogen ions are implanted into a wafer for active layer having an oxide film of not more than 50 nm in thickness to form a hydrogen ion implanted layer, and ions other than hydrogen are implanted up to a position that a depth from the surface side the hydrogen ion implantation is shallower than the hydrogen ion implanted layer, and the wafer for active layer is laminated onto a wafer for support substrate through the oxide film, and then the wafer for active layer is exfoliated at the hydrogen ion implanted layer.
EP07008808A 2006-05-25 2007-04-30 Method of producing semiconductor substrate Ceased EP1863082B1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2006145718A JP5082299B2 (en) 2006-05-25 2006-05-25 Manufacturing method of semiconductor substrate

Publications (3)

Publication Number Publication Date
EP1863082A2 EP1863082A2 (en) 2007-12-05
EP1863082A3 true EP1863082A3 (en) 2008-02-13
EP1863082B1 EP1863082B1 (en) 2010-09-22

Family

ID=38616392

Family Applications (1)

Application Number Title Priority Date Filing Date
EP07008808A Ceased EP1863082B1 (en) 2006-05-25 2007-04-30 Method of producing semiconductor substrate

Country Status (6)

Country Link
US (2) US7795117B2 (en)
EP (1) EP1863082B1 (en)
JP (1) JP5082299B2 (en)
CN (1) CN101312125B (en)
SG (1) SG137776A1 (en)
TW (1) TWI344677B (en)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5082299B2 (en) * 2006-05-25 2012-11-28 株式会社Ｓｕｍｃｏ Manufacturing method of semiconductor substrate
JP5499428B2 (en) * 2007-09-07 2014-05-21 株式会社Ｓｕｍｃｏ Manufacturing method of bonded wafer
JP5298700B2 (en) * 2008-08-20 2013-09-25 信越半導体株式会社 Silicon wafer manufacturing method
JP4666189B2 (en) * 2008-08-28 2011-04-06 信越半導体株式会社 Manufacturing method of SOI wafer
US20120309172A1 (en) * 2011-05-31 2012-12-06 Epowersoft, Inc. Epitaxial Lift-Off and Wafer Reuse
US9202711B2 (en) * 2013-03-14 2015-12-01 Sunedison Semiconductor Limited (Uen201334164H) Semiconductor-on-insulator wafer manufacturing method for reducing light point defects and surface roughness
US11342498B2 (en) * 2018-01-08 2022-05-24 Integrated Silicon Solution (cayman) Inc. High density 3D magnetic random access memory (MRAM) cell integration using wafer cut and transfer
CN113990845B (en) * 2021-12-28 2022-03-18 广州粤芯半导体技术有限公司 Detection structure, preparation method thereof and detection method of cavity in membrane layer

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0940847A2 (en) * 1998-03-03 1999-09-08 Canon Kabushiki Kaisha SOI substrate bonding under clean room conditions
US20060063353A1 (en) * 2004-09-21 2006-03-23 S.O.I.Tec Silicon On Insulator Technologies S.A. Method of layer transfer comprising sequential implantations of atomic species
US20060128116A1 (en) * 2004-12-14 2006-06-15 Sung Ku Kwon Manufacturing method of silicon on insulator wafer

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FR2773261B1 (en) * 1997-12-30 2000-01-28 Commissariat Energie Atomique METHOD FOR THE TRANSFER OF A THIN FILM COMPRISING A STEP OF CREATING INCLUSIONS
JP2001168308A (en) * 1999-09-30 2001-06-22 Canon Inc Method of manufacturing silicon thin film, forming method of soi substrate, and semiconductor device
JP3943782B2 (en) * 1999-11-29 2007-07-11 信越半導体株式会社 Reclaimed wafer reclaim processing method and reclaimed peeled wafer
JP3975634B2 (en) * 2000-01-25 2007-09-12 信越半導体株式会社 Manufacturing method of semiconductor wafer
US20020187619A1 (en) * 2001-05-04 2002-12-12 International Business Machines Corporation Gettering process for bonded SOI wafers
WO2003049189A1 (en) * 2001-12-04 2003-06-12 Shin-Etsu Handotai Co.,Ltd. Pasted wafer and method for producing pasted wafer
US6995075B1 (en) * 2002-07-12 2006-02-07 Silicon Wafer Technologies Process for forming a fragile layer inside of a single crystalline substrate
US6979630B2 (en) * 2002-08-08 2005-12-27 Isonics Corporation Method and apparatus for transferring a thin layer of semiconductor material
JP2004087768A (en) * 2002-08-27 2004-03-18 Shin Etsu Handotai Co Ltd Method of manufacturing soi wafer
JP3864886B2 (en) * 2002-10-18 2007-01-10 信越半導体株式会社 SOI wafer
US6808748B2 (en) * 2003-01-23 2004-10-26 Applied Materials, Inc. Hydrogen assisted HDP-CVD deposition process for aggressive gap-fill technology
US7625808B2 (en) * 2003-09-01 2009-12-01 Sumco Corporation Method for manufacturing bonded wafer
EP1662550B1 (en) * 2003-09-05 2019-12-04 SUMCO Corporation Method for producing soi wafer
EP1662555B1 (en) * 2003-09-05 2011-04-13 SUMCO Corporation Method for producing soi wafer
EP1667218B9 (en) * 2003-09-08 2019-11-20 SUMCO Corporation Soi wafer and its manufacturing method
WO2005024917A1 (en) * 2003-09-08 2005-03-17 Sumco Corporation Method for producing bonded wafer
WO2005024918A1 (en) * 2003-09-08 2005-03-17 Sumco Corporation Soi wafer and its manufacturing method
JP4552858B2 (en) * 2003-09-08 2010-09-29 株式会社Ｓｕｍｃｏ Manufacturing method of bonded wafer
FR2864336B1 (en) * 2003-12-23 2006-04-28 Commissariat Energie Atomique METHOD FOR SEALING TWO PLATES WITH FORMATION OF AN OHMIC CONTACT BETWEEN THEM
JP4285244B2 (en) * 2004-01-08 2009-06-24 株式会社Ｓｕｍｃｏ Manufacturing method of SOI wafer
US6992025B2 (en) * 2004-01-12 2006-01-31 Sharp Laboratories Of America, Inc. Strained silicon on insulator from film transfer and relaxation by hydrogen implantation
JP4539098B2 (en) * 2004-01-29 2010-09-08 株式会社Ｓｕｍｃｏ Manufacturing method of bonded substrate
WO2005080645A2 (en) * 2004-02-13 2005-09-01 Apollo Diamond, Inc. Diamond structure separation
US7235812B2 (en) * 2004-09-13 2007-06-26 International Business Machines Corporation Method of creating defect free high Ge content (>25%) SiGe-on-insulator (SGOI) substrates using wafer bonding techniques
US7344957B2 (en) * 2005-01-19 2008-03-18 Texas Instruments Incorporated SOI wafer with cooling channels and a method of manufacture thereof
US7553772B1 (en) * 2005-01-31 2009-06-30 Lsi Corporation Process and apparatus for simultaneous light and radical surface treatment of integrated circuit structure
US7494899B2 (en) * 2005-04-14 2009-02-24 Sumco Corporation Method for manufacturing semiconductor substrate
JP5109287B2 (en) * 2006-05-09 2012-12-26 株式会社Ｓｕｍｃｏ Manufacturing method of semiconductor substrate
JP5082299B2 (en) * 2006-05-25 2012-11-28 株式会社Ｓｕｍｃｏ Manufacturing method of semiconductor substrate
JP2008004900A (en) * 2006-06-26 2008-01-10 Sumco Corp Method for manufacturing laminated wafer
EP2075830A3 (en) * 2007-10-11 2011-01-19 Sumco Corporation Method for producing bonded wafer

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0940847A2 (en) * 1998-03-03 1999-09-08 Canon Kabushiki Kaisha SOI substrate bonding under clean room conditions
US20060063353A1 (en) * 2004-09-21 2006-03-23 S.O.I.Tec Silicon On Insulator Technologies S.A. Method of layer transfer comprising sequential implantations of atomic species
US20060128116A1 (en) * 2004-12-14 2006-06-15 Sung Ku Kwon Manufacturing method of silicon on insulator wafer

Also Published As

Publication number Publication date
CN101312125A (en) 2008-11-26
US20070275566A1 (en) 2007-11-29
EP1863082A2 (en) 2007-12-05
US20090075453A1 (en) 2009-03-19
TWI344677B (en) 2011-07-01
US7951692B2 (en) 2011-05-31
US7795117B2 (en) 2010-09-14
CN101312125B (en) 2011-06-22
TW200809972A (en) 2008-02-16
SG137776A1 (en) 2007-12-28
JP5082299B2 (en) 2012-11-28
EP1863082B1 (en) 2010-09-22
JP2007317878A (en) 2007-12-06

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