EP1860739B1

EP1860739B1 - Connector with contacts of different lengths

Info

Publication number: EP1860739B1
Application number: EP07009324A
Authority: EP
Inventors: Yu-Jing Liao; Yao-Chung Lin; Yi-Tsung Cheng; Wei-Chih Chang; Yu-Chun Peng; Cheng-Hsi Liu
Original assignee: HTC Corp
Current assignee: HTC Corp
Priority date: 2006-05-24
Filing date: 2007-05-09
Publication date: 2010-04-14
Anticipated expiration: 2027-05-09
Also published as: DE602007005864D1; EP1860739A1; CN100539314C; CN101079522A; ATE464676T1

Abstract

A connector for connecting a host and a peripheral device is disclosed. The connector includes N pin groups and each of the N pin groups has different pin length, wherein N is a positive integer and is greater than or equal to 3. The first pin group consists of ground pins and has the longest pin length.

Description

Field of the Invention

The present invention relates to a connector. More particularly, the present invention relates to a connector having different pin lengths.

Description of Related Art

Universal serial bus (USB) is usually used as the interface for transmitting digital signals, and as to some commonly used peripheral devices, such as earphones and speakers, to improve audio quality and simplify design, independent connectors are generally used for transmitting data and for differentiating the peripheral devices. However, as to those hand-held devices whose designs are going towards being light, thin, short, compact and small, such as mobile phones, personal digital assistants (PDAs), smart phones, GPS devices, music players, and game machines, the cost and the volumes thereof may be increased if various connectors are to be disposed therein.
Generally, the pin lengths of a connector are the same, the angle of inserting the connector is different when the user habit and the working environment are different. Signal misjudgment may be caused if the pin connection sequence in the connector is not consistent, for example, if the pin for transmitting signal is connected before the ground pin, signal misjudgment will be caused due to a lack of ground voltage level. Document US-B-6945824 discloses a connector according to the preamble of claim 1.

SUMMARY OF THE INVENTION

Accordingly, the present invention is directed to provide a connector which is suitable for both USB and audio signal transmissions.
According to another aspect of the present invention, a connector is provided, wherein USB pins and audio signal pins are integrated into an insulating layer, so as to integrate the functions of various connectors.
According to yet another aspect of the present invention, a connector is provided, wherein pins of different lengths are disposed according to different functions so that the connector can be applied to different insertion angles, accordingly the accuracy of signal transmissions is improved and signal misjudgment is avoided.
To achieve the aforementioned and other aspects, the present invention provides a connector according to claim 1.
In overview, multiple pins are adopted in the present invention to integrate USB and audio signal transmission interfaces into a connector so that a single connector can perform more functions, accordingly, the number of connectors and the space required by the connectors in an electronic apparatus can be reduced. Meanwhile, pins of different lengths are disposed according to different functions so that the connector can be applied to different insertion angles, accordingly, the accuracy of signal transmission is increased and signal misjudgment is avoided.
In order to make the aforementioned and other aspects, features and advantages of the present invention comprehensible, a preferred embodiment accompanied with figures is described in detail below.
It is understood that both the aforegoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed.

BRIEF DESCRIPTION OF THE DRAWINGS

The accompanying drawings are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention.
FIG. 1 is a diagram illustrating the pin lengths of a connector according to an embodiment of the present invention.
FIG. 2 is a cross-sectional view illustrating the structure of a connector according to an embodiment of the present invention.
FIG. 3 is a cross-sectional view illustrating the major pins of a connector according to an embodiment of the present invention.
FIG. 4A is a cross-sectional view of FIG. 3 cut along line A~A'.
FIG. 4B is a cross-sectional view of FIG. 3 cut along line B~B'.
FIG. 4C is a cross-sectional view of FIG. 3 cut along line C~C'.

DESCRIPTION OF EMBODIMENTS

FIG. 1 is a diagram illustrating the pin lengths of a connector according to an embodiment of the present invention. In the present embodiment, the pin lengths of the connector are classified into 5, which are respectively L₁~L₅. The 11 pins P1~P11 in the present embodiment are classified into 5 pin groups based on the pin lengths L₁∼L₅ thereof. The first pin group is ground pins including pins P5 and P10, which are referred to thereinafter as ground pins P5 and P10, and the pin length thereof is L₁. The second pin group is audio pins including pins P6, P7, and P11, which are referred to thereinafter as audio pins P6, P7, and P11, and the pin length thereof is L₂. The third pin group is power supply pin including only pin P1, which is referred to thereinafter as power supply pin P1, and the pin length thereof is L₃. The fourth pin group is signal pins including pins P2, P3, and P4, which are referred to thereinafter as signal pins P2, P3, and P4, and the pin length thereof is L₄. The fifth pin group is data pins including pins P8 and P9, which are referred to thereinafter as data pins P8 and P9, and the pin length thereof is L₅. Wherein L₁, L₂, L₃, L₄, and L₅ are all positive integers and L₁>L₂>L₃>L₄>L₅.
In the present embodiment, the pins P1∼P11 are classified into 5 different lengths, wherein the pin length L₁ of the ground pins P5 and P10 is the longest. Thus, during normal operation, the ground pins P5 and P10 always connect the peripheral device and the host first regardless from which direction the user inserts the connector into the host, so that a common ground voltage level can be built up first between the host and the peripheral device to avoid signal misjudgment due to different user habit or working environment.
To transmit audio signals more effectively, the audio pins P6, P7, and P11 are mainly for transmitting audio signals and the pin length L₂ thereof is slightly smaller than the pin length L₁ of the ground pins P5 and P10. Besides, the ground voltage level required for signal transmission by the audio pins P6, P7, and P11 can be connected to the ground terminal along with the ground pin P10 through an independent path so as to reduce noise interference. Wherein, when the peripheral device performs the function of a microphone, the audio pin P6 provides a transmission path for the audio signals of the microphone. If the peripheral device performs the function of a speaker or an earphone, the audio pin P7 provides a transmission path for right-channel audio signals, while the audio pin P11 provides a transmission path for left-channel audio signals.
The data pins P8 and P9 are mainly used for providing a digital signal transmission path between the peripheral device and the host, and the pin length L₅ thereof is the shortest. The data pin P9 provides a clock signal transmission path, and the peripheral device can transmit a device data to the host or the device data can be transmitted from the host to the peripheral device along with the clock signal through the data pin P8. The host determines the type of the peripheral device according to the device data and controls the peripheral device through data transmission.
In the usage of the connector, the aggregation of the ground pin P5, the power supply pin P1, and the signal pins P2, P3, P4 has the function of connecting a USB interface and the ground pin P5, the power supply pin P1, and the signal pins P2, P3, P4 are disposed on the same surface of the connector. Wherein the power supply pin P1 provides the transmission path of the voltage source, the signal pins P2 and P3 provide the transmission path for differential signals in the USB, and the signal pin P4 is used for determining the master-slave relationship between the host and the peripheral device during signal transmission based on the voltage level thereof. The aggregation of the ground pin P5, the power supply pin P1, and the signal pins P2, P3, P4 is compatible to the pin functions of a USB interface, only the relative pin lengths are described in the present embodiment, and the respective pin function thereof should be understood by those having ordinary skill in the art, therefore will not be described herein.
FIG. 2 is a cross-sectional view illustrating the structure of a connector according to the present embodiment. The pins P1∼5 are disposed on the same surface of the connector 200, which is referred to as the top surface of the insulating layer 220 in the present embodiment. The pins P6∼P11 are disposed on another side of the connector 200, which is referred to as the bottom surface of the insulating layer 220 in the present embodiment. The outside of the connector 200 is surrounded by a case 210. The insulating layer 220 isolates the pins P1∼P5 and the pins P6∼P11. The connector 200 is connected to a host through a printed circuit board. In the present embodiment, the host can be a PDA, smart cell phone, GPS device, music player, and game machine.
Next, the structure of the connector in the present embodiment will be further described with cross-sectional views. FIG. 3 is a cross-sectional view illustrating the major pins of a connector according to the present embodiment. With the signal pin P3 as example, the cross-sectional view thereof cut along line A∼A' is as shown in FIG. 4A, wherein the signal pin P3 is disposed on the top surface of the insulating layer 220. With the audio pin P6 as example, the cross-sectional view thereof cut along line B∼B' is as shown in FIG. 4B, wherein the ground pin P5 and the audio pin P6 are respectively disposed on the top and bottom surface of the insulating layer 220. Obviously, the ground pin P5 is closer to the opening of the case 210 than the audio pin P6, so that the ground pin P5 can first come into contact with the corresponding pin of the socket when the connector 200 is connected to the socket. With the data pin P8 as example, the cross-sectional view thereof cut along line C∼C' is as shown in FIG. 4C, wherein the data pin P8 is disposed on the bottom surface of the insulating layer 220.
FIG. 4A-4A are cross-sectional views illustrating the major pin structures according to the present embodiment. However, the present invention is not limited to these structures. Even the present invention has bee explained with 5 pin lengths as example, the present invention can be applied to connectors of various pin lengths. The other workable connector structures should be easily understood by those having ordinary skill in the art and therefore will not be described herein.
In overview, even though only one pin combination suitable for USB and audio signal is used as example in the present embodiment for describing the present invention, the pin functions of the present invention are not limited thereto. The applications of the present invention in connectors of different pin functions or transmission interfaces can be easily understood based on the present disclosure by those having ordinary knowledge in the art, therefore will not be described herein.
According to the present invention, pins of different lengths are used for different pin functions so that signal misjudgment due to different user habit or working environment can be effectively avoided. Meanwhile, the functions of various connectors can be integrated into one single connector so that the space and design cost of hand-held electronic devices can be effectively reduced.
It will be apparent to those skilled in the art that various modifications and variations can be made to the structure of the present invention without departing from the scope or spirit of the invention. In view of the foregoing, it is intended that the present invention cover modifications and variations of this invention provided they fall within the scope of the following claims.

Claims

A connector for connecting a host and a peripheral device the connector comprising an insulating layer (220) placed within a case;, characterized by comprising at least:
5 pin groups, disposed on the insulating layer, wherein the pin length of the pin groups are respectively L₁, L₂, L₃, L₄, L₅ and L₁>L₂>L₃>L₄>L₅ so that the pin groups protrude to different extents in an insertion direction, thereby obtaining a contacting sequence when connecting the host and the peripheral device, wherein L₁, L₂, L₃, L₄, L₅ are positive numbers;
wherein the longest pin length of the 5 pin groups is a ground pin group such that the ground pin group connects earlier than the other pin groups when connecting the host and the peripheral device, wherein the ground pin group includes only two ground pins (P5, P10) which are disposed on the top surface and the bottom surface of the insulating layer (220) respectively, and not aligned.
The connector claimed in claim 1 the connector further comprises:
wherein the 5 pin groups comprises at least a power supply pin group, the ground pin group and an audio pin group, and wherein the power supply pin group is disposed on the top surface of the insulating layer (220) and the audio pin group is disposed on the bottom surface of the insulating layer (220).
The connector claimed in claim 1, wherein the ground pin group comprises:
a first ground pin (P10), providing a coupling path between the peripheral device and a ground terminal cooperating with the signal transmission of the second pin group;

and

a second ground pin (P5), providing another coupling path between the peripheral device and the ground terminal cooperating with the signal transmission of the fourth pin group; and
wherein a second pin group of the 5 pin groups comprises:
a first audio pin (P11), providing a left-channel audio signal transmission path;

a second audio pin (P7), providing a right-channel audio signal transmission path; and

a third audio pin (P6), providing an audio signal transmission path for a microphone when the peripheral device is the microphone; and
wherein a third pin group of the 5 pin groups comprises:
a power supply pin (P1); and
wherein a fourth pin group of the 5 pin groups comprises:
two first signal pins (P2, P3), providing a differential signal transmission path; and

a second signal pin (P4), used for determining the master- slave relationship between the host and the peripheral device during signal transmission; and
wherein a fifth pin group of the 5 pin groups comprises:
a first data pin (P9), providing a clock signal transmission path; and

a second data pin (P8), providing a device data transmission path cooperating with the clock signal; wherein the host determines the type of the peripheral device according to the device data.
The connector claimed in claim 3, wherein the aggregation of the second ground pin, the third pin group, and the fourth pin group has the function of connecting a USB interface.
The connector claimed in claim 1, wherein the 5 pin groups further comprise a pin group including three audio pins (P6, P7, P11) with the second longest pin length, so that the ground pins (P5, P10) protrude to a larger extent in the insertion direction than the audio pins (P6, P7, P11), wherein the audio pins (P6, P7, P11) are disposed on the bottom surface of the insulating layer (220) and the pins disposed on the top surface of the insulating layer (220) perform a USB interface function.
The connector claimed in claim 5, wherein the 5 pin groups comprises:
the two ground pins (P5, P 10), disposed on the insulating layer and not aligned, the pin length of each ground pin being L₁;

the three audio pins (P6, P7, P11), disposed on the insulating layer, the pin length of each audio pin being L₂;

a power supply pin (P1), disposed on the insulating layer, the pin length of the power supply pin being L₃;

three signal pins (P2, P3, P4), disposed on the insulating layer, the pin length of each signal pin being L₄; and

two data pins (P8, P9), disposed on the insulating layer, the pin length of each data pin being L₅.
The connector claimed in claim 6, wherein one ground pin (P5), the power supply pin (P1) and the three signal pins (P2, P3, P4) are disposed on the top surface of the insulating layer (220), and the three audio pins (P6, P7, P11), the two data pins (P8, P9) and the other ground pin (P10) are disposed on the bottom surface of the insulating layer (220).
The connector claimed in claim 6, wherein the ground pins (P5, P10) comprise:
a first ground pin (P10), providing a coupling path between the peripheral device and a ground terminal cooperating with the signal transmission of the audio pins (P6, P7, P11); and

a second ground pin (P5), providing another coupling path between the peripheral device and the ground terminal cooperating with the signal transmission of the signal pins (P2, P3, P4); and
wherein the audio pins (P6, P7, P11) comprise:
a first audio pin (P11), providing a left-channel audio signal transmission path;

a second audio pin (P7), providing a right-channel audio signal transmission path; and

a third audio pin (P6), providing an audio signal transmission path for a microphone when the peripheral device is the microphone; and
wherein the data pins (P8, P9) comprise:
a first data pin (P9), providing a clock signal transmission path; and

a second data pin (P8), providing a device data transmission path cooperating with the clock signal;
wherein the host determines the type of the peripheral device according to the device data.
The connector claimed in claim 1, wherein the connector comprises 11 pins (P1∼P11) classified into the 5 pin groups, wherein 5 pins (P1∼P5) of the 11 pins (P1∼P11) are disposed on the top surface and 6 pins (P6∼P11) of the 11 pins (P1∼P11) are disposed on the bottom surface, and the 5 pins (P1∼P5) disposed on the top surface of the insulating layer (220) perform a USB interface function.
The connector claimed in claim 9, wherein the 5 pin groups comprises:
a first pin group (P5, P 10), the pin length of the first pin group being L₁;

a second pin group (P6, P7, P11), the pin length of the second pin group being L₂;

a third pin group (P1), the pin length of the third pin group being L₃;

a fourth pin group (P2, P3, P4), the pin length of the fourth pin group being L₄; and

a fifth pin group (P8, P9), the pin length of the fifth pin group being L₅.
The connector claimed in claim 10, wherein the first pin group (P5, P 10) comprises:
a first ground pin (P10), disposed on the bottom surface of the insulating layer (220), providing a coupling path between the peripheral device and a ground terminal cooperating with the signal transmission of the second pin group (P6, P7, P11); and

a second ground pin (P5), disposed on the top surface of the insulating layer (220), providing another coupling path between the peripheral device and the ground terminal cooperating with the signal transmission of the fourth pin group; and
wherein the second pin group (P6, P7, P11) comprises:
a first audio pin (P11), providing a left-channel audio signal transmission path;

a second audio pin (P7), providing a right-channel audio signal transmission path; and

a third audio pin (P6), providing an audio signal transmission path for a microphone when the peripheral device is the microphone; and
wherein the third pin group comprises:
a power supply pin (P1); and
wherein the fourth pin group (P2, P3, P4) comprises:
two first signal pins (P2, P3) providing a differential signal transmission path; and

a second signal pin (P4), used for determining the master-slave relationship between the host and the peripheral device during signal transmission; and
wherein the fifth pin group (P8, P9) comprises:
a first data pin (P9), providing a clock signal transmission path; and

a second data pin (P8), providing a device data transmission path cooperating with the clock signal;
wherein the host determines the type of the peripheral device according to the device data.
The connector claimed in claim 11, wherein the second ground pin (P5), the third pin group (P1) and the fourth pin group (P2, P3, P4) are disposed on the top surface of the insulating layer (220) and the aggregation thereof performs the USB interface function, and the first ground pin (P 10), the second pin group (P6, P7, P11) and the fifth pin group (P8, P9) are disposed on the bottom surface of the insulating layer (220).