EP1851639A4 - System and method for effectively implementing an immunity mode in an electronic device - Google Patents

System and method for effectively implementing an immunity mode in an electronic device

Info

Publication number
EP1851639A4
EP1851639A4 EP06735006A EP06735006A EP1851639A4 EP 1851639 A4 EP1851639 A4 EP 1851639A4 EP 06735006 A EP06735006 A EP 06735006A EP 06735006 A EP06735006 A EP 06735006A EP 1851639 A4 EP1851639 A4 EP 1851639A4
Authority
EP
European Patent Office
Prior art keywords
electronic device
effectively implementing
immunity mode
immunity
mode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP06735006A
Other languages
German (de)
French (fr)
Other versions
EP1851639B1 (en
EP1851639A1 (en
Inventor
Robert A Hillman
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Data Device Corp
Original Assignee
Maxwell Technologies Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Maxwell Technologies Inc filed Critical Maxwell Technologies Inc
Publication of EP1851639A1 publication Critical patent/EP1851639A1/en
Publication of EP1851639A4 publication Critical patent/EP1851639A4/en
Application granted granted Critical
Publication of EP1851639B1 publication Critical patent/EP1851639B1/en
Not-in-force legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0891—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches using clearing, invalidating or resetting means
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1032—Reliability improvement, data loss prevention, degraded operation etc

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Storage Device Security (AREA)
  • Retry When Errors Occur (AREA)
  • Hardware Redundancy (AREA)
EP06735006.6A 2005-02-15 2006-02-14 System and method for effectively implementing an immunity mode in an electronic device Not-in-force EP1851639B1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/058,136 US7437599B2 (en) 2005-02-15 2005-02-15 System and method for effectively implementing an immunity mode in an electronic device
PCT/US2006/005131 WO2006088843A1 (en) 2005-02-15 2006-02-14 System and method for effectively implementing an immunity mode in an electronic device

Publications (3)

Publication Number Publication Date
EP1851639A1 EP1851639A1 (en) 2007-11-07
EP1851639A4 true EP1851639A4 (en) 2010-09-01
EP1851639B1 EP1851639B1 (en) 2017-09-20

Family

ID=36817026

Family Applications (1)

Application Number Title Priority Date Filing Date
EP06735006.6A Not-in-force EP1851639B1 (en) 2005-02-15 2006-02-14 System and method for effectively implementing an immunity mode in an electronic device

Country Status (5)

Country Link
US (1) US7437599B2 (en)
EP (1) EP1851639B1 (en)
JP (1) JP4443611B2 (en)
CN (1) CN101120327B (en)
WO (1) WO2006088843A1 (en)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7496786B2 (en) * 2006-01-10 2009-02-24 Stratus Technologies Bermuda Ltd. Systems and methods for maintaining lock step operation
US8271834B2 (en) 2008-12-15 2012-09-18 International Business Machines Corporation Method and system for providing immunity to computers
JP2011237950A (en) * 2010-05-07 2011-11-24 Fujitsu Ltd Information processor, backup server, backup program, backup method, and backup system
TW201237630A (en) * 2011-03-01 2012-09-16 Wistron Corp Method and computer system for processing data in a memory
JP5699057B2 (en) * 2011-08-24 2015-04-08 株式会社日立製作所 Programmable device, programmable device reconfiguration method, and electronic device
US9104639B2 (en) 2012-05-01 2015-08-11 SEAKR Engineering, Inc. Distributed mesh-based memory and computing architecture
CN105630732B (en) * 2015-12-17 2018-09-14 西北工业大学 A kind of hot change-over method of duplication redundancy microprocessor

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6625749B1 (en) * 1999-12-21 2003-09-23 Intel Corporation Firmware mechanism for correcting soft errors
EP1369786A2 (en) * 2002-05-14 2003-12-10 Sun Microsystems, Inc. Method and apparatus for providing fault-tolerance for temporary results within a central processing unit
US20040199813A1 (en) * 2003-02-28 2004-10-07 Maxwell Technologies, Inc. Self-correcting computer

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5414861A (en) * 1991-09-11 1995-05-09 Fujitsu Limited Data protection system using different levels of reserve power to maintain data in volatile memories for any period of time
JP3319608B2 (en) 1991-10-18 2002-09-03 ソニー株式会社 Electronics
US5450561A (en) 1992-07-29 1995-09-12 Bull Hn Information Systems Inc. Cache miss prediction method and apparatus for use with a paged main memory in a data processing system
EP0654740A1 (en) 1993-11-22 1995-05-24 Siemens Aktiengesellschaft Bus controller
US5513337A (en) 1994-05-25 1996-04-30 Intel Corporation System for protecting unauthorized memory accesses by comparing base memory address with mask bits and having attribute bits for identifying access operational mode and type
EP0834812A1 (en) 1996-09-30 1998-04-08 Cummins Engine Company, Inc. A method for accessing flash memory and an automotive electronic control system
JP4067063B2 (en) 1997-11-14 2008-03-26 松下電器産業株式会社 Microprocessor
US6578109B1 (en) 2000-06-29 2003-06-10 Sony Corporation System and method for effectively implementing isochronous processor cache
US7263631B2 (en) * 2004-08-13 2007-08-28 Seakr Engineering, Incorporated Soft error detection and recovery
US7343579B2 (en) * 2004-11-30 2008-03-11 Physical Sciences Reconfigurable environmentally adaptive computing

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6625749B1 (en) * 1999-12-21 2003-09-23 Intel Corporation Firmware mechanism for correcting soft errors
EP1369786A2 (en) * 2002-05-14 2003-12-10 Sun Microsystems, Inc. Method and apparatus for providing fault-tolerance for temporary results within a central processing unit
US20040199813A1 (en) * 2003-02-28 2004-10-07 Maxwell Technologies, Inc. Self-correcting computer

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of WO2006088843A1 *

Also Published As

Publication number Publication date
CN101120327A (en) 2008-02-06
US7437599B2 (en) 2008-10-14
CN101120327B (en) 2010-04-14
JP2008530696A (en) 2008-08-07
US20060184824A1 (en) 2006-08-17
JP4443611B2 (en) 2010-03-31
WO2006088843A1 (en) 2006-08-24
EP1851639B1 (en) 2017-09-20
EP1851639A1 (en) 2007-11-07

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