EP1704634A1 - Short circuit control in the inductance of a voltage boost converter - Google Patents

Short circuit control in the inductance of a voltage boost converter

Info

Publication number
EP1704634A1
EP1704634A1 EP04816609A EP04816609A EP1704634A1 EP 1704634 A1 EP1704634 A1 EP 1704634A1 EP 04816609 A EP04816609 A EP 04816609A EP 04816609 A EP04816609 A EP 04816609A EP 1704634 A1 EP1704634 A1 EP 1704634A1
Authority
EP
European Patent Office
Prior art keywords
switch
circuit
voltage
transistor
potential
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP04816609A
Other languages
German (de)
French (fr)
Inventor
Arnaud Florence
Jérôme HEURTIER
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
STMicroelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SA filed Critical STMicroelectronics SA
Publication of EP1704634A1 publication Critical patent/EP1704634A1/en
Withdrawn legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/32—Means for protecting converters other than automatic disconnection
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load

Definitions

  • FIG. 1 represents a first example of a conventional diagram of step-up converter of the type to which s
  • This converter essentially consists of an inductance L in series with a rectifying diode D between two terminals E and S respectively defining positive input terminals of a direct supply voltage Vdc and of positive output of a continuous voltage Vout and of a higher level than the voltage Vdc.
  • the voltages Vdc and Vout are, " in this example, referenced to a common ground M.
  • a switch K (generally a transistor N channel power MOS) connects midpoint 1, between inductance L and diode D, to ground M.
  • This switch K is controlled by a train of pulses supplied by an electronic control circuit 2 (CTRL) .
  • CTRL electronice control circuit 2
  • an energy storage capacitor C connects the terminals S and M in order to provide a stable voltage to a load 3 (Q) connected between the terminals S and M.
  • the capacitor C is sometimes omitted, either because a capacitor is included in load 3, either because it does not need a stable power supply.
  • the control pulse train of switch K can be a pulse train of fixed frequency and width modulated (PWM), a pulse train of fixed but frequency modulated duty cycle (PFM), or any other adjustable pulse train.
  • circuit 2 receives information REG relating to the output voltage Vout to enable the closing periods of the switch K to be controlled in order to maintain the desired voltage Vout.
  • a recurring problem of a step-up converter of the type represented in FIG. 1 is that in the event of a short circuit in the load 3, the current accumulated in the inductance is no longer controllable, which leads to a deterioration of that -this.
  • FIG. 1 A first known solution to overcome this phenomenon is shown in FIG. 1 and consists in providing a load shedding circuit consisting of a resistor in series with a switch Kd for short-circuiting the inductance at start-up and in the event of detection of short -circuit in the load.
  • a load shedding circuit can also directly short-circuit the association in series of the diode and the inductance.
  • FIG. 2 represents a second conventional example of control of a step-up converter making it possible to protect the inductance at the start of the circuit.
  • the switch K has been represented in the form of an N-channel OS transistor and the load Q has not been represented.
  • a P channel MOS transistor 4 is interposed between the cathode of the diode D and the terminal S (positive electrode of the capacitor C and / or of the load).
  • the gate of transistor 4 is connected by a switch SI either directly to the source 6 of transistor 4, or to a potential lower than this source, imposed by a Zener diode DZ.
  • the anode of the diode is polarized by a current source 5 connected, for example to ground.
  • Side switch K its grid is connected to point 1 by a Zener diode DZ2 in series with a switch S2 and to ground M by a Zener diode DZ3.
  • the role of the Zener DZ3 diode is to protect the switch K by limiting its gate voltage.
  • the role of the diode DZ2 is to impose a voltage difference between the point 1 and the gate of the transistor K when the switch S2 is closed.
  • a switch S3 in series with a diode D3 is interposed between the output of the circuit 2 'supplying the pulse train and the gate of the transistor K.
  • the switch S3 is closed, the switch S2 is open and the switch SI is in the position where it connects the gate of transistor 4 to the fixed potential by the diode DZ, which makes this transistor on.
  • the control of the switch K by means of a pulse train therefore takes place normally, causing successive charging and discharging phases of the inductance L in the capacitor C. In the event of a short circuit in the load (between terminals S and M), this must be detected by additional means (for example by monitoring by means of the signal REG entering the control circuit 2 'that the voltage Vout is canceled).
  • the circuit 2 ′ controls the opening of the switch S3 and the closing of the switch S2 so as to activate the active clipping stage of the gate voltage of the NMOS transistor K constituted by the diode DZ2.
  • a resistor R3 is provided connecting the gate of transistor K to ground so as to allow discharge.
  • a drawback of the protection circuit of Figure 2 is that it requires a particular sequence of switch control. In particular, the opening of transistor 4 ne 'must take place once the transistor K has been blocked by the opening of the switch S3 and the floor clipping has been put into operation by closing 1 switch S2.
  • Another drawback of the circuit of FIG. 2 is that the amount of energy stored in the inductor L is not controlled.
  • Another drawback is that such a circuit is relatively bulky by the number of auxiliary switches that it requires.
  • restarting the circuit generally requires a time delay from the detection of a problem.
  • the diode D is replaced by a transistor controlled by the circuit 2 (figure 1) or 2 '(figure 2) in order to make synchronous rectification and thus avoid the voltage drop of the diode D.
  • Summary of the The present invention aims to overcome all or part of the drawbacks of conventional converters.
  • the present invention aims to provide a short-circuit management circuit in a load supplied by a step-up converter, which overcomes the drawbacks of known solutions.
  • the invention aims in particular to reduce the number of switching elements necessary to minimize the surface area of silicon in an integrated embodiment.
  • the invention also aims to allow a simplification of the sequencing of the control of the protection switches used.
  • the invention also relates, in a preferred aspect, to simplify the detection of short circuit and more particu larly ⁇ to provide a protective element that can be independent of the main switch control circuit of the converter.
  • the invention also aims to automatically manage the energy stored in the inductive element as well as the precharging phase, thus limiting the current peaks.
  • the invention also aims to automatically control the restart following a problem.
  • the present invention provides a protection circuit for a step-up converter comprising a first switch with reverse input logic between a rectifying element in series with an inductor and an output terminal of the converter, comprising means for connecting the control electrode of the first switch to a first potential linked to the power supply potential of the inductor as long as the output voltage is below a threshold.
  • said means connect said control electrode to a potential lower than the potential of the switch, inductance side, as soon as said threshold is reached.
  • the circuit includes a circuit for selecting the highest potential between the supply voltage of the inductor and the voltage of the first switch on the inductance side.
  • the first switch is a P-channel MOS transistor or a PNP type bipolar transistor.
  • the control electrode of the first switch is connected to its power electrode on the inductance side, by a voltage source through a second switch.
  • the control electrode of the first switch is connected to ground via a second switch.
  • the rectifying element is a synchronous rectifying switch.
  • the present invention also provides a method of protecting a step-up converter comprising a first switch with reverse input logic between a rectifying element in series with an inductor and an output terminal of the converter, consisting in biasing the electrode.
  • the control electrode of the first switch receives a potential, lower than the potential of its power electrode on the inductance side, as soon as said threshold is reached.
  • the threshold corresponds to the supply voltage of the inductor.
  • the present invention also provides a voltage step-up converter provided with a protection circuit.
  • FIG. 3 schematically represents a first embodiment of a control and protection circuit of a step-up converter according to the invention
  • FIG. 4 represents a second embodiment of the invention applied to an autonomous protection circuit
  • Figure 5 illustrates the operation of the protection circuit of Figure 4
  • Figure 6 shows a practical embodiment of the protection circuit of Figure 4
  • FIG. 7 schematically represents a third embodiment of a control and protection circuit of a step-up converter with synchronous rectification according to the invention.
  • a feature of an embodiment of the present invention is to create an overvoltage on the output switch of the converter which is automatically canceled. More specifically, the invention provides for using a switch with reverse input logic (PP transistor or PMOS transistor) at the output of the converter and for controlling this switch independently of the main switch of the step-up converter.
  • PP transistor or PMOS transistor reverse input logic
  • this converter represents a first embodiment of a step-up converter according to the invention.
  • this converter comprises an inductance L in series with a rectifying element (for example a diode D) and a protection switch 4 between an input terminal E of application of a DC voltage Vdc and an output terminal S for supplying a higher output voltage Vout.
  • a load 3 (Q) is connected, if necessary in parallel with a capacitor C (not shown), between the terminal S and a ground terminal M, common or not with the ground of the input voltage.
  • a circuit 10 controls by pulse train a switching switch K connecting the anode 1 of the diode D to the ground M.
  • the transistor 4 (here a MOS transistor with channel P) is connectable, via a switch SU, either to a potential lower than its source 6, or to a potential corresponding to the input supply potential Vdc.
  • the SU switch connects the source 6 of the transistor 4 via a Zener diode DZ setting a voltage threshold between gate and source of the transistor 4 when the SU switch is connected to it (terminal NOT) .
  • the anode of the diode DZ (terminal N) is polarized, for example, by a current source 5. Any other voltage source imposing, between gate and source of the transistor 4, a voltage lower than its threshold voltage in order to make it passable is suitable.
  • the terminal N of the switch SU can correspond to the ground M rather than being connected to the source 6 of the transistor 4 by a diode DZ, if the transistor 4 supports a voltage Vgs close to the voltage Vout.
  • the other terminal CC of the switch SU intended to connect the gate to the positive potential of the voltage Vdc, is connected, for example to the terminal E via a switch S12.
  • the role of the switch S12 is to force the blocking of the transistor 4 when the circuit must be turned off.
  • the point of polarization of the gate of transistor 4 is always less than the output voltage in normal operation, but becomes greater than this output voltage at least in the event of a short circuit. At the start of the circuit, i.e. when the voltage
  • Vout is zero, switch S12 is closed and switch SU is in the CC position.
  • the transistor 4 is then on and the circuit 10 controls the switch K in a conventional manner.
  • the circuit 10 switches the switch SU towards the terminal N. This has the effect of keeping the transistor 4 in the on state but now being biased by the voltage difference between its gate and its source, fixed by the Zener diode DZ.
  • the switch S12 is indifferently left closed or open.
  • Another advantage of the invention is that it avoids a Zener diode device for active clipping.
  • Another advantage of the invention is that it facilitates the starting of the converter by introducing automatic protection thanks to the connection to the input voltage (for example, the voltage of a battery).
  • the fact that the transistor 4 leads to start-up avoids differentiating the start-up phase from a short circuit.
  • This advantage is important insofar as, as long as the voltage Vout has not started to increase, a conventional control circuit must distinguish this starting from a short-circuit. In particular, the use of a timer is thus avoided as would be the case in a conventional device (FIG. 2).
  • FIG. 4 represents a second preferred embodiment of a converter according to the invention.
  • the detection of short-circuit (or insufficient voltage Vout) is performed by a circuit 20 autonomous with respect to the control circuit 21 supplying the pulse train to the gate of the switch K.
  • the circuit 20 has two inputs A and B receiving respectively the source voltage 6 of the transistor 4 reduced by a voltage DZ and the supply voltage Vdc taken at point E of the assembly.
  • a MAX output (A, B) of circuit 20 is connected to the gate of transistor 4.
  • circuit 20 The function of circuit 20 is to provide the highest voltage of those present on its inputs A and B.
  • circuit 20 measures the voltage of the source 6 of the transistor 4 and supplies the voltage present on its input A as soon as the voltage of the source 6 becomes greater than the voltage Vdc.
  • An advantage of this embodiment is that it allows automatic detection of the short circuit by the circuit 20.
  • the control circuit 21 is then a conventional circuit which is satisfied with the pulse train control and the servo-control of this train of pulses with respect to the measurement of the output voltage (for example, a circuit such as circuit 2 in FIG. 1, without the control of the switch Kd).
  • FIG. 5 illustrates the operation of the circuit 20 of FIG. 4. It will however be noted that the same function can be performed by the circuit 10 of FIG.
  • FIG. 5 shows an example of the shape of several characteristic voltages of the circuit 20 as a function of time when the circuit is started.
  • the voltage Vout is shown in solid lines.
  • the voltage V6 of the source 6 of the transistor 4 is shown in dotted lines.
  • the gate control voltage Vg of transistor 4 is shown in dashed lines. For simplicity, we have neglected any voltage drops in the switches SU and S12 when they are on.
  • the circuit is switched off, no voltage is applied to terminal E.
  • the converter is energized.
  • the gate voltage of transistor 4 is then brought to the potential of terminal E (Vdc).
  • the voltage V6 of its source corresponds to the voltage Vdc (applied to the gate of the transistor) increased by a periodic overvoltage linked to the switching in the inductance.
  • the transistor 4 is then on and the energy transfer takes place towards the voltage Vout when the switch K is open at the rate of the train of control pulses.
  • the circuit 20 switches its output and now applies, to the gate of the transistor 4, the voltage V6 reduced by the value Vdz of the Zener diode and the overvoltage disappears.
  • the voltage Vout continues to increase until the level desired by the circuit 21 is reached (not shown in FIG. 5). The same operation occurs in the event of a decrease in the voltage Vout.
  • FIG. 6 represents a practical embodiment of the circuit 20 of FIG. 4.
  • the terminals A and B are respectively connected to the output terminal MAX (A, B) by two diodes DB and DA by their respective cathodes.
  • An advantage of the invention is that it manages all the current overloads (Vout less than Vdc) whatever its origin, whether it is an overload, a short circuit, or inrush current calls.
  • FIG. 7 represents a third embodiment of a control and protection circuit of a step-up converter applied to a synchronous rectification. Compared to the embodiment shown in FIG.
  • the diode D is replaced by a controlled transistor M by a circuit 21 '(CTRL) so as to operate a synchronous rectification and thus minimize the voltage drop between the terminals 1 and 6.
  • CTRL circuit 21 '(CTRL)
  • FIG. 7 the parasitic diodes D' and D4 of the transistors M 'and 4 have been shown, the transistors M 'and 4 being connected so that their respective parasitic diodes are in anti-series.
  • the gate of transistor M ' can be connected either directly to terminal 6, or to this same terminal 6 via a voltage source 31. These connections are obtained by means of two switches 32 and 33 respectively connecting the gate of transistor M 'at terminal 6 and this gate at a first terminal of the voltage source 31, the other terminal of which is connected to terminal 6.
  • the switches 32 and 33 are controlled inversely, an inverter 34 of a signal control unit supplied, for example, by an AND logic gate 35 being interposed between the control terminal of switch 33 and that of switch 32.
  • Logic gate 35 combines the inverse (inverter 36) of the control signal of the MOS switching transistor K with a signal, supplied by the circuit 21, indicating that the output voltage Vout is greater than a threshold.
  • the operation of the circuit of FIG. 7 is as follows.
  • the transistor M ' is turned on when the switch K is open (that is to say that the inductive element L discharges towards the output 6 and that the corresponding current is higher than a threshold TH).
  • the transistor M ' is blocked when the switch K is on or when the current (flowing in ' the supplied load) is lower than the threshold TH.
  • This threshold TH is chosen at a low value (ideally zero) so as to open the switch M 'when the inductor has no more current to discharge in the load.
  • the switch 32 is closed and the switch 33 is open.
  • the switch 33 is closed and the switch 34 is open so as to impose a voltage sufficient grid / source thanks to the voltage source 31 (for example a Zener diode of a few volts).
  • the above operation amounts to the fact that, when the output voltage Vout is less than a threshold, the transistor M 'operates as a diode.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)
  • Protection Of Static Devices (AREA)
  • Ac-Ac Conversion (AREA)

Abstract

The invention relates to protecting the inductance (L) of a voltage boost converter comprising a first inverse input logic cut-off switch (4) disposed between the inductance and the connection terminal (S) of a supplied load (3) whose control electrode is connectable, according to the output voltage, either to the inductance supply voltage (Vdc) or to the voltage which is lower than the voltage of the power electrode (6) of said first cut-off switch disposed on the inductance side.

Description

GESTION DU COURT-CIRCUIT DANS UNE INDUCTANCE D'UN CONVERTISSEUR ELEVATEUR DE TENSION MANAGEMENT OF THE SHORT-CIRCUIT IN AN INDUCTANCE OF A VOLTAGE-LIFTING CONVERTER
Domaine de l'invention La présente invention concerne de façon générale le domaine des convertisseurs d'énergie réalisé sous la forme de circuits électroniques à partir d'un élément inductif. L'inven- tion concerne plus particulièrement la gestion du démarrage de tels convertisseurs dans un agencement "de convertisseur élévateur de tension. Etat de l'art antérieur La figure 1 représente un premier exemple de schéma classique de convertisseur élévateur de tension du type auquel s'applique la présente invention. Un tel convertisseur est essentiellement constitué d'une inductance L en série avec une diode de redressement D entre deux bornes E et S définissant respectivement des bornes d'entrée positive d'une tension d'alimentation continue Vdc et de sortie positive d'une tension Vout continue et de niveau plus élevé que la tension Vdc. Les tensions Vdc et Vout sont," dans cet exemple, référencées à une masse commune M. Pour des besoins d'isolement galvanique, les masses d'entrée et de sortie peuvent toutefois être différentes. Pour effectuer la fonction d'élévation de tension, un interrupteur K (généralement un transistor MOS de puissance à canal N) relie le point milieu 1, entre l'inductance L et la diode D, à la masse M. Cet interrupteur K est commandé par un train d'impulsions fourni par un circuit électronique 2 (CTRL) de commande. Pendant les périodes où l'interrupteur K est fermé, de l'énergie est accumulée dans l'inductance L. Pendant les périodes où l'interrupteur K est ouvert, cette énergie est restituée par l'intermédiaire de la diode D en sortie du convertisseur. Le plus souvent, un condensateur C de stockage d'énergie relie les bornes S et M afin de fournir une tension stable à une charge 3 (Q) connectée entre les bornes S et M. Le condensateur C est parfois omis, soit parce qu'un condensateur est inclus dans la charge 3, soit parce que celle-ci n'a pas besoin d'alimentation stable. Le train d'impulsions de commande de l'interrupteur K peut être un train d'impulsions de fréquence fixe et modulé en largeur (PWM) , un train d' impulsions de rapport cyclique fixe mais modulé en fréquence (PFM) , ou tout autre train d'impulsions réglable. Généralement, le circuit 2 reçoit une information REG relative à la tension de sortie Vout pour permettre d'asservir les périodes de fermeture de l'interrupteur K afin de maintenir la tension Vout souhaitée. Un problème récurrent d'un convertisseur élévateur du type de celui représenté en figure 1 est qu'en cas de court- circuit dans la charge 3, le courant accumulé dans l'inductance n'est plus contrôlable, ce qui entraîne une détérioration de celle-ci. Une première solution connue pour pallier ce phénomène est représentée en figure 1 et consiste à prévoir un circuit de délestage constitué d'une résistance en série avec un inter- rupteur Kd pour court-circuiter l'inductance au démarrage et en cas de détection de court-circuit dans la charge. Un tel circuit de délestage peut également court-circuiter directement l'association en série de la diode et de l'inductance. Au démarrage du convertisseur ou plus généralement quand la tension Vout est inférieure à la tension Vdc - ce que mesure le circuit de commande 2 - l'interrupteur Kd est fermé de façon permanente et l'interrupteur K reste ouvert. Cela permet de charger le condensateur C de sortie pour que la tension Vout commence à augmenter. Si le circuit de commande 2 ne détecte pas d'augmentation de la tension Vout, il peut alors se mettre dans un état d'alarme au bout d'un certain temps dans la mesure où cela signifie un court-circuit côté charge. Un inconvénient notable de cette solution est que la résistance entraîne une dissipation élevée dans le circuit et pose des problèmes d'intégration et d'encombrement. La figure 2 représente un deuxième exemple classique de commande d'un convertisseur élévateur permettant de protéger l'inductance au démarrage du circuit. Dans l'exemple de la figure 2, l'interrupteur K a été représenté sous la forme d'un transistor OS à canal N et la charge Q n'a pas été représentée. Selon cet exemple, un transistor MOS à canal P 4 est intercalé entre la cathode de la diode D et la borne S (électrode positive du condensateur C et/ou de la charge) . La grille du transistor 4 est reliée par un interrupteur SI soit directement à la source 6 du transistor 4, soit à un potentiel inférieur à cette source, imposé par une diode Zener DZ. En pratique, l'anode de la diode est polarisée par une source de courant 5 reliée, par exemple à la masse. Côté interrupteur K, sa grille est connectée au point 1 par une diode Zener DZ2 en série avec un interrupteur S2 et à la masse M par une diode Zener DZ3. Le rôle de la diode Zener DZ3 est de protéger l'interrupteur K en limitant sa tension de grille. Le rôle de la diode DZ2 est d'imposer une différence de tension entre le point 1 et la grille du transistor K lorsque l'interrupteur S2 est fermé. Enfin, un interrupteur S3 en série avec une diode D3 est intercalé entre la sortie du circuit 2 ' fournissant le train d'impulsions et la grille du transistor K. En fonctionnement normal, l'interrupteur S3 est fermé, l'interrupteur S2 est ouvert et l'interrupteur SI est dans la position où il relie la grille du transistor 4 au potentiel fixé par la diode DZ, ce qui rend ce transistor passant. La commande de l'interrupteur K au moyen d'un train d'impulsions s'effectue donc normalement provoquant des phases de charges et décharges successives de l'inductance L dans le condensateur C. En cas de court-circuit dans la charge (entre les bornes S et M) , celui-ci doit être détecté par des moyens annexes (par exemple en surveillant au moyen du signal REG entrant dans le circuit de commande 2' que la tension Vout s'annule). Une fois le court-circuit détecté, le circuit 2' commande l'ouverture du commutateur S3 et la fermeture du commutateur S2 de façon à mettre en service l'étage d'écrêtage actif de la tension de grille du transistor NMOS K constitué par la diode DZ2. En pratique, on prévoit une résistance R3 reliant la grille du transistor K à la masse de façon à en permettre la décharge. Une fois la grille du transistor K protégée, le circuit 2 ' provoque la commutation de 1 ' interrupteur Si pour court-circuiter ses grille et source afin d'en provoquer l'ouverture. L'ouverture du transistor 4 isole l'inductance L du reste du circuit, donc du court-circuit . En l'absence de la diode DZ2, cette ouverture provoquerait une surtension entre grille et source du transistor K. Cette surtension est ici évitée grâce à la diode DZ2 qui écrête la tension entre grille et drain du transistor K. Un inconvénient du circuit de protection de la figure 2 est qu'il requiert une séquence particulière de commande des interrupteurs. En particulier, l'ouverture du transistor 4 ne' doit intervenir qu'une fois que le transistor K a été bloqué par l'ouverture de l'interrupteur S3 et que l'étage d'écrêtage a été mis en service par la fermeture de 1 ' interrupteur S2. Un autre inconvénient du circuit de la figure 2 est que la quantité d'énergie stockée dans l'inductance L n'est pas contrôlée . Un autre inconvénient est qu'un tel circuit est relativement encombrant par le nombre de commutateurs annexes qu'il nécessite. Un autre inconvénient est que le redémarrage du circuit nécessite généralement une temporisation à partir de la détection d'un problème. Dans certains cas, la diode D est remplacée par un transistor commandé par le circuit 2 (figure 1) ou 2' (figure 2) afin de faire du redressement synchrone et éviter ainsi la chute de tension de la diode D. Résumé de l'invention La présente invention vise à pallier tout ou partie des inconvénients des convertisseurs classiques. La présente invention vise à proposer un circuit de gestion des courts-circuits dans une charge alimentée par un convertisseur élévateur, qui pallie les inconvénients des solutions connues. L'invention vise notamment à réduire le nombre d'éléments de commutation nécessaires pour minimiser la surface de silicium dans une réalisation intégrée. L'invention vise également à permettre une simplification du séquencement de la commande des interrupteurs de protection utilisés. L'invention vise également, dans un aspect préféré, à simplifier la détection du court-circuit et plus particu¬ lièrement à proposer un élément de protection qui puisse être indépendant du circuit de commande de l'interrupteur principal du convertisseur. L'invention vise également à gérer automatiquement l'énergie stockée dans l'élément inductif ainsi que la phase de précharge, limitant ainsi les pics de courant. L'invention vise également à contrôler automatiquement le redémarrage suite à un problème. Pour atteindre tout ou partie de ces objets ainsi que d'autres, la présente invention prévoit un circuit de protection d'un convertisseur élévateur de tension comportant un premier interrupteur à logique d'entrée inversée entre un élément de redressement en série avec une inductance et une borne de sortie du convertisseur, comportant des moyens pour connecter l'électrode de commande du premier interrupteur à un premier potentiel lié au potentiel d'alimentation de l'inductance tant que la tension de sortie est inférieure à un seuil. Selon un mode de réalisation de la présente invention, lesdits moyens connectent ladite électrode de commande à un potentiel inférieur au potentiel de l'interrupteur, côté inductance, dès que ledit seuil est atteint . Selon un mode de réalisation de la présente invention, le circuit comporte un circuit de sélection du potentiel le plus élevé entre la tension d'alimentation de l'inductance et la tension du premier interrupteur côté inductance. Selon un mode de réalisation de la présente invention, le premier interrupteur est un transistor MOS à canal P ou un transistor bipolaire de type PNP. Selon un mode de réalisation de la présente invention, l'électrode de commande du premier interrupteur est reliée à son électrode de puissance côté inductance, par une source de tension au travers d'un deuxième commutateur. Selon un mode de réalisation de la présente invention, l'électrode de commande du premier interrupteur est reliée à la masse par l'intermédiaire d'un deuxième commutateur. Selon un mode de réalisation de la présente invention, l'élément de redressement est un interrupteur de redressement synchrone. La présente invention prévoit également un procédé de protection d'un convertisseur élévateur de tension comprenant un premier interrupteur à logique d'entrée inversée entre un élément de redressement en série avec une inductance et une borne de sortie du convertisseur, consistant à polariser l'électrode de commande du premier interrupteur au moyen d'un poten¬ tiel fixe lié au potentiel d'alimentation de l'inductance tant que la tension de sortie est inférieure à un seuil. Selon un mode de mise en oeuvre de la présente invention, l'électrode de commande du premier interrupteur reçoit un potentiel, inférieur au potentiel de son électrode de puissance côté inductance, dès que ledit seuil est atteint. Selon un mode de mise en oeuvre de la présente invention, le seuil correspond à la tension d'alimentation de 1 'inductance . La présente invention prévoit également un convertisseur élévateur de tension pourvu d'un circuit de protection. Brève description des dessins Ces objets, caractéristiques et avantages, ainsi que d' autres de la présente invention seront exposés en détail dans la description suivante de modes de réalisation particuliers faite à titre non-limitatif en relation avec les figures jointes parmi lesquelles : les figures 1 et 2 qui ont décrites précédemment sont destinées à exposer l'état de la technique et le problème posé ; la figure 3 représente, de façon schématique, un premier mode de réalisation d'un circuit de commande et de protection d'un convertisseur élévateur selon l'invention ; la figure 4 représente un deuxième mode de réalisation de l'invention appliqué à un circuit de protection autonome ; la figure 5 illustre le fonctionnement du circuit de protection de la figure 4 ; la figure 6 représente un exemple de réalisation pratique du circuit de protection de la figure 4 ; et la figure 7 représente, de façon schématique, un troisième mode de réalisation d'un circuit de commande et de protection d'un convertisseur élévateur à redressement synchrone selon 1 'invention. Description détaillée Les mêmes éléments ont été désignés par les mêmes références aux différentes figures. Pour des raisons de clarté, seuls les éléments qui sont nécessaires à la compréhension de l'invention ont été représentés aux figures et seront décrits par la suite. En particulier, les détails constitutifs du circuit de commande générant le train d'impulsions destiné à un inter¬ rupteur principal du convertisseur élévateur ainsi que l'asservissement de ce signal de commande n'ont pas été détaillés, l'invention étant compatible avec tout circuit classique de commande par train d'impulsions. Une caractéristique d'un mode de réalisation de la présente invention est de créer une surtension sur l'interrupteur de sortie du convertisseur qui s'annule automatiquement. Plus précisément, l'invention prévoit d'utiliser un interrupteur à logique d'entrée inversée (transistor P P ou transistor PMOS) en sortie du convertisseur et de commander cet interrupteur indépendamment de l'interrupteur principal du convertisseur élévateur. La figure 3 représente un premier mode de réalisation d'un convertisseur élévateur selon l'invention. Comme précédemment, ce convertisseur comporte une inductance L en série avec un élément de redressement (par exemple une diode D) et un interrupteur 4 de protection entre une borne d'entrée E d'application d'une tension continue Vdc et une borne de sortie S de fourniture d'une tension de sortie Vout plus élevée. Une charge 3 (Q) est connectée, le cas échéant en parallèle avec un condensateur C (non représenté) , entre la borne S et une borne de masse M, commune ou non avec la masse de la tension d'entrée. Un circuit 10 (CTRL) commande par train d'impulsions un interrupteur K de découpage reliant l'anode 1 de la diode D à la masse M. Selon un mode de réalisation de la présente invention, le transistor 4 (ici un transistor MOS à canal P) est connectable, par l'intermédiaire d'un commutateur SU, soit à un potentiel inférieur à sa source 6, soit à un potentiel correspondant au potentiel d'alimentation d'entrée Vdc. Dans l'exemple représenté en figure 3, le commutateur SU relie la source 6 du transistor 4 par l'intermédiaire d'une diode Zener DZ fixant un seuil de tension entre grille et source du transistor 4 quand le commutateur SU y est raccordé (borne N) . En pratique, l'anode de la diode DZ (borne N) est polarisée, par exemple, par une source de courant 5. Tout autre source de tension imposant, entre grille et source du transistor 4, une tension inférieure à sa tension de seuil afin de le rendre passant convient. En variante, la borne N de l'interrupteur SU peut correspondre à la masse M plutôt qu'être reliée à la source 6 du transistor 4 par une diode DZ, si le transistor 4 supporte une tension Vgs voisine de la tension Vout. L'autre borne CC du commutateur SU, destinée à relier la grille au potentiel positif de la tension Vdc, est connectée, par exemple à la borne E par l'intermédiaire d'un interrupteur S12. Le rôle de l'interrupteur S12 est de forcer le blocage du transistor 4 lorsque le circuit doit être éteint. Selon un mode de réalisation de la présente invention, le point de polarisation de la grille du transistor 4 est toujours inférieur à la tension de sortie en fonctionnement normal, mais devient supérieure à cette tension de sortie au moins en cas de court-circuit . Au démarrage du circuit, c'est-à-dire quand la tensionField of the Invention The present invention relates generally to the field of energy converters produced in the form of electronic circuits from an inductive element. The invention relates more particularly to the management of the starting of such converters in an arrangement "of step-up converter. State of the prior art FIG. 1 represents a first example of a conventional diagram of step-up converter of the type to which s This converter essentially consists of an inductance L in series with a rectifying diode D between two terminals E and S respectively defining positive input terminals of a direct supply voltage Vdc and of positive output of a continuous voltage Vout and of a higher level than the voltage Vdc. The voltages Vdc and Vout are, " in this example, referenced to a common ground M. For galvanic isolation requirements, the input masses and output may be different. To perform the voltage rise function, a switch K (generally a transistor N channel power MOS) connects midpoint 1, between inductance L and diode D, to ground M. This switch K is controlled by a train of pulses supplied by an electronic control circuit 2 (CTRL) . During the periods when the switch K is closed, energy is accumulated in the inductor L. During the periods when the switch K is open, this energy is restored via the diode D at the output of the converter . Most often, an energy storage capacitor C connects the terminals S and M in order to provide a stable voltage to a load 3 (Q) connected between the terminals S and M. The capacitor C is sometimes omitted, either because a capacitor is included in load 3, either because it does not need a stable power supply. The control pulse train of switch K can be a pulse train of fixed frequency and width modulated (PWM), a pulse train of fixed but frequency modulated duty cycle (PFM), or any other adjustable pulse train. Generally, circuit 2 receives information REG relating to the output voltage Vout to enable the closing periods of the switch K to be controlled in order to maintain the desired voltage Vout. A recurring problem of a step-up converter of the type represented in FIG. 1 is that in the event of a short circuit in the load 3, the current accumulated in the inductance is no longer controllable, which leads to a deterioration of that -this. A first known solution to overcome this phenomenon is shown in FIG. 1 and consists in providing a load shedding circuit consisting of a resistor in series with a switch Kd for short-circuiting the inductance at start-up and in the event of detection of short -circuit in the load. Such a load shedding circuit can also directly short-circuit the association in series of the diode and the inductance. At the start of the converter or more generally when the voltage Vout is lower than the voltage Vdc - what measures control circuit 2 - switch Kd is permanently closed and switch K remains open. This charges the output capacitor C so that the voltage Vout begins to increase. If the control circuit 2 does not detect an increase in the voltage Vout, it can then go into an alarm state after a certain time since this means a short circuit on the load side. A notable drawback of this solution is that the resistance causes high dissipation in the circuit and poses problems of integration and bulk. FIG. 2 represents a second conventional example of control of a step-up converter making it possible to protect the inductance at the start of the circuit. In the example of FIG. 2, the switch K has been represented in the form of an N-channel OS transistor and the load Q has not been represented. According to this example, a P channel MOS transistor 4 is interposed between the cathode of the diode D and the terminal S (positive electrode of the capacitor C and / or of the load). The gate of transistor 4 is connected by a switch SI either directly to the source 6 of transistor 4, or to a potential lower than this source, imposed by a Zener diode DZ. In practice, the anode of the diode is polarized by a current source 5 connected, for example to ground. Side switch K, its grid is connected to point 1 by a Zener diode DZ2 in series with a switch S2 and to ground M by a Zener diode DZ3. The role of the Zener DZ3 diode is to protect the switch K by limiting its gate voltage. The role of the diode DZ2 is to impose a voltage difference between the point 1 and the gate of the transistor K when the switch S2 is closed. Finally, a switch S3 in series with a diode D3 is interposed between the output of the circuit 2 'supplying the pulse train and the gate of the transistor K. In normal operation, the switch S3 is closed, the switch S2 is open and the switch SI is in the position where it connects the gate of transistor 4 to the fixed potential by the diode DZ, which makes this transistor on. The control of the switch K by means of a pulse train therefore takes place normally, causing successive charging and discharging phases of the inductance L in the capacitor C. In the event of a short circuit in the load (between terminals S and M), this must be detected by additional means (for example by monitoring by means of the signal REG entering the control circuit 2 'that the voltage Vout is canceled). Once the short circuit has been detected, the circuit 2 ′ controls the opening of the switch S3 and the closing of the switch S2 so as to activate the active clipping stage of the gate voltage of the NMOS transistor K constituted by the diode DZ2. In practice, a resistor R3 is provided connecting the gate of transistor K to ground so as to allow discharge. Once the gate of the transistor K protected, the circuit 2 'causes the switching of the switch Si to short-circuit its gate and source in order to cause its opening. The opening of the transistor 4 isolates the inductance L from the rest of the circuit, therefore from the short circuit. In the absence of the diode DZ2, this opening would cause an overvoltage between gate and source of the transistor K. This overvoltage is here avoided thanks to the diode DZ2 which clips the voltage between gate and drain of the transistor K. A drawback of the protection circuit of Figure 2 is that it requires a particular sequence of switch control. In particular, the opening of transistor 4 ne 'must take place once the transistor K has been blocked by the opening of the switch S3 and the floor clipping has been put into operation by closing 1 switch S2. Another drawback of the circuit of FIG. 2 is that the amount of energy stored in the inductor L is not controlled. Another drawback is that such a circuit is relatively bulky by the number of auxiliary switches that it requires. Another disadvantage is that restarting the circuit generally requires a time delay from the detection of a problem. In some cases, the diode D is replaced by a transistor controlled by the circuit 2 (figure 1) or 2 '(figure 2) in order to make synchronous rectification and thus avoid the voltage drop of the diode D. Summary of the The present invention aims to overcome all or part of the drawbacks of conventional converters. The present invention aims to provide a short-circuit management circuit in a load supplied by a step-up converter, which overcomes the drawbacks of known solutions. The invention aims in particular to reduce the number of switching elements necessary to minimize the surface area of silicon in an integrated embodiment. The invention also aims to allow a simplification of the sequencing of the control of the protection switches used. The invention also relates, in a preferred aspect, to simplify the detection of short circuit and more particu larly ¬ to provide a protective element that can be independent of the main switch control circuit of the converter. The invention also aims to automatically manage the energy stored in the inductive element as well as the precharging phase, thus limiting the current peaks. The invention also aims to automatically control the restart following a problem. To achieve all or part of these and other objects, the present invention provides a protection circuit for a step-up converter comprising a first switch with reverse input logic between a rectifying element in series with an inductor and an output terminal of the converter, comprising means for connecting the control electrode of the first switch to a first potential linked to the power supply potential of the inductor as long as the output voltage is below a threshold. According to an embodiment of the present invention, said means connect said control electrode to a potential lower than the potential of the switch, inductance side, as soon as said threshold is reached. According to an embodiment of the present invention, the circuit includes a circuit for selecting the highest potential between the supply voltage of the inductor and the voltage of the first switch on the inductance side. According to an embodiment of the present invention, the first switch is a P-channel MOS transistor or a PNP type bipolar transistor. According to an embodiment of the present invention, the control electrode of the first switch is connected to its power electrode on the inductance side, by a voltage source through a second switch. According to an embodiment of the present invention, the control electrode of the first switch is connected to ground via a second switch. According to an embodiment of the present invention, the rectifying element is a synchronous rectifying switch. The present invention also provides a method of protecting a step-up converter comprising a first switch with reverse input logic between a rectifying element in series with an inductor and an output terminal of the converter, consisting in biasing the electrode. for controlling the first switch by means of a fixed poten ¬ linked to the power supply potential of the inductor as long as the output voltage is below a threshold. According to an embodiment of the present invention, the control electrode of the first switch receives a potential, lower than the potential of its power electrode on the inductance side, as soon as said threshold is reached. According to an embodiment of the present invention, the threshold corresponds to the supply voltage of the inductor. The present invention also provides a voltage step-up converter provided with a protection circuit. BRIEF DESCRIPTION OF THE DRAWINGS These objects, characteristics and advantages, as well as others of the present invention will be explained in detail in the following description of particular embodiments given without limitation in relation to the attached figures, among which: the figures 1 and 2 which have described previously are intended to expose the state of the art and the problem posed; FIG. 3 schematically represents a first embodiment of a control and protection circuit of a step-up converter according to the invention; FIG. 4 represents a second embodiment of the invention applied to an autonomous protection circuit; Figure 5 illustrates the operation of the protection circuit of Figure 4; Figure 6 shows a practical embodiment of the protection circuit of Figure 4; and FIG. 7 schematically represents a third embodiment of a control and protection circuit of a step-up converter with synchronous rectification according to the invention. Detailed description The same elements have been designated by the same references in the different figures. For reasons of clarity, only the elements which are necessary for understanding the invention have been shown in the figures and will be described later. In particular, the details of the circuit command generating the pulse train for an inter ¬ main breaker of the boost converter and that the control of this control signal has not been detailed, the invention being compatible with any conventional control circuit with the process of pulses. A feature of an embodiment of the present invention is to create an overvoltage on the output switch of the converter which is automatically canceled. More specifically, the invention provides for using a switch with reverse input logic (PP transistor or PMOS transistor) at the output of the converter and for controlling this switch independently of the main switch of the step-up converter. FIG. 3 represents a first embodiment of a step-up converter according to the invention. As before, this converter comprises an inductance L in series with a rectifying element (for example a diode D) and a protection switch 4 between an input terminal E of application of a DC voltage Vdc and an output terminal S for supplying a higher output voltage Vout. A load 3 (Q) is connected, if necessary in parallel with a capacitor C (not shown), between the terminal S and a ground terminal M, common or not with the ground of the input voltage. A circuit 10 (CTRL) controls by pulse train a switching switch K connecting the anode 1 of the diode D to the ground M. According to one embodiment of the present invention, the transistor 4 (here a MOS transistor with channel P) is connectable, via a switch SU, either to a potential lower than its source 6, or to a potential corresponding to the input supply potential Vdc. In the example shown in Figure 3, the SU switch connects the source 6 of the transistor 4 via a Zener diode DZ setting a voltage threshold between gate and source of the transistor 4 when the SU switch is connected to it (terminal NOT) . In practice, the anode of the diode DZ (terminal N) is polarized, for example, by a current source 5. Any other voltage source imposing, between gate and source of the transistor 4, a voltage lower than its threshold voltage in order to make it passable is suitable. As a variant, the terminal N of the switch SU can correspond to the ground M rather than being connected to the source 6 of the transistor 4 by a diode DZ, if the transistor 4 supports a voltage Vgs close to the voltage Vout. The other terminal CC of the switch SU, intended to connect the gate to the positive potential of the voltage Vdc, is connected, for example to the terminal E via a switch S12. The role of the switch S12 is to force the blocking of the transistor 4 when the circuit must be turned off. According to an embodiment of the present invention, the point of polarization of the gate of transistor 4 is always less than the output voltage in normal operation, but becomes greater than this output voltage at least in the event of a short circuit. At the start of the circuit, i.e. when the voltage
Vout est nulle, l'interrupteur S12 est fermé et l'interrupteur SU est sur la position CC. Le transistor 4 est alors passant et le circuit 10 commande l'interrupteur K de façon classique. Dès que la tension Vout (dans cet exemple, détectée par l'intermédiaire du signal REG) devient supérieure à un seuil prédéterminé (par exemple, supérieure à la tension Vdc) , le circuit 10 commute l'interrupteur SU vers la borne N. Cela a pour effet de maintenir le transistor 4 à l'état passant mais en étant désormais polarisé par la différence de tension entre sa grille et sa source, fixée par la diode Zener DZ. L'interrupteur S12 est indifféremment laissé fermé ou ouvert . En cas de court-circuit dans la charge Q ou plus généralement dès que la tension Vout devient inférieure au seuil fixée dans le circuit 10, ce dernier commande le basculement du commutateur SU vers la borne CC (et la fermeture du commutateur S12 s'il avait été ouvert précédemment). Le transistor MOS 4 reste donc conducteur et permet le transfert de l'énergie emmagasinée dans l'inductance L avant le court-circuit à travers la charge. En effet, la surtension aux bornes de l'inductance L impose une tension supérieure sur la source 6 du transistor MOS 4 par rapport à la tension d'entrée E, ce qui assure sa mise en conduction le temps d'évacuer l'énergie de l'inductance. De ce qui précède, il ressort que l'état de l'interrupteur K au moment où l'interrupteur SU commute n'a pas d'importance. Ainsi, le sequencement est plus simple que dans un circuit à écrêtage actif tel que décrit précédemment en relation avec la figure 2. Un autre avantage de l'invention est qu'elle évite un dispositif à diodes Zener pour l' écrêtage actif. Un autre avantage de l'invention est qu'elle facilite le démarrage du convertisseur en introduisant une protection automatique grâce à la connexion à la tension d'entrée (par exemple, la tension d'une batterie) . Le fait que le transistor 4 conduise au démarrage évite de différencier la phase de démarrage d'un court-circuit. Cet avantage est important dans la mesure où, tant que la tension Vout n'a pas commencé à croître, un circuit de commande classique doit distinguer ce démarrage d'un court-circuit. En particulier, on évite alors le recours à un temporisateur comme ce serait le cas dans un dispositif classique (figure 2) . Un autre avantage de la présente invention est que, plus généralement qu'une simple protection contre les courts- circuits, elle permet une gestion automatique de la décharge d'énergie de l'inductance, le commutateur SU étant commuté vers le point N dès que la tension Vout a atteint un niveau suffisant . La figure 4 représente un deuxième mode de réalisation préféré d'un convertisseur selon l'invention. Par rapport au convertisseur de la figure 3, la détection de court-circuit (ou de tension Vout insuffisante) est effectuée par un circuit 20 autonome par rapport au circuit de commande 21 fournissant le train d'impulsions à la grille de l'interrupteur K. le circuit 20 comporte deux entrées A et B recevant respectivement la tension de source 6 du transistor 4 diminuée d'une tension DZ et la tension d'alimentation Vdc prélevée au point E du montage. Une sortie MAX (A, B) du circuit 20 est connectée à la grille du transistor 4. La fonction du circuit 20 est de fournir la tension la plus élevée de celles présentes sur ses entrées A et B. En pratique, le circuit 20 mesure la tension de la source 6 du transistor 4 et fournit la tension présente sur son entrée A dès que la tension de la source 6 devient supérieure à la tension Vdc. Un avantage de ce mode de réalisation est qu'il permet une détection automatique du court-circuit par le circuit 20. Le circuit 21 de commande est alors un circuit classique se contentant de la commande par train d'impulsions et de l'asservissement de ce train d'impulsions par rapport à la mesure de la tension de sortie (par exemple, un circuit tel que le circuit 2 de la figure 1, dépourvu de la commande de l'interrupteur Kd) . La figure 5 illustre le fonctionnement du circuit 20 de la figure 4. On notera toutefois que la même fonction peut être réalisée par le circuit 10 de la figure 3 en exploitant une mesure de tension de sortie sur la borne REG. La figure 5 représente un exemple d'allure de plusieurs tensions caractéristiques du circuit 20 en fonction du temps lors d'un démarrage du circuit. La tension Vout est représentée en trait plein. La tension V6 de la source 6 du transistor 4 est représentée en pointillés. La tension Vg de commande de grille du transistor 4 est représentée en traits mixtes . Pour simplifier, on a négligé les éventuelles chutes de tension dans les commutateurs SU et S12 lorsqu'ils sont passants. Initialement, le circuit est éteint, aucune tension n'est appliquée sur la borne E. A un instant tO, le convertisseur est mis sous tension. La tension de grille du transistor 4 est alors portée au potentiel de la borne E (Vdc) . La tension V6 de sa source correspond à la tension Vdc (appliquée sur la grille du transistor) augmentée d'une surtension périodique liée à la commutation dans l'inductance. Le transistor 4 est alors passant et le transfert d'énergie s'effectue vers la tension Vout quand l'interrupteur K est ouvert au rythme du train d'impulsions de commande. A un instant t2 où la tension V6 atteint le niveau Vdc, le circuit 20 bascule sa sortie et applique désormais, sur la grille du transistor 4, la tension V6 diminuée de la valeur Vdz de la diode Zener et la surtension disparaît. La tension Vout continue à augmenter jusqu'à ce que le niveau souhaité par le circuit 21 soit atteint (non représenté en figure 5) . Le même fonctionnement se produit en cas de décroissance de la tension Vout . Dès que la tension V6 devient infé- rieure à la tension Vdc, le transistor 4 devient commandé par cette tension Vdc. La figure 6 représente un exemple de réalisation pratique du circuit 20 de la figure 4. Les bornes A et B sont respectivement reliées à la borne de sortie MAX (A, B) par deux diodes DB et DA par leurs cathodes respectives. Un avantage de l'invention est qu'elle gère toutes les surcharges en courant (Vout inférieur à Vdc) quelle qu'en soit l'origine, qu'il s'agisse d'une surcharge, d'un court-circuit, ou des appels de courant au démarrage (inrush) . La figure 7 représente un troisième mode de réalisation d'un circuit de commande et de protection d'un convertisseur élévateur de tension appliqué à un redressement synchrone . Par rapport au mode de réalisation représenté en figure 4, la diode D est remplacée par un transistor M commandé par un circuit 21' (CTRL) de façon à opérer un redressement synchrone et minimiser ainsi la chute de tension entre les bornes 1 et 6. En figure 7, les diodes parasites D' et D4 des transistors M' et 4 ont été représentées, les transistors M' et 4 étant connectés de sorte que leurs diodes parasites respectives soient en anti-série. La grille du transistor M' est connectable soit directement à la borne 6, soit à cette même borne 6 par l'intermédiaire d'une source de tension 31. Ces connexions sont obtenues au moyen de deux interrupteurs 32 et 33 reliant respectivement la grille du transistor M' à la borne 6 et cette grille à une première borne de la source de tension 31 dont l'autre borne est reliée à la borne 6. Les interrupteurs 32 et 33 sont commandés de façon inverse, un inverseur 34 d'un signal de commande fourni, par exemple, par une porte logique ET 35 étant intercalé entre la borne de commande de l'interrupteur 33 et celle de l'interrupteur 32. La porte logique 35 combine l'inverse (inverseur 36) du signal de commande du transistor MOS K de découpage avec un signal, fourni par le circuit 21, indicateur que la tension de sortie Vout est supérieure à un seuil. Le fonctionnement du circuit de la figure 7 est le suivant. Le transistor M' est rendu passant quand l'interrupteur K est ouvert (c'est-à-dire que l'élément inductif L se décharge vers la sortie 6 et que le courant correspondant est supérieur à un seuil TH) . Le transistor M' est bloqué quand l'interrupteur K est passant ou quand le courant (circulant dans ' la charge alimentée) est inférieur au seuil TH. Ce seuil TH est choisi à une valeur faible (idéalement zéro) de façon à ouvrir l'interrupteur M' lorsque l'inductance n'a plus de courant à décharger dans la charge. Pour bloquer le transistor M', l'interrupteur 32 est fermé et l'interrupteur 33 est ouvert. A l'inverse, pour le rendre passant, l'interrupteur 33 est fermé et l'interrupteur 34 est ouvert de façon à imposer une tension grille/source suffisante grâce à la source de tension 31 (par exemple une diode Zener de quelques volts) . Le fonctionnement ci-dessus revient à ce que, quand la tension de sortie Vout est inférieure à un seuil, le transistor M' fonctionne en diode. Quand la tension Vout est supérieure à ce seuil et que le circuit est en fonctionnement normal (hors démarrage ou protection opérée par le circuit 20), le transistor M' est rendu passant. Bien entendu, la présente invention est susceptible de diverses variantes et modifications qui apparaîtront à l'homme de l'art. En particulier, le dimensionnement de la diode ZenerVout is zero, switch S12 is closed and switch SU is in the CC position. The transistor 4 is then on and the circuit 10 controls the switch K in a conventional manner. As soon as the voltage Vout (in this example, detected by means of the signal REG) becomes greater than a predetermined threshold (for example, greater than the voltage Vdc), the circuit 10 switches the switch SU towards the terminal N. This has the effect of keeping the transistor 4 in the on state but now being biased by the voltage difference between its gate and its source, fixed by the Zener diode DZ. The switch S12 is indifferently left closed or open. In the event of a short circuit in the load Q or more generally as soon as the voltage Vout falls below the threshold fixed in the circuit 10, the latter commands the switching of the switch SU towards the terminal CC (and the closing of the switch S12 if it had been opened previously). The MOS transistor 4 therefore remains conductive and allows the transfer of the energy stored in the inductor L before the short circuit through the load. Indeed, the overvoltage across the inductance L imposes a higher voltage on the source 6 of the MOS transistor 4 compared to the input voltage E, which ensures its conduction the time to drain the energy of the inductor. From the above, it appears that the state of the switch K at the time when the switch SU switches does not matter. Thus, the sequencing is simpler than in an active clipping circuit as described above in relation to FIG. 2. Another advantage of the invention is that it avoids a Zener diode device for active clipping. Another advantage of the invention is that it facilitates the starting of the converter by introducing automatic protection thanks to the connection to the input voltage (for example, the voltage of a battery). The fact that the transistor 4 leads to start-up avoids differentiating the start-up phase from a short circuit. This advantage is important insofar as, as long as the voltage Vout has not started to increase, a conventional control circuit must distinguish this starting from a short-circuit. In particular, the use of a timer is thus avoided as would be the case in a conventional device (FIG. 2). Another advantage of the present invention is that, more generally than a simple short-circuit protection, it allows automatic management of the energy discharge of the inductor, the switch SU being switched to the point N as soon as the voltage Vout has reached a sufficient level. FIG. 4 represents a second preferred embodiment of a converter according to the invention. Compared to the converter of figure 3, the detection of short-circuit (or insufficient voltage Vout) is performed by a circuit 20 autonomous with respect to the control circuit 21 supplying the pulse train to the gate of the switch K. the circuit 20 has two inputs A and B receiving respectively the source voltage 6 of the transistor 4 reduced by a voltage DZ and the supply voltage Vdc taken at point E of the assembly. A MAX output (A, B) of circuit 20 is connected to the gate of transistor 4. The function of circuit 20 is to provide the highest voltage of those present on its inputs A and B. In practice, circuit 20 measures the voltage of the source 6 of the transistor 4 and supplies the voltage present on its input A as soon as the voltage of the source 6 becomes greater than the voltage Vdc. An advantage of this embodiment is that it allows automatic detection of the short circuit by the circuit 20. The control circuit 21 is then a conventional circuit which is satisfied with the pulse train control and the servo-control of this train of pulses with respect to the measurement of the output voltage (for example, a circuit such as circuit 2 in FIG. 1, without the control of the switch Kd). FIG. 5 illustrates the operation of the circuit 20 of FIG. 4. It will however be noted that the same function can be performed by the circuit 10 of FIG. 3 by exploiting an output voltage measurement on the terminal REG. FIG. 5 shows an example of the shape of several characteristic voltages of the circuit 20 as a function of time when the circuit is started. The voltage Vout is shown in solid lines. The voltage V6 of the source 6 of the transistor 4 is shown in dotted lines. The gate control voltage Vg of transistor 4 is shown in dashed lines. For simplicity, we have neglected any voltage drops in the switches SU and S12 when they are on. Initially, the circuit is switched off, no voltage is applied to terminal E. At an instant t0, the converter is energized. The gate voltage of transistor 4 is then brought to the potential of terminal E (Vdc). The voltage V6 of its source corresponds to the voltage Vdc (applied to the gate of the transistor) increased by a periodic overvoltage linked to the switching in the inductance. The transistor 4 is then on and the energy transfer takes place towards the voltage Vout when the switch K is open at the rate of the train of control pulses. At an instant t2 when the voltage V6 reaches the level Vdc, the circuit 20 switches its output and now applies, to the gate of the transistor 4, the voltage V6 reduced by the value Vdz of the Zener diode and the overvoltage disappears. The voltage Vout continues to increase until the level desired by the circuit 21 is reached (not shown in FIG. 5). The same operation occurs in the event of a decrease in the voltage Vout. As soon as the voltage V6 becomes lower than the voltage Vdc, the transistor 4 becomes controlled by this voltage Vdc. FIG. 6 represents a practical embodiment of the circuit 20 of FIG. 4. The terminals A and B are respectively connected to the output terminal MAX (A, B) by two diodes DB and DA by their respective cathodes. An advantage of the invention is that it manages all the current overloads (Vout less than Vdc) whatever its origin, whether it is an overload, a short circuit, or inrush current calls. FIG. 7 represents a third embodiment of a control and protection circuit of a step-up converter applied to a synchronous rectification. Compared to the embodiment shown in FIG. 4, the diode D is replaced by a controlled transistor M by a circuit 21 '(CTRL) so as to operate a synchronous rectification and thus minimize the voltage drop between the terminals 1 and 6. In FIG. 7, the parasitic diodes D' and D4 of the transistors M 'and 4 have been shown, the transistors M 'and 4 being connected so that their respective parasitic diodes are in anti-series. The gate of transistor M 'can be connected either directly to terminal 6, or to this same terminal 6 via a voltage source 31. These connections are obtained by means of two switches 32 and 33 respectively connecting the gate of transistor M 'at terminal 6 and this gate at a first terminal of the voltage source 31, the other terminal of which is connected to terminal 6. The switches 32 and 33 are controlled inversely, an inverter 34 of a signal control unit supplied, for example, by an AND logic gate 35 being interposed between the control terminal of switch 33 and that of switch 32. Logic gate 35 combines the inverse (inverter 36) of the control signal of the MOS switching transistor K with a signal, supplied by the circuit 21, indicating that the output voltage Vout is greater than a threshold. The operation of the circuit of FIG. 7 is as follows. The transistor M 'is turned on when the switch K is open (that is to say that the inductive element L discharges towards the output 6 and that the corresponding current is higher than a threshold TH). The transistor M 'is blocked when the switch K is on or when the current (flowing in ' the supplied load) is lower than the threshold TH. This threshold TH is chosen at a low value (ideally zero) so as to open the switch M 'when the inductor has no more current to discharge in the load. To block the transistor M ', the switch 32 is closed and the switch 33 is open. Conversely, to make it passable, the switch 33 is closed and the switch 34 is open so as to impose a voltage sufficient grid / source thanks to the voltage source 31 (for example a Zener diode of a few volts). The above operation amounts to the fact that, when the output voltage Vout is less than a threshold, the transistor M 'operates as a diode. When the voltage Vout is greater than this threshold and the circuit is in normal operation (except starting or protection operated by the circuit 20), the transistor M 'is turned on. Of course, the present invention is susceptible to various variants and modifications which will appear to those skilled in the art. In particular, the sizing of the Zener diode
DZ qui dépend du transistor MOS 4 utilisé sera adapté à la tension grille-source supportable par le transistor MOS 4. De plus, la réalisation des circuits de commande adaptés à la mise en oeuvre de l'invention est à la portée de l'homme du métier à partir des indications fonctionnelles données ci-dessus. DZ which depends on the MOS transistor 4 used will be adapted to the gate-source voltage which can be supported by the MOS transistor 4. In addition, the realization of the control circuits adapted to the implementation of the invention is within the reach of man. of the trade from the functional indications given above.

Claims

REVENDICATIONS
1. Circuit de protection d'un convertisseur élévateur de tension comportant un premier interrupteur (4) à logique d'entrée inversée entre un élément de redressement (D, D') en série avec une inductance (L) et une borne (S) de sortie du convertisseur, caractérisé en ce qu'il comporte des moyens pour connecter l'électrode de commande du premier interrupteur à un premier potentiel lié au potentiel d'alimentation de l'inductance tant que la tension de sortie (Vout) est inférieure à un seuil. 1. Protection circuit of a step-up converter comprising a first switch (4) with reverse input logic between a rectifying element (D, D ') in series with an inductor (L) and a terminal (S) output of the converter, characterized in that it comprises means for connecting the control electrode of the first switch to a first potential linked to the supply potential of the inductor as long as the output voltage (Vout) is less than a threshold.
2. Circuit selon la revendication 1, dans lequel lesdits moyens connectent ladite électrode de commande à un potentiel inférieur au potentiel de l'interrupteur, côté inductance, dès que ledit seuil est atteint. 2. The circuit of claim 1, wherein said means connect said control electrode to a potential lower than the potential of the switch, inductance side, as soon as said threshold is reached.
3. Circuit selon la revendication 1, comportant un circuit de sélection (20) du potentiel le plus élevé entre la tension d'alimentation (Vdc) de l'inductance (L) et la tension (V6) du premier interrupteur (4) côté inductance. 3. The circuit as claimed in claim 1, comprising a circuit for selecting (20) the highest potential between the supply voltage (Vdc) of the inductor (L) and the voltage (V6) of the first switch (4) on the side inductance.
4. Circuit selon la revendication 1, dans lequel le premier interrupteur (4) est un transistor MOS à canal P ou un transistor bipolaire de type P P. 4. The circuit of claim 1, wherein the first switch (4) is a P-channel MOS transistor or a P-type bipolar transistor P.
5. Circuit selon la revendication 1, dans lequel l'électrode de commande du premier interrupteur (4) est reliée à son électrode de puissance (6) côté inductance (L) , par une source de tension (DZ) au travers d'un deuxième commutateur (SU) . 5. The circuit as claimed in claim 1, in which the control electrode of the first switch (4) is connected to its power electrode (6) on the inductance side (L), by a voltage source (DZ) through a second switch (SU).
6. Circuit selon la revendication 1, dans lequel l'électrode de commande du premier interrupteur (4) est reliée à la masse (M) par l'intermédiaire d'un deuxième commutateur (SU) . 6. The circuit of claim 1, wherein the control electrode of the first switch (4) is connected to ground (M) via a second switch (SU).
7. Circuit selon la revendication 1, dans lequel l'élément de redressement (D1) est un interrupteur de redressement synchrone. 7. The circuit of claim 1, wherein the rectifying element (D 1 ) is a synchronous rectifying switch.
8. Procédé de protection d'un convertisseur élévateur de tension comprenant un premier interrupteur (4) à logique d'entrée inversée entre un élément de redressement (D) en série avec une inductance (L) et une borne (S) de sortie du convertisseur, caractérisé en ce qu'il consiste à polariser l'électrode de commande du premier interrupteur au moyen d'un poten- tiel fixe (Vdc) lié au potentiel d'alimentation de l'inductance tant que la tension de sortie (Vout) est inférieure à un seuil. 8. Method for protecting a step-up converter comprising a first logic switch (4) input input between a rectifying element (D) in series with an inductor (L) and an output terminal (S) of the converter, characterized in that it consists in biasing the control electrode of the first switch by means a fixed potential (Vdc) linked to the power supply potential of the inductor as long as the output voltage (Vout) is below a threshold.
9. Procédé selon la revendication 8, dans lequel l'électrode de commande du premier interrupteur (4) reçoit un potentiel, inférieur au potentiel de son électrode de puissance (6) côté inductance (L) , dès que ledit seuil est atteint. 9. The method of claim 8, wherein the control electrode of the first switch (4) receives a potential, lower than the potential of its power electrode (6) on the inductance side (L), as soon as said threshold is reached.
10. Procédé selon la revendication 8, dans lequel le seuil correspond à la tension d'alimentation (Vdc) de 1 'inductance (L) . 10. The method of claim 8, wherein the threshold corresponds to the supply voltage (Vdc) of one inductor (L).
11. Convertisseur élévateur de tension, caractérisé en ce qu'il comporte un circuit de protection conforme à la revendication 1.11. Voltage step-up converter, characterized in that it includes a protection circuit according to claim 1.
rr rr
EP04816609A 2003-12-30 2004-12-30 Short circuit control in the inductance of a voltage boost converter Withdrawn EP1704634A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR0351231A FR2864720B1 (en) 2003-12-30 2003-12-30 SHORT-CIRCUIT MANAGEMENT IN INDUCTANCE OF A VOLTAGE-LIFTING CONVERTER
PCT/FR2004/050762 WO2005074109A1 (en) 2003-12-30 2004-12-30 Short circuit control in the inductance of a voltage boost converter

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EP (1) EP1704634A1 (en)
JP (1) JP2007517490A (en)
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WO (1) WO2005074109A1 (en)

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US20070035974A1 (en) 2007-02-15
FR2864720A1 (en) 2005-07-01
JP2007517490A (en) 2007-06-28
US7835119B2 (en) 2010-11-16
WO2005074109A1 (en) 2005-08-11
FR2864720B1 (en) 2006-06-09

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