EP1618637A1

EP1618637A1 - Electronic circuit breaker

Info

Publication number: EP1618637A1
Application number: EP04727828A
Authority: EP
Inventors: Troels Winther; Kim Arthur Stück ANDERSEN; Kenneth Laursen
Original assignee: Bansik APS
Current assignee: Bansik APS
Priority date: 2003-04-22
Filing date: 2004-04-16
Publication date: 2006-01-25
Also published as: WO2004095667A1

Abstract

There is provided a circuit breaker comprising a first switch circuit having first and second terminals. The first switch circuit comprises a first controllable signal current switch for switching between a closed, current conducting state and an open, non-conducting state in response to a first control signal to thereby allow or prevent conduction of current through the first signal current switch between a first terminal and a second terminal of the first signal current switch, and the first switch circuit further comprises a first controllable test current switch for switching between a closed, current conducting state and an open, non-conducting state in response to a first test control signal to thereby allow or prevent conduction of current through the first test current switch between a first terminal and a second terminal of the first test current switch. The first switch circuit also comprises a first test current source for providing a first test current flow through the first test current switch, and a first current sensor for measuring a current flow through the first signal current switch. Here, the first terminals of the first signal current switch and the first test current switch are electrically conductively connected to each other and to the first terminal of the first switch circuit, and the second terminals of the first signal current switch and the first test current switch are electrically conductively connected to each other and to the second terminal of the first switch circuit, whereby a first test current loop including the first signal current switch, the first current sensor, the first test current switch and the first test current source is formed. The circuit breaker may further comprise a second switch circuit having first and second terminals with the second terminal of the first switch being electrically conductively connected to the first terminal of the second switch circuit. Here the second switch circuit is preferably constructed to perform in the same way as the first switch circuit, and the second switch circuit may comprise a second controllable signal current switch, a second controllable test current switch, a second controllable test current switch, and a second current sensor.

Description

ELECTRONIC CIRCUIT BREAKER

FIELD OF THE INVENTION

The invention relates to electronic circuit breakers or switches in general and in particular to electronic circuit breakers, switches or relays provided with an in-circuit current source for self-testing, which may be used in failsafe applications, which for example may be used in the railway, automobile, and chemical industries.

BACKGROUND OF THE INVENTION

Circuit breakers, switches or relays are widely used and in order to lower costs of production and to avoid the disadvantages of mechanical or electro-mechanical constructions, electronic circuit breakers or switches have been developed. For many purposes there is a need to have a failsafe circuit breaker, switch or relay, and by using electronic control circuits or computer systems, computer controlled test sequences can be imposed on the electronic circuit breaker, switch or relay to thereby test the functionality of the electronic circuit breaker, switch or relay. In the following the wording electronic circuit breaker is also meant to include electronic switches or relays.

In German patent application having publication No. DE 19606894 is disclosed an electronic circuit stage for safe control and monitoring of electrical loads in railway applications. Here, the circuit stage has at least two series switches, which are in- dependently controllable and which are of non-safety standard. At least one switch is common for all loads circuit and each load circuit has at least one other switch, for opening and closing the load circuit. Independent computer channels of a safety computer system control the switches. At least one transducer detects a test voltage derived from a supply or test current flowing through the load, or a voltage meas- ured directly at the load and dependent on the load's operating state. Both computer system channels, which can detect inappropriate open or closed state, evaluate the transducer signals from the occurrence of unanticipated transducer signals based on the expected transducer signal at the current time. For the electronic circuitry of the switch of DE 19606894 a test of the circuit is performed by having a supply or test current flowing through the load. Thus, the disclosed circuit stage does not allow a circuit test to be performed without having a known load current, which makes it difficult to test the disclosed circuit stage when connected in series with another component or switch, which may switch off the connection to the load or when connected to a circuit with unknown load current.

Thus, there is a need for an electronic switch circuitry, which may be tested without having a test current flowing through the load, and which may be tested when con- nected in series with another switch circuitry.

SUMMARY OF THE INVENTION

According to a first aspect of the invention, there is provided a circuit breaker com- prising a first switch circuit having first and second terminals, said first switch circuit comprising: a first controllable signal current switch for switching between a closed, current conducting state and an open, non-conducting state in response to a first control signal to thereby allow or prevent conduction of current through the first signal current switch between a first terminal and a second terminal of the first signal current switch , a first controllable test current switch for switching between a closed, current conducting state and an open, non-conducting state in response to a first test control signal to thereby allow or prevent conduction of current through the first test current switch between a first terminal and a second terminal of the first test current switch, a first test current source for providing a first test current flow through the first test current switch, and a first current sensor for measuring a current flow through the first signal current switch, said first terminals of the first signal current switch and the first test current switch being electrically conductively connected to each other and to the first terminal of the first switch circuit, and said second terminals of the first signal current switch and the first test current switch being electrically conductively connected to each other and to the second terminal of the first switch circuit, whereby a first test current loop including the first signal current switch, the first current sensor, the first test current switch and the first test current source is formed.

Preferably, the circuit breaker further comprises a second switch circuit having first and second terminals with the second terminal of the first switch circuit being electrically conductively connected to the first terminal of the second switch circuit, said second switch circuit comprising: a second controllable signal current switch for switching between a closed, current conducting state and an open, non-conducting state in response to a second control signal to thereby allow or prevent conduction of current through the second signal current switch between a first terminal and a second terminal of the second signal current switch, a second controllable test current switch for switching between a closed, current conducting state and an open, non-conducting state in response to a second test control signal to thereby allow or prevent conduction of current through the second test current switch between a first terminal and a second terminal of the second test current switch, a second test current source for providing a second test current flow through the second test current switch, and a second current sensor for measuring a current flow through the second signal current switch, said first terminals of the second signal current switch and the second test current switch being electrically conductively connected to each other and to the first terminal of the second switch circuit, and said second terminals of the second current switch and the second test current switch being electrically conductively connected to each other and to the second terminal of the second switch circuit, whereby a second test current loop including the second signal current switch, the second current sensor, the second test current switch and the second test current source is formed. Here, the circuit breaker may have a first terminal electrically conductively connected to the first terminal of the first switch and a second terminal electrically conductively connected to the second terminal of the second switch.

The first switch circuit may then be designed so that when the first signal current switch and the first test current switch are closed, the first test current to be supplied by the first test current source can flow in the first test current loop and be measured by the first current sensor. In the same way, the second switch circuit may then be designed so that when the second signal current switch and the second test current switch are closed, the second test current to be supplied by the second test current source can flow in the second test current loop and be measured by the second current sensor.

In order to control the current switches of the first switch circuit, it is preferred that the first switch circuit further comprises a first control circuit for providing the first control signal to the first signal current switch and the first test control signal to the first test current switch. Here, the first current sensor may be adapted to output a first current output signal and the first control circuit may be adapted to receive and read the first current output signal. In the same way it is preferred that the second switch circuit further comprises a second control circuit for providing the second control signal to the second signal current switch and the second test control signal to the second test current switch. Also here, the second current sensor may be adapted to output a second current output signal and the second control circuit may be adapted to receive and read the second current output signal.

According to an embodiment of the invention, the first and second control circuits may be adapted to perform a first self-test of the first current loop, with the first and second control circuits being adapted to control the current switches so that the first signal current switch and the first test current switch are closed at the same time during at least part of a period of the first self-test when both the second signal current switch and the second test current switch are open. Here, for the first self-test, the first control circuit may be adapted to control the first signal current switch and the first test current switch, and the second control circuit may be adapted to control the second signal current switch and the second test current switch. In order to perform a first self-test, the first control circuit may be adapted to read a first current output signal value from the first current sensor during a period of the first self-test when the first signal current switch and the first test current switch are closed at the same time while both the second signal current switch and the second test current switch are open, and further may be adapted to compare the read first current value to a stored predetermined value representing the first test current flow and based on said comparison determining whether a first current failure signal should be gener- ated or not. A first failure signal may be generated when the read first current output signal value is smaller than the first test current value by a predetermined amount.

It is also within an embodiment of the invention that the first and second control cir- cuits are adapted to perform a second self-test of the second current loop, with the first and second switch circuits being adapted to control the current switches so that the second signal current switch and the second test current switch are closed at the same time during at least part of a period of the second self-test when both the first signal current switch and the first test current switch are open. Here, for the second self-test, the first control circuit may be adapted to control the first signal current switch and the first test current switch, and the second control circuit may be adapted to control the second signal current switch and the second test current switch. In order to perform a second self-test, the second control circuit may be adapted to read a second current output signal value from the second current sen- sor during a period of the second self-test when the second signal current switch and the second test current switch are closed at the same time while both the first signal current switch and the first test current switch are open, and further may be adapted to compare the read second current value to a stored predetermined value representing the second test current flow and based on said comparison determin- ing whether a second current failure signal should be generated or not. A second failure signal may be generated when the read second current output signal value is smaller than the second test current value by a predetermined amount.

In order to improve the possibilities of testing the switch circuit or circuits, it is pre- ferred that the first switch circuit further has a first voltage sensor for measuring a voltage including or representing the voltage across the first signal current switch. Here, the first voltage sensor may be adapted to output a first voltage output signal and the first control circuit may be adapted to receive and read the first voltage output signal. Similarly, it is preferred that the second switch circuit further has a sec- ond voltage sensor for measuring a voltage including or representing the voltage across the second signal current switch. Also here, the second voltage sensor may be adapted to output a second voltage output signal and the second control circuit may be adapted to receive and read the second voltage output signal. When the first switch circuit has a first voltage sensor, the output from the voltage sensor may be used during a self-test. Thus, according to an embodiment of the invention, the first control circuit may be adapted to receive and read a first current output signal from the first current sensor and to receive and read a first voltage output signal from the first voltage sensor during a period of a first self-test when the first signal current switch and the first test current switch are closed at the same time while both the second signal current switch and the second test current switch are open, and further be adapted to compare the read first current value and the read first voltage output value to a stored predetermined value representing the on- resistance of the first signal current switch, and based on said comparison determining whether a first resistance failure signal should be generated or not. Here, the first resistance failure signal may be generated when a value representing a resistance value obtained from the read first current output signal value and the read first voltage output value differs from a value representing the on-resistance value of the first signal current switch by a predetermined amount.

For the second switch circuit, it is also within an embodiment of the invention, that the second control circuit may be adapted to receive and read a second current output signal from the second current sensor and to receive and read a second voltage output signal from the second voltage sensor during a period of a second self-test when the second signal current switch and the second test current switch are closed at the same time while both the first signal current switch and the first test current switch are open, and further be adapted to compare the read second current value and the read second voltage output value to a stored predetermined value repre- senting the on-resistance of the second signal current switch, and based on said comparison determining whether a second resistance failure signal should be generated or not. Also here, the second resistance failure signal may be generated when a value representing a resistance value obtained from the read second current output signal value and the read second voltage output value differs from a value representing the on-resistance value of the second signal current switch by a predetermined amount.

In order for the control circuits to control both the current switches of the first and second switch circuits during a test or a self-test, it is within an embodiment of the invention that the first and second control circuits are adapted to communicate with each other. It is within a preferred embodiment that the first and second control circuits are electrically galvanic separated, and here the first and second control circuits may be adapted to communicate with each other via optical communication.

The circuit breaker according to the present invention discussed until now comprises one or two switch circuits, where a first and a second switch circuit may be arranged in series. However, according to the present invention there is also provided a circuit breaker comprising more than two switch circuits. Here, one, two or even more pairs of series connected switch circuits may be arranged in parallel with the series con- nected first and second switch circuits.

So, according to an embodiment of the present invention, then a circuit breaker comprising the first and second switch circuit may further comprise: a third switch circuit having first and second terminals and a fourth switch circuit having first and second terminals with the second terminal of the third switch circuit being electrically conductively connected to the first terminal of the fourth switch circuit, said third switch circuit comprising: a third controllable current switch for switching between a closed, current con- ducting state and an open, non-conducting state in response to a third control signal to thereby all ow or prevent conduction of current through the third current switch between a first terminal and a second terminal of the third current switch , a third controllable test current switch for switching between a closed, current conducting state and an open, non-conducting state in response to a third test con-trol signal to thereby allow or prevent conduction of current through the third test current switch between a first terminal and a second terminal of the third test current switch, a third test current source for providing a third test current flow through the third test current switch, and a third current sensor for measuring a current flow through the third current switch, said first terminals of the third current switch and the third test current switch being electrically conductively connected to each other and to the first terminal of the third switch circuit, and said second terminals of the third current switch and the third test current switch being electrically conductively connected to each other and to the second terminal of the third switch circuit, whereby a third test current loop including the third current switch, the third current sensor, the third test current switch and the third test current source is formed; and said fourth switch circuit comprising: a fourth controllable current switch for switching between a closed, current conduct- ing state and an open, non-conducting state in response to a fourth control signal to thereby allow or prevent conduction of current through the fourth current switch between a first terminal and a second terminal of the fourth current switch, a fourth controllable test current switch for switching between a closed, current conducting state and an open, non-conducting state in response to a fourth test control signal to thereby allow or prevent conduction of current through the fourth test current switch between a first terminal and a second terminal of the fourth test current switch, a fourth test current source for providing a fourth test current flow through the fourth test current switch, and a fourth current sensor for measuring a current flow through the fourth current switch, said first terminals of the fourth current switch and the fourth test current switch being electrically conductively connected to each other and to the first terminal of the fourth switch circuit, and said second terminals of the fourth current switch and the fourth test current switch being electrically conductively connected to each other and to the second terminal of the fourth switch circuit, whereby a fourth test current loop including the fourth current switch, the fourth current sensor, the fourth test current switch and the fourth test current source is formed; wherein the first terminals of the first and third switch circuits are electrically conduc- tively connected to each other, and wherein the second terminals of second switch circuit and the fourth switch circuit are electrically conductively connected to each other.

Also here, the third switch circuit may then be designed so that when the third signal current switch and the third test current switch are closed, the third test current to be supplied by the third test current source can flow in the third test current loop and be measured by the third current sensor. In the same way, the fourth switch circuit may then be designed so that when the fourth signal current switch and the fourth test current switch are closed, the fourth test current to be supplied by the fourth test current source can flow in the fourth test current loop and be measured by the fourth current sensor.

In order to control the current switches of the third switch circuit, it is also here pre- ferred that the third switch circuit further comprises a third control circuit for providing the third control signal to the third current switch and the third test control signal to the third test current switch. Here, the third current sensor may be adapted to output a third current output signal and the third control circuit may be adapted to receive and read the third current output signal. In the same way it is preferred that the fourth switch circuit further comprises a fourth control circuit for providing the fourth control signal to the fourth current switch and the fourth test control signal to the fourth test current switch. Also here, the fourth current sensor may be adapted to output a fourth current output signal and the fourth control circuit may be adapted to receive and read the fourth current output signal.

According to an embodiment of the invention the third switch circuit may further have a third voltage sensor for measuring a voltage including or representing the voltage across the third current switch. Here, the third voltage sensor may be adapted to output a third voltage output signal and the third control circuit may be adapted to receive and read the third voltage output signal. Similarly, the fourth switch circuit may further have a fourth voltage sensor for measuring a voltage including the voltage across the fourth current switch. Also here, the fourth voltage sensor may be adapted to output a fourth voltage output signal and the fourth control circuit may be adapted to receive and read the fourth voltage output signal.

In order for the control circuits to control both the current switches of the third and fourth switch circuits during a test or a self-test, it is within an embodiment of the invention that the third and fourth control circuits are adapted to communicate with each other. The present invention furthermore covers an embodiment in which the first, second, third and fourth control circuits are adapted to communicate with each other.

Here, the control circuits may be adapted to perform self-tests of the first and second test current loops, and the first and second control circuits may be adapted to control the current switches so that during a self-test of the first current loop, the first signal current switch and the first test current switch are closed at the same time during at least part of a period when the second signal current switch and the second test current switch are open, and the first and second control circuits may further be adapted to control the current switches so that during a self-test of the sec- ond current loop, the second signal current switch and the second test current switch are closed at the same time during at least part of a period when the first signal current switch and the first test current switch are open. In the same way, the control circuits may be adapted to perform self-tests of the third and fourth test current loops, and the third and fourth control circuits may be adapted to control the current switches so that during a self-test of the third current loop, the third signal current switch and the third test current switch are closed at the same time during at least part of a period when the fourth signal current switch and the fourth test current switch are open, and the third and fourth control circuits may further be adapted to control the current switches so that during a self-test of the fourth current loop, the fourth signal current switch and the fourth test current switch are closed at the same time during at least part of a period when the third signal current switch and the third test current switch are open.

When having a circuit breaker with first, second, third and fourth switch circuits, then the control circuits may be adapted to perform self-tests of the first, second, third and/or fourth test current loops when the circuit breaker is in an open state with the current switches being controlled so that during a self-test of a test current loop, the corresponding signal current switch and test current switch are closed at the same time during at least part of a period when the signal current switches and test cur- rent switches of the three remaining test current loops are all open.

According to another or further embodiment of the invention, then the control circuits may be adapted to perform self-tests of the first, second, third and/or fourth test current loops when the circuit breaker is in a closed state with the current switches be- ing controlled so that during a self-test of the first current loop, the first signal and test current switches are closed at the same time during at least part of a period when the second signal and test current switches are open, the third and fourth test current switches are open, and the third and forth signal current switches are closed, and so that during a self-test of the second current loop, the second signal and test current switches are closed at the same time during at least part of a period when the first signal and test current switches are open, the third and fourth test current switches are open, and the third and forth signal current switches are closed. In the same way, the control circuits may be adapted to perform the self-tests of the first, second, third and/or fourth test current loops when the circuit breaker is in a closed state with the current switches being controlled so that during a self-test of the third current loop, the third signal and test current switches are closed at the same time during at least part of a period when the fourth signal and test current switches are open, the first and second test current switches are open, and the first and second signal current switches are closed, and so that during a self-test of the fourth current loop, the fourth signal and test current switches are closed at the same time during at least part of a period when the third signal and test current switches are open, the first and second test current switches are open, and the first and second signal current switches are closed.

According to an embodiment of the invention, the first, second, third and fourth control circuits may be electrically galvanic separated. Here, the first, second, third and fourth control circuits may be adapted to communicate with each other via optical communication.

According to a second aspect of the present invention there is provided a method of performing a test of a switch circuit being part of a circuit breaker, which circuit breaker is selected from the circuit breakers according to the first aspect of the invention, said method comprising: keeping both the signal current switch and the test current switch closed during a first period of time, and reading or detecting a current output signal value from the current sensor during said first period of time. This method may be referred to as a closed switch test.

According to a first embodiment for generating a first period test failure signal, the method may further comprise comparing the current output signal value obtained during said first period of time to a stored predetermined value representing the test current flow and based on said comparison determining whether a closed current failure signal should be generated or not. Here, a closed current failure signal may be generated when the current output signal value obtained during said first period of time is smaller than the test current value or smaller than the test current value by a predetermined amount.

The method of the present invention may further comprise a so-called open switch test, thereby further comprising the steps of: keeping the signal current switch open and the test current switch closed during a second period of time, and reading or detecting a current output signal value from the current sensor during said second period of time.

According to a first embodiment for generating a second period failure signal, the method may further comprise comparing the current output signal value obtained during said second period of time to a stored predetermined value representing a maximum leakage current and based on said comparison determining whether an open current failure signal should be generated or not. Here, an open current failure signal may be generated when the current output signal value obtained during said second period of time is larger than the maximum leakage current value or larger than the maximum leakage current value by a predetermined amount.

When the switch circuit to be tested comprises a voltage sensor, then the closed switch test may further comprise reading or detecting a voltage output signal value from the voltage sensor during said first period of time. According to a second embodiment for generating a first period test failure signal when the closed switch test includes reading of the current sensor and reading of the voltage sensor, it is pre- ferred that the test method further comprises comparing the current output signal value and the voltage output signal value obtained during said first period of time to a stored predetermined value representing an on-resistance of the signal current switch, and based on said comparison determining whether a closed resistance failure signal should be generated or not. Here, a closed resistance failure signal may be generated when a value representing a resistance value obtained from the current output signal value and the voltage output value obtained during said first period of time differs from a value representing the on-resistance value of the signal current switch by a predetermined amount. When the switch circuit to be tested comprises a voltage sensor, then the open switch test may further comprise reading or detecting a voltage output signal value from the voltage sensor during said second period of time. According to a second embodiment for generating a second period test failure signal when the open switch test includes reading of the current sensor and reading of the voltage sensor, it is preferred that the test method further comprises comparing the current output signal value and the voltage output signal value obtained during said second period of time to a stored predetermined value representing an off-resistance of the signal current switch, and based on said comparison determining whether an open resistance fail- ure signal should be generated or not. Here, an open resistance failure signal may be generated when a value representing a resistance value obtained from the current output signal value and the voltage output value obtained during said second period of time differs from a value representing the off-resistance value of the signal current switch by a predetermined amount.

It is preferred that the reading or detecting of a current output signal value during the first period of time comprises several readings of an output signal from the current sensor during said first period of time. Similarly, it is preferred that the reading or detecting of a current output signal value during the second period of time com- prises several readings of an output signal from the current sensor during said second period of time. It is also preferred that the reading or detecting of a voltage output signal value during the first period of time comprises several readings of an output signal from the voltage sensor during said first period of time, and in the same way it is preferred that the reading or detecting of a voltage output signal value dur- ing the second period of time comprises several readings of an output signal from the voltage sensor during said second period of time. By using several readings in order to detect or determine a current output signal and/or a voltage output signal, a filtering and/or averaging of the readings may be performed to thereby suppress noise.

The methods of testing a switch circuit according to the second aspect of the invention may also be used when the circuit breaker comprises two or more switch circuits. Thus, according to a third aspect of the invention, there is provided a method of performing a self-test of two series connected switch circuits being part of a circuit breaker, which circuit breaker is selected from the circuit breakers according to the first aspect of the invention having two series connected switch circuits, said method comprising: for the switch circuit being tested, performing a test selected from the test methods according to the second aspect of the invention, while for the switch circuit not being tested, keeping both the signal current switch and the test current switch open during at least said first and/or second period(s) of time.

According to a fourth aspect of the invention, there is also provided a method of per- forming a self-test of two series connected switch circuits being part of a circuit breaker, which circuit breaker is selected from the circuit breakers according to the first aspect of the invention including four switch circuits, said method comprising: for the switch circuit being tested, performing a test selected from the test methods according to the second aspect of the invention, while for the switch circuit not being tested but being connected in series with the switch circuit under test, keeping both the signal current switch and the test current switch open during at least said first and/or second period(s) of time, and for the remaining two switch circuits keeping the signal current switches and the test current switches open during at least said first and/or second period(s) of time.

According to a fifth aspect of the invention, there is also or furthermore provided a method of performing a self-test of two series connected switch circuits being part of a circuit breaker, which circuit breaker is selected from the circuit breakers according to the first aspect of the invention including four switch circuits, said method comprising: for the switch circuit being tested, performing a test selected from the test methods according to the second aspect of the invention, while for the switch circuit not being tested but being connected in series with the switch circuit under test, keeping both the signal current switch and the test current switch open during at least said first and/or second period(s) of time, and for the remaining two switch circuits keeping the signal current switches closed and the test current switches open during at least said first and/or second period(s) of time. For the second, third, fourth and fifth aspects of the invention, it is preferred that each switch circuit comprises a corresponding control circuit for the control of the closing and opening of the signal current switch and the test current switch, and for the reading or detecting of the outputs of the current sensor and/or voltage sensor.

According to a sixth aspect of the invention, there is also provided a configuration of circuit breakers, said configuration comprising: two or more two-switch element circuit breakers each having a first electronic switch circuit connected in series with a second electronic switch circuit, said first switch circuit having a first electronic control circuit and said second switch circuit having a second electronic control circuit, and a first main electronic control circuit and a second main electronic control circuit, wherein the first main control circuit and each first control circuit are part of a first communication ring, and wherein the second main control circuit and each second control circuit are part of a second communication ring. Here said two-switch element circuit breakers may be selected from the circuit breakers according to the first aspect of the invention having two series connected switch circuits both including a control circuit. The configuration may comprise several two-switch elements such as at least 3, 4, 5, 6, 7 or 8 elements.

According to the seventh aspect of the invention, there is also or furthermore provided a configuration of circuit breakers, said configuration comprising: two or more four-switch element circuit breakers each having a first electronic switch circuit connected in series with a second electronic switch circuit and a third elec- tronic switch circuit connected in series with a fourth electronic switch circuit, with said first and second switch circuits being connected in parallel with the third and fourth switch circuits, each said switch circuits including a corresponding electronic control circuit, and a first main electronic control circuit and a second main electronic control circuit, wherein the first main control circuit and each control circuit of the first and third switch circuits are part of a first communication ring, and wherein the second main control circuit and each control circuit of the second and fourth switch circuits are part of a second communication ring. Here, said four-switch element circuit breakers may be selected from the circuit breakers according to the first aspect of the inven- tion having four switch circuits both including a control circuit. The configuration may comprise several four-switch elements such as at least 3, 4, 5, 6, 7 or 8 elements.

It is preferred that for a communication ring according to the sixth or seventh aspect of the invention, each switch control circuit is linked via communication lines to two neighbouring switch control circuits or one neighbouring switch control circuit and the main control circuit.

According to embodiments of the sixth and seventh aspects of the invention, each of the main control circuits and each of the switch control circuits may be electrically galvanic separated from one another. It is also preferred that the main control circuits and the switch control circuits are adapted to communicate with each other via optical communication.

For the sixth or seventh aspects of the invention, the first main control circuit and the second main control circuit may be adapted to communicate to each other. The two main control circuits may be electrically galvanic separated from one another and they may communicate with each other via optical communication.

According to embodiments of the sixth and seven aspects of the invention, the first main control circuit and the second main control circuit each may be adapted to receive or read a logic input signal. It is also within embodiments of sixth and seventh aspects the invention that the configuration further comprises one or more first input electronic detect circuits for detecting or receiving one or more corresponding logic input signals and for forwarding one or more corresponding output signals to the first main control circuit, and furthermore comprises one or more second electronic input detect circuits for detecting or receiving one or more corresponding logic input signals and for forwarding one or more corresponding output signals to the second main control circuit. Here, each logic input signal may be input to both a first and a second input detects circuit. It is preferred that each of the main control circuits and each of the input detect circuits are electrically galvanic separated from one another. It is also preferred that the main control circuits and the input detect circuits are adapted to communicate via optical communication. It is preferred that the configuration of circuit breakers according to the sixth and seven aspects of the invention may communicate with computers or systems not being part of the configuration. Here, the first main control circuit may have at least one communication line for forwarding and/or receiving information to and/or from a computer or system outside the first communication ring. It is also preferred that the second main control circuit may have at least one communication line for forwarding and/or receiving information to and/or from a computer or system outside the second communication ring. Also here, it is preferred that the main control circuits are electrically galvanic separated from any outside computer or system having a com- munication line to a main control circuit, and it is preferred that communication between the outside systems and the main control circuits is performed via optical communication.

Other objects, features and advantages of the present invention will be more readily apparent from the detailed description of the preferred embodiments set forth below, taken in conjunction wit the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

Figure 1 is a block diagram of an embodiment of a circuit breaker according to the present invention having a first switch circuit,

Figure 2 is a block diagram of an embodiment of a circuit breaker according to the present invention having first and second switch circuits in series,

Figure 3 is a block diagram of an embodiment of a circuit breaker according to the present invention having first and second switch circuits in series and including first and second voltage sensors, each switch circuit having a corresponding first and second control circuit,

Figure 4 is a block diagram of an embodiment of a circuit breaker according to the present invention having third and fourth switch circuits in series and including third and fourth voltage sensors, each switch circuit having a corresponding third and fourth control circuit, Figure 5 is a block diagram of an embodiment of a circuit breaker according to the present invention having first, second, third and fourth switch circuits connected in a combination of parallel and series and including all four voltage sensors,

Figure 6 is a Wlarkov-chain diagram describing the mathematical probability theory of a duplicated failsafe system,

Figure 7 is a block diagram of an embodiment of a controlled electronic circuit switch element named E-i,

Figure 8 is a block diagram of an embodiment of a complete self-testing circuit breaker including four controlled electronic circuit switch elements,

Figures 9 a, b, c show an electrical circuit diagram of a current switch at the elec- tronic component level with the corresponding simple equivalent diagrams when the current switch is open and closed,

Figure 10 is an example of an electrical circuit diagram corresponding to the block diagram of the Ei element illustrated in Figure 7 when implemented to work in an AC environment,

Figure 11 is a flow chart illustrating subroutines called from a self-test sequence according to the flow chart of Figure 15, when the circuit breaker is configured according to an embodiment as illustrated in Figure 2,

Figure 12 is a flow chart illustrating the subroutines called from a self-test sequence according to the flow chart of Figure 15 when the circuit breaker is configured according to an embodiment as illustrated in Figure 3,

Figure 13 is a flow chart illustrating a test sequence according to an embodiment of the circuit breaker as illustrated in Figure 2,

Figure 14 is a flow chart illustrating a test sequence according to an embodiment of a circuit breaker as illustrated in Figure 8, Figure 15 is a flow chart illustrating a self-test sequence according to the self-test routine called from the flowcharts at Figure 13 and Figure 14,

Figure 16 shows a number of E_x elements corresponding to the Ei element as illustrated in Figure 7 being configured to achieve the functionality of a failsafe mechanical relay, and

Figure 17 shows different configurations of circuit breakers, which configurations are capable of communicating with other duplicated computer systems.

DETAILED DESCRIPTION OF EMBODIMENTS OF THE INVENTION

In Figure 1 is shown an embodiment of a first electronic circuit breaker (091), named FSi, of the present invention. The first circuit breaker comprises a controllable first current switch (103), named Fι, which is placed in series with a current sensor

(107), named A^ and in parallel with Fi and Ai is placed a controllable test current switch (104), named d, which is placed in series with a test current source (106), named Δ . Δ can be adjustable. The connection points of the two parallel lines determine the first and second terminals of the circuit breaker (101, 102). In opera- tion, current (105), named I, flows from the input of first terminal (101) to the output of second terminal (102) of the circuit breaker. FSi can be in three states:

• Operational open: This state is named 'open'. In this state F-i and Gι are open. • Operational closed: This state is named 'closed'. In this state F^ is closed and Gi is open. Current (105) may flow from the input of first terminal (101) to the output of second terminal (102) of the circuit breaker.

• Self-testing: This state is named 'self-testing'. The state of F-i and Gi depends on the type of self-test. Typically a self-test involves a sequence of switching of Fi and Gi. Several different self-test sequences can be implemented. One self-test sequence can be dedicated to test if F^ can switch between state open and closed and another self-test sequence can be dedicated to test if Ai is capable of measuring a low current etc. Most self-testing sequences can only take place if I = 0, because if I <> 0 then the self-testing sequence will affect I when F^ and d are changing states and thereby intro- duce noise pulses in the surrounding circuit. If the surrounding circuit is resistant to these noise pulses then a self-test sequence can run even when

| o ϋ.

In Figure 2 is shown an embodiment of an electronic circuit breaker (093), named

FS₁₂, of the present invention. The circuit breaker comprises of FSi shown at Figure 1 and a second circuit breaker (092), named FS₂. FS₂ comprises a controllable second current switch (203), named F₂, which is placed in series with a current sensor (207), named A₂, and in parallel with F₂ and A₂ is placed a controllable test current switch (204), named G₂, which is placed in series with a test current source (206), having a predetermined value Δl₂. The connection points of the two parallel lines determine the first and second terminals of the second circuit breaker (201, 202). The second terminal of the first circuit breaker (102) is connected to the first terminal (201) of the second electronic circuit breaker. FS₂ can be in the same states (open, closed and self-testing) as those described for FSi above.

In operation, current (105 and 205) flows from the input of first terminal (101) to the output of the second terminal (202) of the second circuit breaker. FS₁₂ in Figure 2 has several advantages to FS-i in Figure 1:

• FSι₂ can ensure that I = 0 when either FSi or FS₂ is in self-testing state. Ex- ample: If FSi is self-testing, then FS₂ can be in state 'open' and thereby ensure that FSi will not affect the surrounding circuit if F^ and d are closed during a self-test sequence.

• FSι₂ can be used in fail-safe circuits, because it can open even if a first hazardous error occurs. Example: FS₁₂ is implemented as a switch in the electri- cal circuit of a green light lamp in a railway signalling system. If Fi fails in a way, so that it is permanent closed, then a self-test sequence of FSi can disclose this. F₂ is still working correctly and will therefore be able to open and thereby ensure that the green lamp will not be on due to one failure.

In Figure 3 is shown a preferred embodiment of an extended electronic circuit breaker (506) based on the circuit breaker shown in Figure 2. The first circuit breaker (091) has been added a first voltage sensor (108), named Vι, across F^ This extended circuit (100) is named, SG|. The second circuit breaker (092) has been added a second voltage sensor (208), named V , across F₂. This extended circuit (200) is named, SC₂.The second terminal of SCi (102) is connected to the first terminal of SC₂ (201). The circuit comprising SC and CCi (109) is named Ei (115) and the circuit comprising SC₂ and CC₂ (209) is named E₂ (215). The circuit comprising E-i and E₂ in series (506) is named, SB₁₂. SC is controlled by the first control circuit (109), named CCi which controls Fi, through the first control signal line ( 11) and Gi through the first test control signal line (110) and receives and reads the value of Ai through the first current output signal (112) and the value of Vi through the first voltage output signal (113).

SC₂ is controlled by the second control circuit (209), named CC₂ which controls F₂, through the a control signal line (211) and G₂ through the second test control signal line (210) and receives and reads the value of A₂ through the second current output signal (212) and the value of V₂ through the second voltage output signal (213). CC_T and CC₂ communicate through the communication signal lines (114, 214). CCi receive input from input signal (116). CC₂ receives input from input signal (216). Input signals can be any information telling if SCi: • Should be open or closed.

• Should stay in a fail-safe error state like 'Always open'.

• Other information.

The communication lines (116 - 118 and 216-218) are described more detailed un- der Figure 7.

In operation, current flows from the input of first terminal (101) to the output of the second terminal (202) of SB₁₂.

Having two control circuits CCi and CC₂ has several advantages: • The switch can be used for failsafe circuits. Example: CCi and CC₂ read from input (116,216) that the switch should be open, but then CCi fails in a way that keeps Fi closed. When CCi starts a self-test sequence as described in Figure 11-15, CCi will disclose that it has lost control over ^. This can be a hazardous failure as described above in connection with Figure 2. But CC₂ will still work correctly and keep F₂ open.

• If SB1₂ is used in a high voltage AC circuit then the voltage potential across the control/read signal lines of FSi (110-113) and FS₂ (210-213) will not be at the same voltage level. By making the communication signals between CCi and CC₂ galvanic isolated, CCi can control SCi and CC can control SC₂ and thereby avoid an expensive galvanic isolation of the control/read signal lines of FSi (110-113) and FS₂ (210-213). A galvanic isolation furthermore enforces the electrical independency between CCi and CC₂, which is needed to fulfil the Markov-chain (further details at Figure 6). An embodiment of the galvanic isolated communication between Cd and CC₂ could be by using optocouplers. This communication type is described more detailed under Figure 7.

Cd and CC₂ initiate the self-test. An example of an embodiment would be an initiation of internal timers in the control circuits, which ensures that the period between two self-tests never exceeds a maximum limit. The synchronization of the internal timers is done through communication signals.

In Figure 4 is shown a preferred embodiment of a third and fourth electronic circuit breaker. The embodiment is identical to Figure 3, except that 'third' has replaced 'first' and 'fourth' has replaced 'second'.

In Figure 5 is shown a preferred embodiment of a connection of a first, second, third and fourth electronic circuit breaker (504), named CBι₄.The first terminal of CBι (501) is connected to the first terminal of SB₁₂ (101) and the first terminal of CB₃₄ (301). The second terminal of CBι₄ (502) is connected to the second terminal of SB₁₂ (202) and the second terminal of SB₃₄ (402). In operation, current flows from the input of first terminal (501), splits between SB ₂ and SB₃₄ and is assembled at the output of the second terminal (502) of CB₁₄.

At Figure 6 is shown a Markov-chain describing the mathematical probability theory of a duplicated failsafe system. A short introduction to this theory is described below, because it is needed to understand how the switch at Figure 3 can be integrated in failsafe-duplicated systems. The three groups (900, 901 and 902), named S, F and D contain at a certain time a number of elements. The sum of the elements is al- ways constant. An element could be any duplicated system. Example: The Circuit breaker at Figure 3. The duplicated systems are in this text called system A and system B. They could also be referred to as 'channel 1' and 'channel 2' in other literature about failsafe-duplicated systems. At Figure 3 system A could consist of E_Λ and system B could consist of E₂. Typically a failsafe system has a safe state and then it can enter into one or more permissive states. Example 1: A failsafe switch is placed in series with a green lamp in a railway signal. When the switch is open the switch is blocking the green signal. This is the safe state. When the switch is closed the green lamp is lightning. This is the permitting state. Example 2: A failsafe switch is placed in series with a red lamp in a railway signal. When the switch is closed the red lamp is lightning. This is the safe state. When the switch is open the switch is blocking the red lamp. This is the permitting state. The two examples above show that the safe state of the switch depends on the surrounding circuit. The elements in S are well-working elements without any errors.

The elements in F are elements with one error in system A or B. This error is not hazardous because the other system is working correctly. But as long as the failure is not disclosed the system is still active and there is a possibility that the next error occurs. If instead the error is disclosed, then the system can enter a safe state until it is repaired. After reparation the system can move back to S.

The elements in D are elements with two failures. This can be a hazardous failure, if the two errors a placed in each system and they lead to a state change from safe to permitting.

Calculating a Markov-simulation can simulate the movements of the elements. This is done the following way:

The elements in S have a failure rate (903) of λ_F [Failure/Δt]. The elements in F have a failure rate (904) of λ_F [Failure/Δt]. Furthermore the elements in F have a repair rate (905) of λ_R [Repairs/Δt].

At starting time, to, are Nso elements placed in S and zero elements in F and D. After a time period of Δt occurs ti = to + Δt. Then occurs t₂ = t + Δt and so on. At time ti there will be N_Fι = Nso* λ_F elements in F and there will be N_Sι = N_So - N_Fι elements in S. At time t₂ there will be N_D2 = N_R* λ_F elements in D. The number of elements in F are increased from the supply of failing elements from S (903) and decreased from the supply of failing elements to D (904) and the supply of repaired elements back to S (905).

It is essential to the theory that all failures between system A and B are independent. If this is not the case there must be a failure rate arrow directly from S to D. A system is declared as failsafe if it can be proved that the number of elements in D never exceeds a certain limit after a certain simulating time. Therefore it is important to ensure, that the elements does not stay in F. This can be achieved in two ways: Either by keeping the failure rate, λ_F, very low or by keeping the repair rate, λ_R, high by ensuring that the disclosure time is low so the elements can enter safe state and be repaired. Furthermore it must be proved that A and B systems are independent. The Markov-chain shown at Figure 6 is the basis for the three Failsafe standards: The German Mϋ8004, the European Cenelec and the Scandinavian A/B-standard. A system that fulfils this Markov-chain is therefore able to fulfil all three standards al- though they seem very different from each other.

In Figure 7 is E^ from Figure 3 shown. Ei is identical to E₂at Figure 3 and E₃ and E₄ later on at Figure 8. When referring to an indefinite element, it will be named E_x, where X = 1 , 2, 3 or 4. An example of an embodiment of CCi would be as a stan- dard micro controller or a programming logic unit (PLC). A standard micro controller has the ability to communicate with another system in many different ways. Another system could be another micro controller or an electrical system. But another system could also be a LED-diode or a panel that is supervised by a human being. Therefore: • CCi may switch an output line between logic '0' or '1' and thereby send a signal to another system. This type of output is named 'Logic output'. The signal code can be designed for the purpose or any well-known one-line protocols can be used. Another logic output could be a steady '0' or '1' turning a LED on/off. • CCi may read an input line having the logic value O' or ' and thereby read a signal from another system or CCi can just read a steady '0' or '1' on the line from another system. This type of input is named 'Logic input'. • CCi can implement any well-known communication protocol: Example: Ethernet, ISDN, Blue tooth or RS232. The implementation involves software in the micro controller and physical implementation of the needed number of logic input and output lines. In most cases a circuit dedicated to handle the communication through the lines must be placed between the micro controller and the lines. The communication protocol typically has the ability to send and receive data. This type of input/output is named 'protocol IO'. The proto- col IO is more expensive in components than the logic input/outputs. Which communication type CCi will use depends on the environment and configuration in which E-_\ is implemented. A typically example of communication lines is shown in Figure 7. Logic output line (114) and a logic input line (214) implements a signal communication with another E_x element. These communication lines will be named 'internal' communication lines in the text below. Example: Communication lines (114, 214) between CCi and CC₂ at Figure 3 are internal communication lines. Communication lines which communicate with other systems than the Ex elements are named external communication lines. External logic input line (116) reads the state the switch should enter: 'open' or 'closed' from another system. External logic output line (117) could be used to turn on/off a LED telling which state the switch has entered. Example of LED lightning: on = open, off = closed and blinking = Self- test. External protocol IO line (118) communicates with another system. Example of a protocol: An RS232 communication protocol, which implements a standard access to Personal and Laptop. During production the input/output information could be test and configuration data. Example: Calibration data, safe state information, element address if E_x is placed in a network. During operation the input/output information could be operational data. Example: Internal error counters, current internal state of Ei: 'Open', 'closed' or 'self-testing', the current (105) measured by the ammeter, Ai, the voltage (108) measured by the voltmeter, Vi, and enabling/disabling of the switch.

In Figure 8 is shown a controllable electronic circuit breaker (505), named SB₁₄, consisting of: a first controlled electronic circuit switch element (115), named Ei, a second controlled electronic circuit switch element (215), named E₂, a third controlled electronic circuit switch element (315), named E₃, a fourth controlled electronic circuit switch element (415), named E₄.

The second terminal of E^ (102) is connected to the first terminal of E₂ (201) and the second terminal of E₃ (302) is connected to the first terminal of E₄ (401). The first terminal of SB₁₄ (501) is connected to the first terminal of Ei (101) and the first terminal of E₃ (301). The second terminal of SBι₄ (502) is connected to the second terminal of E₂ (202) and the second terminal of E₄ (402). The control circuits (109, 209, 309, 409), named CCi - CC₄, communicate with each other through the internal communication signal lines (114, 214, 314, 414). The internal communication is ar- ranged as a communication ring. This reduces the total internal communication line number to four and saves components. An implementation of the communication ring could be a slotted ring where each element, E_x, has a slot with a fixed length. The technical aspects of implementing such a communication ring is described in the literature about this subject. A typically example of physical embodiment of the internal communication lines would be a galvanic communication line for the same reasons that there were for using galvanic communication lines between CCi and CC₂ (114, 214) at Figure 3. Each switch element, E_x, has the capability of receiving and sending signals through the external communication lines (116-118, 216-218, 316-318 and 416-418). Example 1: SB_M is controlled by an external duplicated failsafe system with a logic A/B-output; named O_A and O_B. O_A would be connected to both Ei and E₃ logic input (116, 316). O_B would be connected to both E₂ and E₄ input (216, 416). Thereby SB_M has been split into a duplicated failsafe system where the A-system consists of Ei and E₃ and the B-system consists of E₂ and E₄. Example 2: SBι₄ is controlled by an external duplicated failsafe system with an A B protocol IO, named IOA and IO_B. IOA would be connected to E^ protocol IO (118). IOB would be connected to E₂ protocol IO (318). E₃ and E₄ are not connected because most two- way communication protocols are not prepared for three terminals. Again SB₁₄ has been split into a duplicated failsafe system where the A-system consists of E^ and E₃ and the B-system consists of E₂ and E₄. In this example it would be necessary to add a two-way communication link between E and E₃ to ensure that the A system can communicate internally, without involving the B system, if the external A-system sends an order to enter safe state. The same is the case for the B system and therefore a two-way communication between E₂ and E must also be added. Splitting into an A and B system does not affect the self-testing and the internal communication of a switch. Example: SB₁₄ is still self-testing according to the scheme shown at Figure 14 and the communication ring between all four E_x elements keeps working. It does affects that the A and B system all the time must agree before entering a permitting state. If the communication ring is broken due to a failure in an E_x element then all Ex elements would have to enter safe state. This can be avoided if the communication ring is extended to be a two-way communication ring, so all four E_x elements would have an alternative communication way. In a typically embodiment for railway purposes it is not necessary to use all external communication lines shown in Figure 8. Generally it would be sufficient to use only one of the LED outputs (117, 217, 317, 417) and one of the external protocol communication outputs (118, 218, 318, 418) for supervisory purposes. This is because only failsafe functionality must be duplicated. A LED is not considered as failsafe functionality and supervisory systems are not considered as having failsafe functionality as well. Example of IO configuration: SB₁₄ is connected to an external failsafe-duplicated system through protocol IO in Ei ( 18) and E₂ (218), then a LED is connected to Ei (117) and finally protocol IO of E₃

(318) is connected to a supervisory system. This means that protocol IO of E₄ (418) and logic outputs of E₂, E₃ and E₄ (217, 317 and 417) are not used although some of the logic outputs might be used to implement the needed two-way communication between the A system elements (Ei and E₃) and the B system elements (E₂ and E₄). A preferred embodiment of all used communication lines would be a galvanic communication line for the same reasons that there were for using galvanic communication lines between CCi and CC₂ (114, 214) at Figure 3.

The internal self-tests can be initiated of one of the elements, for example Ei; Ei initiates the self-test sequence described in Figure 14. If an error occurs then an error signal can be send to the controlling failsafe-duplicated system, the supervisory system and the LED. In a preferred embodiment the self-testing routine described in Figure 14 is running in a permanent cycle as long as SBι is active. How SB_M should behave in error situations will depend of the circuit in which SBι₄ is placed. In a typically implementation SBι would send an error signal at the first error disclosed during self-test, but it would keep working normally in a certain time- period. In order to duplicate the time period it should be initiated in both the A and B system. Example: The time period is started by both Ei and E₂. If time-out occurs in any of the systems both systems must enter safe state. Having this time period will give the maintenance personal time to repair the switch without any system down time.

In operation, current flows from the input of first terminal of SB₁₄ (501), splits between Ei and E₃ and is assembled at the output of the second terminal (502) of SB_i4.

In Figure 9a is shown an embodiment of the current switch F_1t F₂, F₃ or F , named F (103) at the electronic components level. F is connected to the surrounding circuit through the first terminal (125) and the second terminal (126). F consists of two semiconductor switches (120,121), named F₊ and F., which are placed in series with two resistors (123,124). The resistors improve the robustness of the switch to large pulses and can be used as current sensing resistors when implementing the current sensor, Ai, A₂, A₃ or A₄. The switches are controlled by the control signal (111). The ground level of the control signal (122) is placed between the two resistors. Hereby the switch becomes independent of the poles of the voltage across the terminals and thus the current switch can be used for AC or DC current.

Figure 9b shows a simple equivalent model of F, when F is open. The model consists of a resistor, named R o_n-

Figure 9c shows a simple equivalent model of F, when F is closed. The model consists of a resistor, named R_Foιτ.

When the voltage across F and the current through F has been measured, the con- trol circuits can calculate R_FOn and R_Foff using Ohm's law These calculated values of

R_FOn and R_FOff can then be compared with the values determined from the data sheets of the electrical components inside F since the values will be well defined when the components are well working.

Semiconductor switches can fail by showing non-linear behaviour, which can be difficult to disclose. This failure type can be disclosed by calculating R_FOff and R_FOn using different values of Δl.

In Figure 10 is shown a typically embodiment of an electrical circuit diagram corresponding to the block diagram of the Ei element, when it is implemented to work in an AC or DC environment. Figure 10 shows the embodiment of the current sensor Ai, named A (107), the current sensor i, named V (108), the current switch Fi, named F (103) and the test current switch Gi, named G (104) at the electronic components level, when implemented in Ei. Ei is connected to the surrounding circuit through the two terminals (101, 102). The current switch F shown at Figure 9a has been implemented in Ei (111, 120, 121 , 122, 123 and 124). The Ammeter (107) is implemented using an operational amplifier and current sensing resistors (123, 124). The alternating output signal from the operational amplifier is rectified (130) before it is read by the control circuit (109), named CC, through the current sensor signal (112), named A. When using a stan- dard operational amplifier then the amplifier will have a measurable offset. This off- set is eliminated during calibration of the circuit at production time. The PWM signal from the CC (132) applies a false voltage across the input legs of the operational amplifier and thereby eliminating the offset. The control circuit CC is supplied with power from the power supply unit (106), named PSU. The PSU is supplied from another PSU through a galvanic transformer. The circuit at Figure 10 will not affect the surrounding circuit due to the superposition principle of electronic circuits. The test current switch (104), G, is split into G₊ and G- (104, 133) to be able to lead current through both current switches F₊ and F. (120, 121) during self-testing. When F and G are 'closed' in a test sequence described in Figure 15 then first F+ and G+ are closed and F- and G- are open, then F+ and G+ are open and F- and G- are closed. The PSU is placed in series with G₊and G.. G is controlled by CC through the test current signal lines (110, 136). Standard semiconductor switches can be used for the G switch, but they must have a high enough V_BREA_KOVE_R value to resist the voltage across the switch terminals supplied from the surrounding circuit when the switch is closed. In series with each switch G+ and G- is placed a test current controlling resistor (134, 135). The dimension of the test current controlling resistors together with the dimension of the PSU determines the value of the test current. The resistors could be replaced with variable resistors controlled by CC and thereby achieve a variable test current value. The Voltmeter (108) is implemented by placing an operational amplifier after the two test current switches G₊ and G.. The alternating output signal from the operational amplifier is rectified (131) before it is read by CC, through voltage sensor signal (113), named V.

The internal and external communication lines (114, 214, 116-118) use galvanic communication. The logic input/output lines are implemented by using a standard optocoupler: The logic output of another system (named O_A or OB in the description in connection with Figure 8) is connected to the input side of the optocoupler. The output of the optocoupler is connected to the logic input signal (116). Inside the optocoupler the logic input is transformed into a light signal, which again is transformed back to a logic signal on the outside of the optocoupler. Thereby a galvanic boarder is achieved. The same principle can be used for the protocol IO communication lines. The used micro controller (109), CC, should have certain features:

• UART - for the protocol IO,

• E²PROM - to save product specific production and operational data, ^β PWM - to control the offset at the current measuring operational amplifier (107) and • I/O legs - sufficient to implement all internal and external communication and control lines. If the switch is used in a duplicated failsafe system then the CC's in the A system and the CC's in the B system should be of different types and from different suppli- ers to achieve the independency needed to fulfil the Markov-chain at Figure 6. Examples 1 : Motorola micro controller, MC68HC908KX2. Example 2: Microchip Technology micro controller, PIC16F873/SO. There is a wide range of suppliers of micro controllers at the market. New types are often introduced. Each time the price is lowered and the size is decreased. The semiconductor switch at Figure 8 was probably not the cheapest solution when compared with mechanical failsafe switches some years ago. But due to the fast development of cheaper and smaller standard semiconductor components and micro controllers and due to lowering of production cost of truly semiconductor products at the global market, then today the switch at Figure 8 can compete with mechanical solutions. Between the terminals (101, 102) is placed an optional filter (137) to protect the switch components from large noise pulses. The filter must be dimensioned according to the surrounding system. Alternatively the filter can be a part of the surrounding circuit. The filter at Figure 10 (137) could include Gas Discharge Tubes, Varis- tors, inductors, capacitors and other components.

In Figure 11 is shown a typical embodiment of subroutine methods (170, 173, 175) of a single circuit breaker at Figure 1 or any extended embodiment that does not include a voltage sensor. Subroutine 'Read sensors and calculate' (170) is implemented in the corresponding control circuit. The subroutine is called every time the control circuit needs to achieve a value of the current, I, (172) through F. The control circuit performs a sequence of readings of the current sensor, A, thereby filtering and/or averaging the readings and eliminating noise. The control circuit knows the expected value of I since it controls the switches, F and G. At F closed test case (175) F and G is closed and I must be approximately equal to the predetermined value of the current source, Δl.

At F open test case (173) F is open and G is closed and I must be less than I_ZERO- IZE_RO is equal to the maximum accepted leakage current through F. By running subroutines F Open (173) and then F Closed (175) (or vice versa) in a row it is possible to determine if the control circuit has control of F and is able to switch F between the two states 'open' and 'closed'. In Figure 12 is shown a typical implementation subroutine method (180, 181, 182) of a single circuit breaker at Figure 1 or any extended embodiment that does include a voltage sensor. Subroutine 'Read sensors and calculate' (180) is implemented in the corresponding control circuit. The subroutine is called every time the control circuit needs to achieve a value of the current, I, through F and the voltage, V_F, (182) across F. The control circuit performs a sequence of readings of the current sensor, A, and the voltage sensor, V, thereby filtering and/or averaging the readings and eliminating noise. Since the control circuit also controls the switches, F and G, the control switch knows which values of I, V and the current switch impedance, R_F, to expect. R_F is calculated using Ohm's law. At F closed test case (185) F and G is closed and R_F must be approximately equal to the predetermined value of R_FOn. At F open test case (183) F is open and G is closed and R_F must be approximately equal to the predetermined value of R_Fo_ff. By running subroutines F Open (183) and then F Closed (185) (or vice versa) in a row it is possible to determine if the control circuit has control of F and is able to switch F between the two states 'open' and 'closed' and to disclose if F is showing non-linear behaviour.

In Figure 13 is shown a typical embodiment of a self-test sequence of the circuit breaker at Figure 2 or any extended embodiment, example: SBι₂ at Figure 3.

The self-test sequence depends on whether the circuit breaker is open (140) or closed (141):

If open, then SCι/(FSι at Figure 1) and SC₂/(FS₂ at Figure 2) are open when self- test starts. Then SCi does self-test. When SCi has finished its self-test, then SCi opens and then SC₂ does self-test. When SC₂ has finished, SC₂ opens and then SB₁₂ has finished its self-test.

If closed, then SCi and SC₂ are closed when self-test starts. Then SCi does self- test. When SCi has finished its self-test, then SC₂ does self-test. When SC₂ has finished, then SBι₂ has finished its self-test. The performed self-test (160) is de- scribed at Figure 15. For the closed self-test (141) the self-test (160) starts by determining if a current higher than the leakage current is running in a current switch F, and if so, then the self-test has finished (161). Therefore during the closed self-test (141) both SCi and SC₂are kept closed. In Figure 14 is shown an example of a self-test sequence of the circuit breaker, SBι₄, at Figure 8.

The self-test sequence depends on whether the circuit breaker is open (150) or closed (151): If open, then SCi, SC_2j SG₃ and SC₄ are open when self-test starts. Then Ci does self-test. When SCi has finished its self-test, then Sd opens and then SC₂ does self-test. When SC₂ has finished, SC₂ opens and then SC₃ does self-test. When SC₃ has finished, SC₃ opens and SC₄ does self-test. When SC₄ has finished, SC₄ opens and then SB₁₄ has finished its self-test. If closed, then SCi, SC_2l SC₃ and SC are closed when self-test starts. Then SC₂ opens and SCi does self-test. When SCi has finished its self-test, then SC₂ closes. Then SCi opens and SC₂ does self-test. When Sd has finished its self-test, then SCi closes. Then SC₄ opens and SC₃ does self-test. When SC₃ has finished its self- test, then SC₄ closes. Then SC₃ opens and SC₄ does self-test. When SC has fin- ished its self-test, then SC₃ and SC₄ closes. By using this routine it is possible to let all four switches perform a self-test without changing the open/close state of SB₁ as seen from its terminals. The performed self-test (160) is described at Figure 15.

At Figure 15 is shown an example of a self-test method (160) of a single circuit breaker at Figure 1 or any extended embodiment, example: Ei at Figure 7. When a text is underlined in the flowchart, it is a call to a subroutine that can be found in Figure 11 or 12. Two subroutine numbers are mentioned (17x, 18x). The first numbers (17x) should be called by those embodiments of the circuit breaker that does not include a voltage sensor and those that do include a voltage sensor should call the second numbers (18x). At step (161) it is determined if a current higher than the leakage current is running in the current switch F, and if so, the circuit breaker may be conducting a current and the self-test is completed before changing the state of any current switches F or G.

At Figure 16 is shown a circuit breaker configuration, which is extended to achieve the functionality of a failsafe group relay (600), named GR. A GR is a system of one or more switches in a row, that all responds synchronic to one or more logic inputs. A mechanical GR can be implemented by using an internal heavy metal 'anchor'. The gravity force on the anchor is used to ensure that each switch falls into the safe state of the switch at failures. Each switch is mechanically fixed to the anchor and thereby ensuring that the switches are synchronized. The GR enters the permissive state by lifting the anchor with electro magnetically forces and thereby activating the switches to change state. The switches can respond in opposite direction. Example: A mechanical relay consists of one logic input, named l₀, and two switches named Si and S₂. If lo = then Si = closed and S₂ = open. If l₀ = '0', then Si = open and S₂ = closed. The internal mechanical bindings ensure, that Si and S₂ always are in opposite directions. These bindings are used to achieve failsafe functionality in a relay logic system called an Interlocking system. A simple example of a relay interlocking system could be the Cenelec European railway signal, named "outer reduced signal". This lamp consists of only a red and a green lamp. Si is placed in series with the green lamp and S₂ in series with the red lamp. The mechanical binding ensures that only one lamp will be lightning at the same time. The safe state of this system would be when l₀ = '0' and the green lamp is off and the red lamp is lightning. The permissive state would be when l₀ = and the green lamp is lightning and the red lamp is off.

A full failsafe railway interlocking system can be implemented by connecting many numbers of GR with a supervisory system and the elements at the railway: Signal, point, track detectors, Emergency buttons and so on. The system at Figure 16 is an electronically implementation of such a mechanical relay described in the above example.

The relay consists of N+1 switches (601), named E2-0, E2-1,..., E2-N. Example: E2- 0 corresponds to Si and E2-1 corresponds to S₂ in the mechanical relay example above. In a typical embodiment an E2-x switch element is identical with SBι₂ (506) shown at Figure 3 or SBι₄ (505) shown at Figure 8. The version to be used depends on the relay cycle. Railway interlocking systems are constructed, so a GR always has an on/off cycle between each train passage. This means each switch will have an open period where it can self-test between each train passage. Therefore the simpler SB₁₂ version is sufficient. Another argument for using SBι₂ is that an E2-x element in this case consists of two E_x switch elements: Ei and E₂ (115, 215) at Figure 3. This means that four E_x elements (Ei and E₂ in Si and Ei and E₂ in S₂) must fail in a permissive state before the corresponding mechanical binding is broken. This means the Markov-chain at Figure 6 must be replaced with five states (0, 1, 2, 3 and 4 errors) instead of three, which reduces the probability of a hazardous failure. If an E2-x switch in the GR is placed in series with an emergency button then the SBι version will be the appropriate, because obviously the emergency button is not activated/deactivated between each train passage. In the below text an E2-x element is identical with SBι₂. The logic input lines (608), named lo, Ii and IN, determine the functionality state of the relay. In a simple relay, named 'relay', there will only be one input l₀. In more complicated relays, named Group relays, the combinations of several input determines the state of the switches. Example: A group relay can implement the functionality and the allowed lamp combinations in a railway signal with more than two lamps. Blinking functionality of a lamp can be implemented as an example. The inputs are read by input detects (607). If there is one input line (608) as shown at Figure 16, then the input line is split into an A input detect and a B input detect. If the input were arriving from another duplicated failsafe system, then the input lines would already have been split. A typical embodiment of the input detects would con- sists of a voltage and/or current detect system combined with a noise filter. The input detects are read by two main control circuits (602, 603). These main control circuits are identical to the controllers described in Figure 10 (109) concerning demands, communication lines and description of production and operational dataflow with other systems. They interpret the input detects and compare the result with each other through the internal communication lines (614, 715) of type logic input/output. Each main control circuit has the ability of reporting any internal state or other information's to a supervisory system or receiving any information through the external communication lines (609, 610) of type protocol IO. The main control circuits communicate with the E2-x in two separate communication rings. The imple- mented communication rings are one-way rings: A logic output from main A is connected to logic input (116) in Ei in E2-0, then logic output (114) in Ei in E2-0 is connected to logic input (116) in Ei in E2-1 and so on. The main A control circuit (602), named 'main A', communicates with all Ei switches in each E2-x element. The main B control circuit (603), named 'main B', communicates with all E₂ switches in each E2-x element. Hereby the GR has been split into an A system and a B system and it can be viewed as a duplicated failsafe system. The A-system consists of: Input detects Ax elements (607), main A (602) and each Ei element inside each E2-x. The B-system consists of: Input detects B_x elements (607), main B (603) and each E₂ element inside each E2-x. This is to achieve the independency needed to fulfil the Markov-chain in Figure 6. All communication lines are marked with a 'g' (606). This means that galvanic isolation is implemented between all internal and external communication lines. This has two reasons: It is necessary to achieve the independency needed to fulfil the Markov-chain in Figure 6 and it is necessary to avoid problems with voltage levels if the E2-x switches and the inputs are placed at differ- ent voltage levels in the same surrounding circuit.

All communication needed to perform the self-test described for SB₁₂ at Figure 3 between each E1 and E2 element inside an E2-x switch will now have to be done through the communication rings and the internal communication between main A and main B. Therefore main A and main B communicates with the E_x elements in time fixed cycles. The cycles are parted into three periods: Period 1, named P1, performs external communication and prepares internal communication with the E_x elements. Period 2, named P2, performs a bit wise asynchrony internal communication between the E_x elements and the main controllers: First main A and main B sends bit nr. 0 to E_x in E2-0, then main A and main B sends bit no. 1 to E_x in E2-0. At the same time E_x in E2-0 passes on bit no. 0 to E2-1 and so on. Finally bit no. 0 arrives from E_x in E2-n back to main A and main B. The number of bits is fixed and each Ex element knows which bit numbers are dedicated to data exchange with the main controllers. The data to be exchanged are the same data as described at Figure 7. Period 3, named P3, performs evaluation and comparison between the A and B data. The starting time of each period is synchronized between main A and main B.

Main A and main B tells the E_x elements to enter state 'open', closed' or 'self- testing'. This way main A and main B can control that Ei in E2-0 is Open' when E₂ in E2-0 is self-testing. E_x answers back how the self-test performed. The main micro controllers can send other orders, if necessary. Example: 'What is the value of I, V and R_ON' and so on. This way main A and B can compare the different data from the Ei and E₂ inside an E2-x element and thereby disclose errors. Main A and main B gives orders to each switch and receive their data. A special time order is send by main A and main B to inform the E_x elements about the start- ing time of periods P1 , P2 and P3. Each P1 the value of the time order is changed and both the main A/B and the E_x elements must alter the time order, so that the E_x elements knows that main A/B sends fresh order data and the main A/B knows that the E_x elements sends fresh status data. At any detected error main A/B ensures, that proper error handling will perform, this means: Entering safe state and sending information to supervisory systems. The safe state is a configuration matter: It de- pends on the surrounding circuit. Example of a safe state: E2-0 is permanent locked in state 'open' and E2-1 is permanent locked in state 'closed' independent of input signals.

The main control circuits initiate PL Typically the time between two self-tests will be five minutes but it depends on system requirements. The timing will typically be controlled by the internal timers of main A and main B.

In Figure 17 is shown that the circuit breakers described above, SBι₂, SB₁ , and GR have the ability to be combined in any configuration with each other and with other duplicated failsafe systems (650, 651). The other duplicated failsafe system is symbolized with two personal computers at Figure 17, but it could be any duplicated system. The external communication lines of the circuit breakers can be used to create a network of circuit breakers. Since each circuit breaker can be viewed as a failsafe duplicated system and thereby be parted into an A system and a B system, then the network can be incorporated in any other duplicated failsafe system. It can also be connected to any supervisory system. Example: Each switch can send a message to an Internet Web page telling its current status. An application at the Internet page can send an SMS to a mobile phone and thereby inform the maintenance personal if a failure has occurred.

The circuit breaker at Figure 8 is build up to fulfil the Markov-chain at Figure 6. This gives the circuit breaker the following characteristics:

1. It can self-test with high frequency and thereby disclose any hazardous first failure and keep the probability of the second hazardous failure low.

2. It has electrically independency between system A and system B by using galvanic communication between the elements.

3. It can communicate with other control systems or information systems (Example: The Internet and Supervisory systems) if a self-test fails and thereby decrease the repair time, which again increase the safety and reliability of the system.

4. It fulfils all three failsafe standards: German Mu8004, European Cenelec and Scandinavian A/B-standard, because it fulfils the Markov chain at Figure 6. The capability of controlling the disclosure time eliminates the need for using expensive components with low failure rates. The circuit breaker at Figure 8 can be build of truly semiconductor components. There is no need for special mechanical constructions, which is often used for failsafe circuit breakers.

5. Can be build of ordinary standard semiconductor components.

6. Can be produced with ordinary electronic production methods.

7. No need for any mechanical relay functionality.

Since the circuit breaker at Figure 8, named SBι₄, consists of four switches Ei, E₂,

E₃ and E₄ it is robust enough to be well working even if one of the switches detects a failure during a self-test. If for example Ei fails in a permanent permitting state (closed) then E₂ can enter a safe state (open) and E₃ and E can keep working normally until a service man arrives and repairs the circuit breaker. This means the switch:

8. Has high reliability, because it can eliminate system down time at failure.

Since Ei, E₂, E₃ and E have an internal ammeter and voltmeter each, then the switch:

9. Can be used as a failsafe Ammeter by setting the switch in state 'closed'.

10. Can be used as a failsafe Voltmeter by setting the switch in state 'open.

The software in the control circuits can be adapted to any kind of functionality: Example: A circuit breaker is placed in series with a red lamp in a railway signal. If the circuit breaker is closed it must stay closed at least 3 seconds independent of the input signal to ensure that the Automatic Train Control system can detect the current through the red lamp. This functionality can easily be implemented in the software in the control circuits.

11. The circuit breaker can behave intelligent and can be adapted to any special functionality due to the software in the control circuits. Due to capability of reading multiple inputs, to communicate with each other and other safety system the functionality can be extended:

12. It can communicate with other circuit breakers and thereby achieve the func- tionality of a mechanical or electronically safety relay and replace these.

13. It can communicate with each other and read multiple inputs and thereby achieve the functionality of a mechanical or electronically group relay and replace these.

14. It can communicate with each other, read multiple inputs and communicate with other safety systems and thereby achieve the functionality of a mechanically or electronically interlocking system for railway applications and replace these.

The replacements described above can be done as spare parts.

15. It can be integrated in older mechanical as well as newer electronic failsafe systems.

Switches that are used to implement the blinking functionality of lamps in a railway signal perform a large number of on/off switching during their lifetime. Failsafe mechanical contacts cannot implement this functionality because the in-rush current when the switch closes and the sparkling at the switch metal when it opens ruin the switch too fast. Instead are used expensive mercury contacts that swing like a pendulum. The in-rush current and the sparkling will not cause the same problems in a truly semiconductor switch which are proper dimensioned.

16. It can implement the blinking functionality of a lamp and thereby substitute mercury pendulum switches.

While the invention has been particularly shown and described with reference to particular embodiments, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention, and it is intended that such changes come within the scope of the following claims.

Claims

1. A circuit breaker comprising: a first switch circuit having first and second terminals, said first switch circuit com- prising: a first controllable signal current switch for switching between a closed, current conducting state and an open, non-conducting state in response to a first control signal to thereby allow or prevent conduction of current through the first signal current switch between a first terminal and a second terminal of the first signal current switch , a first controllable test current switch for switching between a closed, current conducting state and an open, non-conducting state in response to a first test control signal to thereby allow or prevent conduction of current through the first test current switch between a first terminal and a second terminal of the first test current switch, a first test current source for providing a first test current flow through the first test current switch, and a first current sensor for measuring a current flow through the first signal current switch, said first terminals of the first signal current switch and the first test current switch being electrically conductively connected to each other and to the first terminal of the first switch circuit, and said second terminals of the first signal current switch and the first test current switch being electrically conductively connected to each other and to the second terminal of the first switch circuit, whereby a first test current loop including the first signal current switch, the first current sensor, the first test current switch and the first test current source is formed.

2. A circuit breaker according to claim 1 further comprising: a second switch circuit having first and second terminals with the second terminal of the first switch circuit being electrically conductively connected to the first terminal of the second switch circuit, said second switch circuit comprising: a second controllable signal current switch for switching between a closed, current conducting state and an open, non-conducting state in response to a second control signal to thereby allow or prevent conduction of current through the second signal current switch between a first terminal and a second terminal of the second signal current switch, a second controllable test current switch for switching between a closed, current conducting state and an open, non-conducting state in response to a second test control signal to thereby allow or prevent conduction of current through the second test current switch between a first terminal and a second terminal of the second test current switch, a second test current source for providing a second test current flow through the second test current switch, and a second current sensor for measuring a current flow through the second signal current switch, said first terminals of the second signal current switch and the second test current switch being electrically conductively connected to each other and to the first terminal of the second switch circuit, and said second terminals of the second cur- rent switch and the second test current switch being electrically conductively connected to each other and to the second terminal of the second switch circuit, whereby a second test current loop including the second signal current switch, the second current sensor, the second test current switch and the second test current source is formed.

3. A circuit breaker according to claim 2, wherein the circuit breaker has a first terminal electrically conductively connected to the first terminal of the first switch and a second terminal electrically conductively connected to the second terminal of the second switch.

4. A circuit breaker according to any one of the claims 1-3, wherein when the first signal current switch and the first test current switch are closed, the first test current to be supplied by the first test current source can flow in the first test current loop and be measured by the first current sensor.

5. A circuit breaker according to any one of the claims 2-4, wherein when the second signal current switch and the second test current switch are closed, the second test current to be supplied by the second test current source can flow in the second test current loop and be measured by the second current sensor.

6. A circuit breaker according to any one of the claims 1-5, wherein the first switch circuit further comprises a first control circuit for providing the first control signal to the first signal current switch and the first test control signal to the first test current switch.

7. A circuit breaker according to claim 6, wherein the first current sensor is adapted to output a first current output signal and the first control circuit is adapted to receive and read the first current output signal.

8. A circuit breaker according to any one of the claims 2-7, wherein the second switch circuit further comprises a second control circuit for providing the second control signal to the second signal current switch and the second test control signal to the second test current switch.

9. A circuit breaker according to claim 8, wherein the second current sensor is adapted to output a second current output signal and the second control circuit is adapted to receive and read the second current output signal.

10. A circuit breaker according to claim 8 or 9, wherein the first and second control circuits are adapted to perform a first self-test of the first current loop, with the first and second control circuits being adapted to control the current switches so that the first signal current switch and the first test current switch are closed at the same time during at least part of a period of the first self-test when both the second signal current switch and the second test current switch are open.

11. A circuit breaker according to claim 10, wherein for said first self-test, the first control circuit is adapted to control the first signal current switch and the first test current switch, and the second control circuit is adapted to control the second signal current switch and the second test current switch.

12. A circuit breaker according to claim 10 or 11 , wherein the first control circuit is adapted to read a first current output signal value from the first current sensor during a period of a first self-test when the first signal current switch and the first test current switch are closed at the same time while both the second signal current switch and the second test current switch are open, and further is adapted to compare the read first current value to a stored predetermined value representing the first test current flow and based on said comparison determining whether a first current failure signal should be generated or not.

13. A circuit breaker according to claim 12, wherein a first failure signal is generated when the read first current output signal value is smaller than the first test current value by a predetermined amount.

14. A circuit breaker according to any one of the claims 8-13, wherein the first and second control circuits are adapted to perform a second self-test of the second current loop, with the first and second switch circuits being adapted to control the current switches so that the second signal current switch and the second test current switch are closed at the same time during at least part of a period of the second self- test when both the first signal current switch and the first test current switch are open.

15. A circuit breaker according to claim 14, wherein for said second self-test, the first control circuit is adapted to control the first signal current switch and the first test current switch, and the second control circuit is adapted to control the second signal current switch and the second test current switch.

16. A circuit breaker according to claim 14 or 15, wherein the second control circuit is adapted to read a second current output signal value from the second current sensor during a period of a second self-test when the second signal current switch and the second test current switch are closed at the same time while both the first signal current switch and the first test current switch are open, and further is adapted to compare the read second current value to a stored predetermined value representing the second test current flow and based on said comparison determining whether a second current failure signal should be generated or not.

17. A circuit breaker according to claim 16, wherein a second failure signal is generated when the read second current output signal value is smaller than the second test current value by a predetermined amount.

18. A circuit breaker according to any one of the preceding claims, wherein the first switch circuit further has a first voltage sensor for measuring a voltage including or representing the voltage across the first signal current switch.

19. A circuit breaker according to claim 18, wherein the first voltage sensor is adapted to output a first voltage output signal and the first control circuit is adapted to receive and read the first voltage output signal.

20. A circuit breaker according to any one of the claims 2-19, wherein the second switch circuit further has a second voltage sensor for measuring a voltage including or representing the voltage across the second signal current switch.

21. A circuit breaker according to claim 20, wherein the second voltage sensor is adapted to output a second voltage output signal and the second control circuit is adapted to receive and read the second voltage output signal.

22. A circuit breaker according to claim 7 and any one of the claims 19-21, wherein the first control circuit is adapted to receive and read a first current output signal from the first current sensor and to receive and read a first voltage output signal from the first voltage sensor during a period of a first self-test when the first signal current switch and the first test current switch are closed at the same time while both the second signal current switch and the second test current switch are open, and further is adapted to compare the read first current value and the read first voltage output value to a stored predetermined value representing the on- resistance of the first signal current switch, and based on said comparison determining whether a first resistance failure signal should be generated or not.

23. A circuit breaker according to claim 22, wherein a first resistance failure signal is generated when a value representing a resistance value obtained from the read first current output signal value and the read first voltage output value differs from a value representing the on-resistance value of the first signal current switch by a predetermined amount.

24. A circuit breaker according to claim 9 and any one of the claims 21-23, wherein the second control circuit is adapted to receive and read a second current output signal from the second current sensor and to receive and read a second voltage output signal from the second voltage sensor during a period of a second self- test when the second signal current switch and the second test current switch are closed at the same time while both the first signal current switch and the first test current switch are open, and further is adapted to compare the read second current value and the read second voltage output value to a stored predetermined value representing the on-resistance of the second signal current switch, and based on said comparison determining whether a second resistance failure signal should be generated or not.

25. A circuit breaker according to claim 24, wherein a second resistance failure signal is generated when a value representing a resistance value obtained from the read second current output signal value and the read second voltage output value differs from a value representing the on-resistance value of the second signal cur- rent switch by a predetermined amount.

26. A circuit breaker according to any one of the claims 8-25, wherein the first and second control circuits are adapted to communicate with each other.

27. A circuit breaker according to any one of the claims 8-26, wherein the first and second control circuits are electrically galvanic separated.

28. A circuit breaker according to claim 27, wherein the first and second control circuits are adapted to communicate with each other via optical communication.

29. A circuit breaker according to any one of the claims 2-28 further comprising: a third switch circuit having first and second terminals and a fourth switch circuit having first and second terminals with the second terminal of the third switch circuit being electrically conductively connected to the first terminal of the fourth switch circuit,

said third switch circuit comprising:

a third controllable current switch for switching between a closed, current con- ducting state and an open, non-conducting state in response to a third control signal to thereby all ow or prevent conduction of current through the third current switch between a first terminal and a second terminal of the third current switch , a third controllable test current switch for switching between a closed, current conducting state and an open, non-conducting state in response to a third test con- trol signal to thereby allow or prevent conduction of current through the third test current switch between a first terminal and a second terminal of the third test current switch, a third test current source for providing a third test current flow through the third test current switch, and a third current sensor for measuring a current flow through the third current switch, said first terminals of the third current switch and the third test current switch being electrically conductively connected to each other and to the first terminal of the third switch circuit, and said second terminals of the third current switch and the third test current switch being electrically conductively connected to each other and to the second terminal of the third switch circuit, whereby a third test current loop including the third current switch, the third current sensor, the third test current switch and the third test current source is formed; and

said fourth switch circuit comprising:

a fourth controllable current switch for switching between a closed, current conducting state and an open, non-conducting state in response to a fourth control signal to thereby allow or prevent conduction of current through the fourth current switch between a first terminal and a second terminal of the fourth current switch, a fourth controllable test current switch for switching between a closed, current conducting state and an open, non-conducting state in response to a fourth test control signal to thereby allow or prevent conduction of current through the fourth test current switch between a first terminal and a second terminal of the fourth test current switch, a fourth test current source for providing a fourth test current flow through the fourth test current switch, and a fourth current sensor for measuring a current flow through the fourth current switch, said first terminals of the fourth current switch and the fourth test current switch being electrically conductively connected to each other and to the first terminal of the fourth switch circuit, and said second terminals of the fourth current switch and the fourth test current switch being electrically conductively connected to each other and to the second terminal of the fourth switch circuit, whereby a fourth test current loop including the fourth current switch, the fourth current sensor, the fourth test current switch and the fourth test current source is formed;

wherein the first terminals of the first and third switch circuits are electrically conductively connected to each other, and wherein the second terminals of second switch circuit and the fourth switch circuit are electrically conductively connected to each other.

30. A circuit breaker according to claim 29, wherein when the third current switch and the third test current switch are closed, the third test current to be supplied by the third test current source can flow in the third test current loop and be measured by the third current sensor, and wherein when the fourth current switch and the fourth test current switch are closed, the fourth test current to be supplied by the fourth test current source can flow in the fourth test current loop and be measured by the fourth current sensor.

31. A circuit breaker according to claim 29 or 30, wherein the third switch circuit further comprises a third control circuit for providing the third control signal to the third current switch and the third test control signal to the third test current switch.

32. A circuit breaker according to claim 31 , wherein the third current sensor is adapted to output a third current output signal and the third control circuit is adapted to receive and read the third current output signal.

33. A circuit breaker according to any one of the claims 29-32, wherein the fourth switch circuit further comprises a fourth control circuit for providing the fourth control signal to the fourth current switch and the fourth test control signal to the fourth test current switch.

34. A circuit breaker according to claim 33, wherein the fourth current sensor is adapted to output a fourth current output signal and the fourth control circuit is adapted to receive and read the fourth current output signal.

35. A circuit breaker according to any one of the claims 29-34, wherein the third switch circuit further has a third voltage sensor for measuring a voltage including or representing the voltage across the third current switch.

36. A circuit breaker according to claim 35, wherein the third voltage sensor is adapted to output a third voltage output signal and the third control circuit is adapted to receive and read the third voltage output signal.

37. A circuit breaker according to any one of the claims 29-36, wherein the fourth switch circuit further has a fourth voltage sensor for measuring a voltage including the voltage across the fourth current switch.

38. A circuit breaker according to claim 37, wherein the fourth voltage sensor is adapted to output a fourth voltage output signal and the fourth control circuit is adapted to receive and read the fourth voltage output signal.

39. A circuit breaker according to any one of the claims 33-38, wherein the third and fourth control circuits are adapted to communicate with each other.

40. A circuit breaker according to any one of the claims 33-39, wherein the first, second, third and fourth control circuits are adapted to communicate with each other.

41. A circuit breaker according to claim 40, wherein the control circuits are adapted to perform self-tests of the first and second test current loops, and the first and second control circuits are adapted to control the current switches so that during a self-test of the first current loop, the first signal current switch and the first test current switch are closed at the same time during at least part of a period when the second signal current switch and the second test current switch are open, and the first and second control circuits are further adapted to control the current switches so that during a self-test of the second current loop, the second signal current switch and the second test current switch are closed at the same time during at least part of a period when the first signal current switch and the first test current switch are open.

42. A circuit breaker according to claim 40 or 41 , wherein the control circuits are adapted to perform self-tests of the third and fourth test current loops, and the third and fourth control circuits are adapted to control the current switches so that during a self-test of the third current loop, the third signal current switch and the third test current switch are closed at the same time during at least part of a period when the fourth signal current switch and the fourth test current switch are open, and the third and fourth control circuits are further adapted to control the current switches so that during a self-test of the fourth current loop, the fourth signal current switch and the fourth test current switch are closed at the same time during at least part of a period when the third signal current switch and the third test current switch are open.

43. A circuit breaker according to claim 41 and 42, wherein the control circuits are adapted to perform self-tests of the first, second, third and/or fourth test current loops when the circuit breaker is in an open state with the current switches being controlled so that during a self-test of a test current loop, the corresponding signal current switch and test current switch are closed at the same time during at least part of a period when the signal current switches and test current switches of the three remaining test current loops are all open.

44. A circuit breaker according to claim 41 and 42, wherein the control circuits are adapted to perform self-tests of the first, second, third and/or fourth test current loops when the circuit breaker is in a closed state with the current switches being controlled so that during a self-test of the first current loop, the first signal and test current switches are closed at the same time during at least part of a period when the second signal and test current switches are open, the third and fourth test cur- rent switches are open, and the third and forth signal current switches are closed, and so that during a self-test of the second current loop, the second signal and test current switches are closed at the same time during at least part of a period when the first signal and test current switches are open, the third and fourth test current switches are open, and the third and forth signal current switches are closed.

45. A circuit breaker according to claim 41 , 42 or 44, wherein the control circuits are adapted to perform self-tests of the first, second, third and/or fourth test current loops when the circuit breaker is in a closed state with the current switches being controlled so that during a self-test of the third current loop, the third signal and test current switches are closed at the same time during at least part of a period when the fourth signal and test current switches are open, the first and second test current switches are open, and the first and second signal current switches are closed, and so that during a self-test of the fourth current loop, the fourth signal and test current switches are closed at the same time during at least part of a period when the third signal and test current switches are open, the first and second test current switches are open, and the first and second signal current switches are closed.

46. A circuit breaker according to any one of the claims 29-45, wherein the first, second, third and fourth control circuits are electrically galvanic separated.

47. A circuit breaker according to claim 46, wherein the first, second, third and fourth control circuits are adapted to communicate with each other via optical communication.

48. A method of performing a test of a switch circuit being part of a circuit breaker according to any one of the claims 1-47, said method comprising: keeping both the signal current switch and the test current switch closed during a first period of time, and reading or detecting a current output signal value from the current sensor dur- ing said first period of time.

49. A method according to claim 48, said method further comprising: comparing the current output signal value obtained during said first period of time to a stored predetermined value representing the test current flow and based on said comparison determining whether a closed current failure signal should be generated or not.

50. A method according to claim 49, wherein a closed current failure signal is generated when the current output signal value obtained during said first period of time is smaller than the test current value or smaller than the test current value by a predetermined amount.

51. A method according to any one of the claims 48-50, said method further com- prising: keeping the signal current switch open and the test current switch closed during a second period of time, and reading or detecting a current output signal value from the current sensor during said second period of time.

52. A method according to claim 51 , said method further comprising: comparing the current output signal value obtained during said second period of time to a stored predetermined value representing a maximum leakage current and based on said comparison determining whether an open current failure signal should be generated or not.

53. A method according to claim 52, wherein an open current failure signal is generated when the current output signal value obtained during said second period of time is larger than the maximum leakage current value or larger than the maximum leakage current value by a predetermined amount.

54. A method according to claim 48 and any one of the claims 18-47, said method further comprising: reading or detecting a voltage output signal value from the voltage sensor dur- ing said first period of time.

55. A method according to claim 54, said method further comprising: comparing the current output signal value and the voltage output signal value obtained during said first period of time to a stored predetermined value represent- ing an on-resistance of the signal current switch, and based on said comparison determining whether a closed resistance failure signal should be generated or not.

56. A method according to claim 55, wherein a closed resistance failure signal is generated when a value representing a resistance value obtained from the current output signal value and the voltage output value obtained during said first period of time differs from a value representing the on-resistance value of the signal current switch by a predetermined amount.

57. A method according to any one of the claims 54-56, said method further com- prising: keeping the signal current switch open and the test current switch closed during a second period of time, reading or detecting a current output signal value from the current sensor during said second period of time, and reading or detecting a voltage output signal value from the voltage sensor during said second period of time.

58. A method according to claim 57, said method further comprising: comparing the current output signal value and the voltage output signal value obtained during said second period of time to a stored predetermined value representing an off-resistance of the signal current switch, and based on said comparison determining whether an open resistance failure signal should be generated or not.

59. A method according to claim 58, wherein an open resistance failure signal is generated when a value representing a resistance value obtained from the current output signal value and the voltage output value obtained during said second period of time differs from a value representing the off-resistance value of the signal current switch by a predetermined amount.

60. A method according to any one of the claims 48-59, wherein said reading or detecting of a current output signal value during the first period of time comprises several readings of an output signal from the current sensor during said first period of time.

61. A method according to any one of the claims 51 -60, wherein said reading or detecting of a current output signal value during the second period of time comprises several readings of an output signal from the current sensor during said second period of time.

62. A method according to any one of the claims 54-61 , wherein said reading or detecting of a voltage output signal value during the first period of time comprises several readings of an output signal from the voltage sensor during said first period of time.

63. A method according to any one of the claims 57-62, wherein said reading or detecting of a voltage output signal value during the second period of time comprises several readings of an output signal from the voltage sensor during said second period of time.

64. A method of performing a self-test of two series connected switch circuits being part of a circuit breaker according to any one of the claims 2-47, said method comprising: for the switch circuit being tested, performing a test according to any one of the claims 48-63, while for the switch circuit not being tested, keeping both the signal current switch and the test current switch open during at least said first and/or second period (s) of time.

65. A method of performing a self-test of two series connected switch circuits being part of a circuit breaker including four switch circuits according to any one of the claims 29-47, said method comprising: for the switch circuit being tested, performing a test according to any one of the claims 48-63, while for the switch circuit not being tested but being connected in series with the switch circuit under test, keeping both the signal current switch and the test current switch open during at least said first and/or second period(s) of time, and for the remaining two switch circuits keeping the signal current switches and the test current switches open during at least said first and/or second period(s) of time.

66. A method of performing a self-test of two series connected switch circuits being part of a circuit breaker including four switch circuits according to any one of the claims 29-47, said method comprising: for the switch circuit being tested, performing a test according to any one of the claims 48-63, while for the switch circuit not being tested but being connected in series with the switch circuit under test, keeping both the signal current switch and the test current switch open during at least said first and/or second period(s) of time, and for the remaining two switch circuits keeping the signal current switches closed and the test current switches open during at least said first and/or second period(s) of time.

67. A method according to any one of the claims 48-66, wherein each switch circuit comprises a corresponding control circuit for the control of the closing and open- ing of the signal current switch and the test current switch, and for the reading or detecting of the outputs of the current sensor and/or voltage sensor.

68. A configuration of circuit breakers, said configuration comprising: two or more two-switch element circuit breakers each having a first electronic switch circuit connected in series with a second electronic switch circuit, said first switch circuit having a first electronic control circuit and said second switch circuit having a second electronic control circuit, and a first main electronic control circuit and a second main electronic control circuit, wherein the first main control circuit and each first control circuit are part of a first communication ring, and wherein the second main control circuit and each second control circuit are part of a second communication ring.

69. A configuration of circuit breakers according to claim 68, wherein said two- switch element circuit breakers are selected from a circuit breaker according to any one of the claims 8-28.

70. A configuration of circuit breakers, said configuration comprising: two or more four-switch element circuit breakers each having a first electronic switch circuit connected in series with a second electronic switch circuit and a third electronic switch circuit connected in series with a fourth electronic switch circuit, with said first and second switch circuits being connected in parallel with the third and fourth switch circuits, each said switch circuits including a corresponding electronic control circuit, and a first main electronic control circuit and a second main electronic control cir- cuit, wherein the first main control circuit and each control circuit of the first and third switch circuits are part of a first communication ring, and wherein the second main control circuit and each control circuit of the second and fourth switch circuits are part of a second communication ring.

71. A configuration of circuit breakers according to claim 70, wherein said four- switch element circuit breakers are selected from a circuit breaker according to any one of the claims 33-47.

72. A configuration of circuit breakers according to any one of the claims 68-71 , wherein for a communication ring, each switch control circuit is linked via communication lines to two neighbouring switch control circuits or one neighbouring switch control circuit and the main control circuit.

73. A configuration of circuit breakers according to any one of the claims 68-72, wherein each of the main control circuits and each of the switch control circuits are electrically galvanic separated from one another.

74. A configuration of circuit breakers according to any one of the claims 68-73, wherein the first main control and the second main control circuit are adapted to communicate to each other.

75. A configuration of circuit breakers according to any one of the claims 68-74, wherein the first main control circuit and the second main control circuit each are adapted to receive or read a logic input signal.

76. A configuration of circuit breakers according to any one of the claims 68-75, said configuration further comprising one or more first input electronic detect circuits for detecting or receiving one or more corresponding logic input signals and for forwarding one or more corresponding output signals to the first main control circuit, and one or more second input electronic detect circuits for detecting or receiving one or more corresponding logic input signals and for forwarding one or more corresponding output signals to the second main control circuit.

77. A configuration of circuit breakers according to claim 76, wherein each logic input signal is input to both a first and a second input detect circuit.

78. A configuration of circuit breakers according to any one of the claims 68-77, wherein the first main control circuit has at least one communication line for forwarding and/or receiving information to and/or from a computer or system outside the first communication ring.

79. A configuration of circuit breakers according to any one of the claims 68-78, wherein the second main control circuit has at least one communication line for forwarding and/or receiving information to and/or from a computer or system outside the second communication ring.

80. A configuration of circuit breakers according to any one of the claims 76-79, wherein each of the main control circuits and each of the input detect circuits are electrically galvanic separated from one another.

81. A configuration of circuit breakers according to any one of the claims 68-80, wherein the main control circuits and the switch control circuits are adapted to communicate with each other via optical communication.

82. A configuration of circuit breakers according to any one of the claims 76-81 , wherein the main control circuits and the input detect circuits are adapted to communicate via optical communication.

83. A configuration of circuit breakers according to any one of the claims 78-82, wherein the main control circuits are electrically galvanic separated from any computer or system outside the first and/or second communication ring having a communication line to a main control circuit.