EP1573905A1 - Conservation de la linearite d'un amplificateur de puissance sans isolateur par ajustement dynamique de la polarisation de l'alimentation de dispositifs actifs - Google Patents

Conservation de la linearite d'un amplificateur de puissance sans isolateur par ajustement dynamique de la polarisation de l'alimentation de dispositifs actifs

Info

Publication number
EP1573905A1
EP1573905A1 EP03778618A EP03778618A EP1573905A1 EP 1573905 A1 EP1573905 A1 EP 1573905A1 EP 03778618 A EP03778618 A EP 03778618A EP 03778618 A EP03778618 A EP 03778618A EP 1573905 A1 EP1573905 A1 EP 1573905A1
Authority
EP
European Patent Office
Prior art keywords
amplifier circuit
output
signal
levels
amplified signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP03778618A
Other languages
German (de)
English (en)
Inventor
Saleh Osman
Richard F. Keenan
Jaroslaw Lucek
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Koninklijke Philips Electronics NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninklijke Philips Electronics NV filed Critical Koninklijke Philips Electronics NV
Publication of EP1573905A1 publication Critical patent/EP1573905A1/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/52—Circuit arrangements for protecting such amplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • H03F1/0205—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
    • H03F1/0261—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers with control of the polarisation voltage or current, e.g. gliding Class A
    • H03F1/0272—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers with control of the polarisation voltage or current, e.g. gliding Class A by using a signal derived from the output signal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32—Modifications of amplifiers to reduce non-linear distortion
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/02—Transmitters
    • H04B1/04—Circuits
    • H04B1/0466—Fault detection or indication
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/294—Indexing scheme relating to amplifiers the amplifier being a low noise amplifier [LNA]
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/372—Noise reduction and elimination in amplifier

Definitions

  • the invention relates to an isolator-free power amplifier circuit typically used in wireless communication devices which preserves linearity of the power amplifier under varying loads. More particularly, linearity is preserved by dynamically adjusting input and output bias of active devices of the power amplifier circuit.
  • Power amplifiers are used in transmitters to amplify signals, such as radio frequency (RF) signals. Such power amplifiers are included in transmitters of wireless communication devices, such as mobile telephones. The power amplifier typically provides an amplified RF signal to an antenna for transmission over the air.
  • RF radio frequency
  • RF antennas as for instance applied in mobile phones, operate in strongly varying environments, resulting in a varying antenna input impedance, a VSWR (Voltage Standing Wave Ratio) of 4: 1 is not uncommon. Especially at high output levels, this may result in a severe distortion of for instance a CDMA (code division multiple access), TDMA (time division multiple access), Edge or W-CDMA modulated carrier signal having a non- constant envelope.
  • the conventional solution to protect the power amplifier of a cellular phone against antenna mismatch conditions to preserve linearity is to use an isolator, such as a circulator, placed between the power amplifier and the output load, such as the antenna, to limit the effects of load impedance variation on the performance of the power amplifier.
  • the circulator secures proper 50 Ohm loading of the power amplifier under antenna mismatch conditions by dissipating the reflected power in the isolator or in a third circulator port termination. Directivity in the power flow is created by ferromagnetic material.
  • Fig. 1 shows a basic block diagram of an arrangement 10 used for a power source 12 isolated with a circulator 14 from a mismatched antenna 16.
  • a current source 18 and its impedance Z 0 represent an ideal power source (RF-transistor) 12.
  • a matching circuit 20 is connected between the antenna 16 and power source 12, with another terminal 22 connected to ground. Part of the power P- nc _ c - r c from the matching circuit 20 to the circulator 14 is delivered as Pi nc _a nt to the antenna 16 where some power is reflected back P re ⁇ _ ant to the circulator 14.
  • the reflected power P refl _ ant from the antenna 16 is not reflected towards the source 12, but dissipated into the circulator load P d j Ss . Consequently, the reflected power P re - ⁇ _circ from the circulator 14 and the reflected power Preti_ sour ce from the matching circuit 20 towards the source 12 are zero. This avoids extremes that would occur when incident and reflected waves add up in-phase.
  • the incident power Pi nc _ source from the source 12 has to be increased, thus increasing power dissipation, to overcome reflection losses resulting in enhanced signal voltage and current at the source 12.
  • the circulator 14 only partly preserves power amplifier linearity under antenna mismatch conditions.
  • power dissipation and consumption remains high thus requiring battery charging and decreasing battery life of the mobile phone as well as decreasing efficiency.
  • linear power output of a power amplifier is substantially maintained despite load variations and having no isolator connected to the load.
  • This is achieved by dynamically adjusting bias and supply of active devices in an isolator-less power amplifier circuit as a correction scheme for linearity under predetermined load mismatch conditions.
  • linear output power is kept unchanged for a predetermined load delta across the dynamic range of operation, without substantially decreasing efficiency.
  • linearity is substantially maintained constant despite load variations by independently and selectively adjusting the direct current (DC) bias at the input of the active devices as well as the DC supply at the output of the active devices to provide output signals with desired DC offsets.
  • DC direct current
  • an amplifier circuit for preserving linearity of an amplifier may be used in wireless communication devices, for example.
  • the amplifier circuit includes a driver stage with at least an active device for pre-amplification and output of a pre-amplified signal; and an output stage with active devices for further amplification of the pre-amplified signal and output an amplified signal.
  • a detector measures levels of forward and reflected parts of the amplified signal, and a control circuit modifies DC levels of the pre-amplified and/or amplified signal to substantially maintain linearity of the amplifier circuit with load variations.
  • the control circuit further independently and selectively controls and adjusts the DC bias at the input of the active devices of the driver and output stages as a function of the levels of the forward and reflected signals to substantially maintain linearity of amplifier circuit with load variations.
  • a method for substantially preserving linearity of an amplifier under varying loads includes measuring levels of forward and reflected signals at the amplifier output; and modifying output DC levels of at least one of a pre-amplified signal provided from the driver stage of the amplifier circuit and an amplified signal provided from the output stage of the amplifier circuit as a function of the measured levels, such as the difference or ratio of the measured forward and reflected signals, to substantially maintain linearity of the amplifier circuit with load variations.
  • the method further includes independently and selectively adjusting the DC bias at the input of the active devices of the driver stage and/or output stage as a function of the levels of the forward and reflected signals to substantially maintain linearity of amplifier circuit with load variations.
  • Fig. 1 shows a prior art block diagram of a power source isolated with a circulator from a mismatched antenna
  • Fig. 2 shows a wireless communication system according to the present invention
  • Fig. 3 shows an isolator-free amplifier circuit according to the present invention
  • Fig.4 shows a flow chart of a method for preserving performance, e.g., linearity, of an isolator-free amplifier circuit according to the present invention
  • Fig. 5 shows a summarized flow chart of the method for preserving performance, e.g., linearity, of an isolator-free amplifier circuit according to the present invention.
  • the wireless communication device may be for example a mobile cellular or cordless telephone, pager, an Internet appliance or other consumer devices, and is typically part of a communication system.
  • Fig. 2 shows a wireless communication system, such as a mobile telephone system 40 comprising a primary or base station (BS) 50 and a plurality of secondary or mobile stations (MS) 60.
  • the BS 50 comprises a network controller 52, such as a computer, coupled to a transceiver 54 which is in turn coupled to radio transmission means such as an antenna 56.
  • a connection means such as a wire 58 couples the controller 52 to a public or a private network.
  • Each MS 60 comprises a processor 62 such as a micro-controller ( ⁇ C) and/or a digital signal processor (DSP). Typically, the DSP processes voice signals, while the ⁇ C manages operation of the MS 60.
  • the processor 62 is coupled to a transceiver means 64 coupled to radio transmission means, e.g., an antenna 66.
  • a memory 68 such as an EPROM and RAM, is coupled to the processor 62 and stores data related to operation and configuration of the MS 60. Communication from the BS 50 to MS 60 takes place on a downlink channel 72, while communication from the MS 60 to BS 50 takes place on an uplink channel 74.
  • the MS 60 also includes a user interface such as a keyboard and a screen, as well as a microphone coupled to the transmit branch or section of the transceiver 64 and a speaker coupled to the receiver section of the transceiver 64.
  • the transmit section of the transceiver 64 transmits signals over the uplink channel 74, which the receive branch of the transceiver 64 receives signals over the downlink channel 72.
  • the transceiver 64 includes a selection means to selectively couple a power amplifier (PA) of the transmit section or a low noise amplifier (LNA) of the receive section to the antenna 66.
  • the selection means includes a duplexer or bandpass filters tuned to the transmit and receive frequency ranges, respectively.
  • the transceiver 64 also includes other circuits such as a down converter for converting the received radio frequency (RF) signals to intermediate frequency and/or baseband signals, and demodulator/decoder in the receive branch.
  • RF radio frequency
  • the transmit branch of the transceiver 64 includes an up converter and a modulator/encoder. Converters that convert between analog and digital formats are also typically present in the transceiver 64.
  • Fig. 3 shows an embodiment of an amplifier circuit 100 according to the present invention which is illustratively used as a power amplifier circuit to amplify RF signals in wireless communication devices.
  • the amplifier circuit 100 is part of the transceiver 64 of the MS 60 shown in Fig. 2, and more particularly, in the transmit branch of the transceiver 64.
  • the input of the amplifier circuit is coupled to a modulator and receives modulated RF signals for amplification.
  • the amplifier output is coupled to a load, such as the antenna 66, where the amplified RF signals are transmitted over the air on the uplink channel 74 for example.
  • the amplifier circuit 100 comprises an input match circuit 110 for buffering the input of the amplifier circuit 100 and matching its input impedance with the output impedance of the circuit coupled thereto, such as a modulator.
  • the output of the input match circuit 110 is coupled to a driver stage 120 through at least one DC blocking capacitor 130.
  • the signal to be amplified, such as a modulated signal is provided by the input match circuit 110 to the capacitor 130, which substantially blocks DC components and provides a signal substantially without a DC offset to the driver stage 120.
  • the driver stage 120 comprises a at least one active device, such as a transistor 140, which receives the substantially DC-free signal from the capacitor 130 for pre- amplification to a first level.
  • the pre-amplification transistor is a bipolar transistor, such as an NPN transistor 140 having a base 142 coupled to the capacitor 130.
  • the base 142 is further coupled to a bias control circuit 145 for providing a proper DC biasing signal.
  • the emitter of the transistor 140 is coupled to ground, while the output or collector 147 of the transistor 140 is coupled to an inter-stage match circuit 150 for buffering and impedance matching between the driver stage 120 and the input of an output stage 160.
  • the pre-amplified signal from the driver stage 120 is provided to the input of the output stage 160 through the inter-stage match circuit 150, and at least one DC blocking capacitor 170 for substantially blocking DC signals similar to the DC blocking capacitor 130.
  • the output stage 160 is similar to the driver stage 120 and also comprises at least one transistor 180 which receive the substantially DC-free signal from the capacitor 170 for amplification to the output level.
  • the output transistor 180 is a bipolar transistor, such as an NPN transistor having a base 182 coupled to the capacitor 170.
  • the base 182 of the output transistor 180 is further coupled to the bias control circuit 145 for providing the proper DC biasing signal the output transistor 180.
  • the emitter of transistor 180 is coupled to ground, while the output or collector 187 of the transistor 180 is directly or indirectly coupled to the load without any isolation therebetween. Further, the emitter area of each active device 140, 180 is selected such that optimum performance is achieved for a given load, inter-stage and source conditions.
  • each transistor 140, 180 is also independently coupled to the bias control circuit 145. This allows the bias control circuit 145 to independently and selectively change the DC level or offset of the pre-amplified signal at the output 147 of the transistor 140 and/or the DC level or offset of the amplified signal at the output 187 of the transistor 180. Further, having each input/control port, e.g., base 142, 182 of transistors 140, 180 independently coupled to the bias control circuit 145 allows the bias control circuit 145 to independently and selectively control, e.g., adjusts the DC bias at the input of the transistors 140, 180 thus modifying the amplification or gain of the driver and output stages 120, 160.
  • a measurement of the impedance condition is obtained as shown in block 200 of Fig.4.
  • the impedance level or mismatch is checked and if a normal or matched level is obtained, then normal matched operation is continued in block 220. If the impedance level or mismatch is not normal, then it is determined in block 230 whether the difference or ratio of the measured forward and reflected signals is high, indicating a relatively high forward signal, or low indicating a relatively low forward signal.
  • the DC bias on both the input and output of each driver and output transistor is independently and selectively adjusted in one direction or the other, depending on whether the ratio measured in block 230 was high or low.
  • the impedance condition is re-measured by returning to block 200 and the operations are repeated until a matched level is obtained in block 210 and normal matched operation is continued in block 220.
  • the monitoring and measurement of the impedance in block 200 are continuously or intermittently checked and adjustments are made, if needed, to arrive to the matched condition of block 220.
  • a detector such as a power detector 190, is also coupled to the output 187 of the transistor 180 for detecting the level, e.g., the power level, of the amplified RF signal at the output of the output stage 160.
  • the power detector 190 is in turn coupled to the bias control circuit 145.
  • the output 195 of the amplifier circuit 100 is coupled to an antenna without an isolator therebetween.
  • the power detector 190 provides the DC bias control circuit 145 a measure of the forward and reflected output power of the amplifier circuit 100.
  • the DC bias control circuit 145 independently and selectively modifies the DC level of the pre-amplified signal at the output 147 of the driver stage transistor 140 and/or the DC level of the amplified signal at the output 187 of the output stage transistor 180 to substantially maintain constant linearity of the amplifier circuit 100 with load variations.
  • the control circuit 145 further independently and selectively controls and adjusts the DC bias at the input 142, 182 of the active devices 140, 180 of the driver and output stages 120, 160 as a function of the levels of the forward and reflected signals to substantially maintain constant the linearity of the amplifier circuit 100 despite variations in the impedance of the load connected to the output 195 of the amplifier circuit 100.
  • the bias control circuit 145 independently and selectively adjusts the DC bias on both the input e.g., base 142, 182, and output, e.g., collector 147, 187, of each driver and output transistor 140, 160, in response to the difference between the forward and reflected power level in response to the difference between the forward and reflected power level.
  • This substantially maintains linear output power despite load variations without significantly modifying the output stage of the power amplifier circuit.
  • the optimum real impedance of a collector is proportional to the ratio of half the collector supply voltage squared and the output power: Ro P t ⁇ Vcc 2 /(2*P 0 ut)- Therefore a change in load impedance is accommodated for by a change in R opt and input bias in accordance with the required P out and linearity.
  • the changes in the forward and reflected power levels measured by the power detector 190 is related to changes in the load impedance, e.g., the impedance of the antenna 66 shown in Fig. 2.
  • the load impedance e.g., the impedance of the antenna 66 shown in Fig. 2.
  • the ratio or the difference between the forward and reflected power levels is high, while it is low for substantially mismatched impedances.
  • 5,423,082 which is incorporated herein by reference in its entirety, discloses a transmitter that includes a closed loop feedback to compensate for varying antenna loads without an isolator, which is accomplished by taking the reflected output energy into account to maintain a constant overall loop gain by adjusting the gain of variable gain stages.
  • Bias control circuits are also well known in the art, such as the bias control circuit disclosed in U.S. Patent Nos. 5,442,322 and 5,712,593 which are incorporated herein by reference in its entirety.
  • a bias control circuit compares a bias control voltage with a value indicative of the current in an active device and provides a control signal to the control terminal of the active device to control the operating point thereof.
  • the bias point of a power amplifier is similarly controlled in U.S. Patent No. 5,712,593 by a control circuit in response to comparing a reference value to a filtered portion of the RF output signal. Changing the amplifier bias point limits the effect of the load impedance variation on the amplifier performance.
  • 6,064,266 which is incorporated herein by reference in its entirety, is also related to limiting the effect of the load impedance variation on the amplifier performance, which is achieved by modifying the RF output signal path, instead of the DC bias, by switching in .a resistor in parallel with the output impedance when a threshold detector detects variations in the load impedance above a predetermined value.
  • the bias control circuit 145 of the present amplifier circuit 100 may include a processor or a comparator for comparing the values of forward and reflected power levels measured by the power detector 190 with at least one threshold value.
  • the DC bias control circuit 145 modifies DC levels or offsets of the pre- amplified and/or amplified signals provided by the transistors 140, 180 of the driver and output stages as necessary, namely, as a function of the levels of the forward and reflected signals, to substantially maintain constant the linearity of the amplifier circuit 100 with load variations.
  • the bias control circuit 145 further independently and selectively controls and adjusts the DC bias at the input of the transistors 140, 180 of the driver and output stages as a function of the levels of the forward and reflected signals to substantially maintain constant linearity of amplifier circuit with load variations.
  • Fig. 5 shows a flow chart 300 of a method for preserving performance of an isolator-free amplifier circuit according to the present invention.
  • the power detector measures the forward and reflected power levels at the output of the amplifier circuit and provides this information to the bias control circuit 145.
  • the control circuit 145 selectively and independently modifies DC levels or offsets of the pre-amplified and/or amplified signals provided by the transistors 140, 180 of the driver and output stages as necessary, namely, as a function of the levels of the forward and reflected signals, to substantially maintain constant the linearity of the amplifier circuit 100 with load variations.
  • the bias control circuit 145 further independently and selectively controls and adjusts the DC bias at the input of the transistors 140, 180 of the driver and output stages as a function of the levels of the forward and reflected signals to substantially maintain constant linearity of amplifier circuit 100 with load variations.

Abstract

L'invention porte sur un circuit (100) amplificateur comprenant un étage d'attaque (120) pourvu d'au moins un dispositif actif (140) pour la pré-amplification et l'émission d'un signal pré-amplifié; et un étage de sortie (160) pourvu d'au moins un dispositif actif (180) pour une autre amplification du signal pré-amplifié et l'émission d'un signal amplifié. Un détecteur (190) mesure les intensités des parties vers l'avant et réfléchies du signal amplifié, et un circuit de commande (145) modifie les intensités ou décalages en continu des signaux pré-amplifiés et/ou amplifiés afin de maintenir sensiblement la linéarité du circuit amplificateur (100) à variations de charge. Le circuit de commande (145) commande et ajuste également, indépendamment et sélectivement, la polarisation du courant continu à l'entrée des dispositifs actifs (140, 180) des étages d'attaque et de sortie (120, 160) en fonction des niveaux des signaux vers l'avant et réfléchis afin de maintenir sensiblement la linéarité du circuit amplificateur (100) à variations de charge.
EP03778618A 2002-12-12 2003-12-10 Conservation de la linearite d'un amplificateur de puissance sans isolateur par ajustement dynamique de la polarisation de l'alimentation de dispositifs actifs Withdrawn EP1573905A1 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US43293902P 2002-12-12 2002-12-12
US432939P 2002-12-12
PCT/IB2003/005939 WO2004054096A1 (fr) 2002-12-12 2003-12-10 Conservation de la linearite d'un amplificateur de puissance sans isolateur par ajustement dynamique de la polarisation de l'alimentation de dispositifs actifs

Publications (1)

Publication Number Publication Date
EP1573905A1 true EP1573905A1 (fr) 2005-09-14

Family

ID=32508016

Family Applications (1)

Application Number Title Priority Date Filing Date
EP03778618A Withdrawn EP1573905A1 (fr) 2002-12-12 2003-12-10 Conservation de la linearite d'un amplificateur de puissance sans isolateur par ajustement dynamique de la polarisation de l'alimentation de dispositifs actifs

Country Status (5)

Country Link
EP (1) EP1573905A1 (fr)
JP (1) JP2006510258A (fr)
CN (1) CN1723614A (fr)
AU (1) AU2003285622A1 (fr)
WO (1) WO2004054096A1 (fr)

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US8716984B2 (en) 2009-06-29 2014-05-06 Advanced Energy Industries, Inc. Method and apparatus for modifying the sensitivity of an electrical generator to a nonlinear load
US8868011B2 (en) * 2012-04-30 2014-10-21 Triquint Semiconductor, Inc. Power amplifier with fast loadline modulation
US9728378B2 (en) 2014-05-02 2017-08-08 Reno Technologies, Inc. Method for controlling an RF generator
US10431428B2 (en) 2014-01-10 2019-10-01 Reno Technologies, Inc. System for providing variable capacitance
US9345122B2 (en) 2014-05-02 2016-05-17 Reno Technologies, Inc. Method for controlling an RF generator
US10284238B1 (en) * 2018-06-11 2019-05-07 Texas Instruments Incorporated DC coupled radio frequency modulator

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Also Published As

Publication number Publication date
CN1723614A (zh) 2006-01-18
JP2006510258A (ja) 2006-03-23
WO2004054096A1 (fr) 2004-06-24
AU2003285622A1 (en) 2004-06-30

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