EP1565994A1 - Reglage de phase au niveau chip - Google Patents

Reglage de phase au niveau chip

Info

Publication number
EP1565994A1
EP1565994A1 EP03774851A EP03774851A EP1565994A1 EP 1565994 A1 EP1565994 A1 EP 1565994A1 EP 03774851 A EP03774851 A EP 03774851A EP 03774851 A EP03774851 A EP 03774851A EP 1565994 A1 EP1565994 A1 EP 1565994A1
Authority
EP
European Patent Office
Prior art keywords
component
phase
filtered
unfiltered
representation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
EP03774851A
Other languages
German (de)
English (en)
Inventor
Anand P. Narayan
Prashant Jain
Eric S. Olson
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TensorComm Inc
Original Assignee
TensorComm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by TensorComm Inc filed Critical TensorComm Inc
Publication of EP1565994A1 publication Critical patent/EP1565994A1/fr
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/69—Spread spectrum techniques
    • H04B1/707—Spread spectrum techniques using direct sequence modulation
    • H04B1/7097—Interference-related aspects
    • H04B1/7103—Interference-related aspects the interference being multiple access interference
    • H04B1/7107—Subtractive interference cancellation

Definitions

  • This invention generally relates to communication systems. More specifically, the invention relates to adjusting phase of a spread spectrum signal, such as a Code Division Multiple Access (“CDMA”) signal or a Wideband CDMA signal (“WCDMA”). CDMA signaling and WCDMA signaling are known to those in the art.
  • CDMA Code Division Multiple Access
  • WCDMA Wideband CDMA
  • PN codes used for spreading a communication signal are known to those skilled in the art.
  • a base station will transmit a CDMA signal to a subscriber unit, such as a cell phone.
  • the signal itself may be a QPSK signal comprising an in-phase component and a quadrature component also known as the I and Q components, respectively.
  • Digital data may be transmitted through either or both of these I and Q components.
  • the data is despread at the receiving subscriber unit by combining the I and Q with the same PN code used to spread the data.
  • the subscriber unit thereby extracts the data and converts it to a desired format, such as voice, for example.
  • extraction of the data may include combining the data with an orthogonal code sequence, such as a Walsh Code sequence.
  • the underlying data may include a plurality of channels.
  • a channel refers to an encoded bit spread by an orthogonal code, such as the Walsh code. The same orthogonal code used to encode the data at the transmitter side is subsequently used to extract the data at the receiver side.
  • the transmitter may send a reference signal known as a pilot signal.
  • This pilot signal is typically used as a phase reference for the received data.
  • the pilot signal may be used to adjust or rotate the phase of the QPSK signal to a predetermined phase quadrant so that the underlying data may be correctly recovered. Since the pilot signal typically conveys no data and uses a zero sequence for encoding, the pilot signal exists in a single predetermined phase quadrant. Accordingly, if the pilot signal is detected in an incorrect phase quadrant, the pilot signal, and thus the underlying data, can be rotated in phase to the correct phase quadrant.
  • Such approaches to rotating the phase also referred to as carrier phase recovery, exist in the art, but these approaches operate at a symbol level as they are used for data recovery of a single channel within the underlying data.
  • one prior art system combines a Walsh code sequence with each of the I and Q components of a signal immediately after those components are despread. This system is efficient in determining the magnitude of a channel selected for data recovery.
  • a plurality of Walsh codes is needed to determine the magnitude of multiple channels.
  • the additional Walsh codes contribute to the complexity of the system because more components (e.g., filters, accumulators and multipliers) are needed.
  • each channel requires a multiplication of the Walsh code to the I and Q components, more processing power is consumed due to the extraction of multiple channels.
  • interference cancellation receivers can be used to assist in the isolation and extraction of individual channels within spread spectrum signals.
  • Prior examples of interference cancellation receivers include U.S. Patent No. 5,930,229 (issued July 27, 1999) and U.S. Patent No. 5,872,776 (issued Feb. 16, 1999); these examples may provide useful background information.
  • the phase rotation of some prior art systems is particularly inefficient for interference cancellation purposes because of the multiple code sequences necessary for extracting data from each channel within a given signal. For example, in isolating an intended channel, each of the unintended channels is considered as a potential interferer with the intended channel; therefore, the unintended channels must be identified so that any potential interference can be countered and the data may be correctly extracted from the intended channel. Since each channel requires its own code sequence for data extraction, a receiver's complexity is inherently increased through the addition of various components necessary for the data extraction.
  • the present invention provides a system that can rotate or adjust phase of a signal.
  • a system in one embodiment, includes a phase compensator configured for adjusting phase of the signal based on filtered and unfiltered representations of a first component of the signal and based on filtered and unfiltered representations of a second component of the signal.
  • the phase compensator may provide phase adjusted I and Q components of a QPSK signal through a plurality of vector multiplications of filtered and unfiltered I and Q components.
  • the system also includes a detector that is communicatively coupled to one or more outputs of the phase compensator and configured for combining the first and the second components with a code sequence to determine a magnitude of energy of a channel.
  • a system comprises: a phase compensator configured for adjusting phase of a signal based on filtered and unfiltered representations of a first component of the signal and based on filtered and unfiltered representations of a second component of the signal; and a detector communicatively coupled to one or more outputs of the phase compensator and configured for combining the first and the second components with a code sequence to determine a magnitude of energy of a channel.
  • the first component is an in-phase component substantially conforming to the following:
  • I u nfiltered i s an unfiltered representation of the in-phase component
  • K-cos ⁇ is the filtered representation of the in-phase component
  • Q Unfiltered is an unfiltered representation of the quadrature component
  • K- ⁇ n ⁇ is the filtered representation of the quadrature component.
  • the second component is a quadrature component substantially conforming to the following:
  • K • cos ⁇ is the filtered representation of the in-phase component
  • Q Unflllered is an unfiltered representation of the quadrature component
  • K- n ⁇ is the filtered representation of the quadrature component.
  • the code sequence is a Walsh code sequence.
  • the detector comprises one or more code sequence generators each configured for generating a unique code sequence.
  • the detector further comprises: a first multiplier communicatively coupled to the code sequence generators and configured for combining the first component with one or more of the code sequences to generate a combined first component; and a second multiplier communicatively coupled to the code sequence generators and configured for combining the second component with one or more of the code sequences to generate a combined second component.
  • the detector further comprises an accumulator communicatively coupled to the first and the second multipliers for summing the combined first component over a symbol duration to generate a first symbol level data and for summing the combined second component over a symbol duration to generate a second symbol level data.
  • the detector comprises a fast Walsh transform element configured for combining the first and the second components with a plurality of Walsh code sequences to determine magnitudes of energy of one or more unique channels.
  • a method of adjusting phase of a signal comprises: generating a phase adjusted first component of the signal by multiplying an unfiltered first component of the signal with a filtered first component of the signal to provide a first product, multiplying an unfiltered second component of the signal with a filtered second component of the signal to provide a second product, and combining the first and the second products in response to multiplying to generate the phase adjusted first component; and generating a phase adjusted second component of the signal by multiplying the unfiltered second component with the filtered first component to provide a third product, multiplying the unfiltered first component with the filtered second component to provide a fourth product, and combining the third and the fourth products in response to multiplying to generate the phase adjusted second component, wherein generating the phase adjusted first component and generating the phase adjusted second component adjusts the phase of the
  • combining the first and the second products comprises adding the first product to the second product.
  • adding comprises providing the phase adjusted second component having substantially the following form:
  • I u nfiltere * s an unfiltered representation of the in-phase component
  • K- cos ⁇ is the filtered representation of the in-phase component
  • Q ⁇ n ⁇ tered is an unfiltered representation of the quadrature component
  • K - sin ⁇ is the filtered representation of the quadrature component.
  • combining the third and the fourth products comprises subtracting the fourth product from the third product.
  • subtracting comprises providing the phase adjusted second component having substantially the following form:
  • K-cos ⁇ is the filtered representation of the in-phase component
  • Q Unflltered is an unfiltered representation of the quadrature component
  • K- sin ⁇ is the filtered representation of the quadrature component.
  • generating the phase adjusted first component comprises: latching the first product and the second product to a summation element at substantially the same time.
  • generating the phase adjusted second component comprises: latching the third product and the fourth product to a subtractive element at substantially the same time.
  • a system for adjusting phase of a signal comprises: means for generating a phase adjusted first component of the signal comprising means for multiplying an unfiltered first component of the signal with a filtered first component of the signal to provide a first product, means for multiplying an unfiltered second component of the signal with a filtered second component of the signal to provide a second product, and means for combining the first and the second products in response to multiplying to generate the phase adjusted first component; and means for generating a phase adjusted second component of the signal comprising means for multiplying the unfiltered second component with the filtered first component to provide a third product, means for multiplying the unfiltered first component with the filtered second component to provide a fourth product, and means for combining the third and the fourth products in response to multiplying to generate the phase adjusted second component, wherein generating the phase adjusted first component and generating the phase adjusted second component adjusts the phase of the signal.
  • the means for combining the first and the second products comprises means for adding the first product to the second product.
  • the means for adding comprises means for providing the phase adjusted second component having substantially the following form:
  • I ⁇ filter d * s an unfiltered representation of the in-phase component
  • K- cos ⁇ is the filtered representation of the in-phase component
  • Q U ⁇ /Utered is an unfiltered representation of the quadrature component
  • K ⁇ sin ⁇ is the filtered representation of the quadrature component.
  • the means for combining the third and the fourth products comprises means for subtracting the fourth product from the third product.
  • the means for subtracting comprises means for providing the phase adjusted second component having substantially the following form:
  • K- cos ⁇ is the filtered representation of the in-phase component
  • Q Unflhered is an unfiltered representation of the quadrature component
  • K ⁇ sin ⁇ is the filtered representation of the quadrature component.
  • the means for generating the phase adjusted first component comprises means for latching the first product and the second product to a summation element at substantially the same time.
  • the means for generating the phase adjusted first component comprises: means for latching the third product and the fourth product to a subtractive element at substantially the same time.
  • a method for processing a signal comprises: adjusting phase of a first component of the signal through a plurality multiplications, operands of which include filtered and unfiltered representations of the first component and which include filtered and unfiltered representations of a second component of the signal, to generate a phase adjusted first component; adjusting phase of the second component through a plurality multiplications, operands of which include the filtered and the unfiltered representations of the first component and which include the filtered and the unfiltered representations of the second component, to generate a phase adjusted second component; combining the phase adjusted first component and the phase adjusted second component with a code sequence to determine a magnitude of energy of a channel.
  • adjusting the phase of the second component comprises adding products generated from the multiplications to generate the phase adjusted second component having substantially the following form:
  • K-cos ⁇ is the filtered representation of the in-phase component
  • Q UnflUered is an unfiltered representation of the quadrature component
  • K-sin ⁇ is the filtered representation of the quadrature component.
  • a system comprises: a despreader configured for despreading first and second components of a signal; a filter bank communicatively coupled to the despreader and configured for filtering the first and the second components of the signal to generate a filtered representation of the first component and a filtered representation of the second component; and a phase compensator coupled to the despreader and to the filter bank and configured for adjusting phase of the signal based on the filtered representations of the first and the second components and based on unfiltered representations of the first and the second components.
  • Figure 1 illustrates a block diagram of a prior art system.
  • Figure 2 illustrates a block diagram of a system in one embodiment of the invention.
  • Figure 3 illustrates a block diagram of a system in another embodiment of the invention.
  • Figure 4 illustrates a block diagram of a phase compensator in one embodiment of the invention.
  • Figure 5 illustrates a block diagram of a system in another embodiment of the invention.
  • Figure 6 illustrates a flow chart of one example of a methodical embodiment of the invention.
  • FIG. 1 illustrates a block diagram of prior art system 100.
  • System 100 is a spread spectrum receiver that extracts data from received I and Q data streams of a QPSK signal.
  • System 100 includes a QPSK despreader 102 that despreads the I and Q data streams using PN codes.
  • the resultant despread I and Q data streams are provided to filters 104-1 and 104-Q, respectively.
  • Filters 104-1 and 104-Q respectively filter the I and Q data streams.
  • the filtered outputs of filters 104-1 and 104-Q are subsequently used as references for the carrier phase of the signal.
  • the resultant I and Q data streams are also provided to logical multipliers 109-1 and 109-Q, respectively.
  • Multipliers 109-1 and 109-Q perform a modulo 2 sum addition on the despread I and Q data streams, respectively, with a Walsh code 110.
  • Walsh sequence generator 103 provides the Walsh code 110 to both multipliers 109-1 and 109-Q.
  • Multipliers 109-1 and 109-Q thereby provide modulo 2 summed I and Q data streams to accumulators 105-1 and 105-Q, respectively.
  • Such logical math is well known to those skilled in the art.
  • Accumulators 105-1 and 105-Q accumulate a predetermined number of bits subsequently encoded and provided by multipliers 109-1 and 109-Q, respectively. Accumulators are also known to those skilled in the art.
  • the unfiltered I and Q data streams output from accumulators 105-1 and 105-Q represent channel data.
  • Each of filters 104-1 and 104-Q and accumulators 105-1 and 105-Q transfer their respective data streams to dot product module 106.
  • Dot product module 106 generates a rotated data sample subsequently used by processor 108, as described in the '865 patent. For example, dot product module 106 generates the dot product between a pilot signal vector and a data signal vector in the I-Q coordinate space. The dot product conforms to the equation:
  • R is the pilot signal vector
  • D is the data signal vector
  • ⁇ is the angle between the two vectors.
  • the land Q subscripts represent I and Q components of the associated vector.
  • These equations relate to the rotation of phase on a symbol level basis of the QPSK signal. For example, phase rotation is performed on a symbol of the signal wherein each symbol represents multiple bits, such as two bit per symbol in a QPSK signal.
  • FIG. 1 illustrates a block diagram of system 200 in one embodiment of the invention.
  • System 200 comprises phase compensator 201 configured for adjusting phase of a signal based on filtered and unfiltered representations of an I component of a QPSK signal and based on filtered and unfiltered representations of a Q component of the signal.
  • phase compensator 201 receives both a filtered and an unfiltered representation of the I component.
  • Phase compensator 201 also receives both a filtered and an unfiltered representation of the Q component.
  • These I and Q components may be resultant data streams of QPSK despreading.
  • Phase compensator 201 may multiply various combinations of these inputs to adjust the phase of the I and Q components, i adjusting the phase, phase compensator 201 may determine an amount of angular offset in the phase based on the products of these multiplications.
  • phase compensator 201 may compensate the signal such that unintentional phase rotations can be accounted for. Such a compensation may equate to a symbolic rotation of the phase to a desired quadrant. Since phase adjustment may be performed subsequent to despreading (e.g., without the combination of Walsh codes as seen in Figure 1), phase adjustment is performed on a chip level basis, wherein a chip is a fundamental unit of information and well known to those skilled in the art.
  • system 200 comprises detector 202 communicatively coupled to phase compensator 201 through link 203.
  • link 203 may represent one or more outputs of phase compensator 201 that transfers phase adjusted I and Q outputs to detector 202.
  • Detector 202 is configured for combining the I and Q components with one or more code sequences to determine a magnitude of energy of one or more channels.
  • detector 202 may combine phase adjusted I and Q components from phase compensator 201 with a Walsh code sequence.
  • detector 202 may provide I and Q components that are phase adjusted (e.g., rotated) and encoded with a code sequence that allows energy magnitudes of other channels within the signal to be determined through additional processing.
  • system 200 may also be useful particularly useful and interference cancellation systems.
  • channel energy magnitudes of multiple channels may be determined through the addition of multiple code sequences.
  • multiple code sequences may be added to system 200 without substantially increasing the complexity of the system, this embodiment, the combination of code sequences with the phase adjusted I and Q components is performed after phase adjustment occurs. Consequently, there are fewer multiplications to be performed by phase compensator 201 as the I and Q data streams.
  • Figure 3 illustrates a block diagram of system 300 in another embodiment of the invention.
  • system 300 may advantageously require use in a spread spectrum receiver that uses a chip-wise multiply for resolving I and Q components of underlying data.
  • System 300 includes QPSK despreader 301.
  • Despreader 301 receives I and Q component data streams and subsequently despreads these I and Q streams. After despreading, despreader 301 transfers the data streams to phase compensator 303 both directly and through filters 302-1 and 302-Q.
  • despreader 301 is communicatively coupled to filters 302-1 and 302-Q.
  • Filters 302-1 and 302-Q are configured to respectively filter the despread I component 310 and Q component 311 and provide filtered representations of the despread I (312) and Q (313) components. These filtered representations may substantially conform to the following equations:
  • Q Filtered K- s ⁇ n ⁇ , where K-sin ⁇ is the mathematical representation of the filtered Q component.
  • K refers to a scale factor representing the strength of the reference signal (i.e., the pilot signal).
  • PLL Phase Lock Loop
  • K may be considered as unity, or 1.
  • the angle ⁇ may be considered as a residual carrier phase that represents an angle of deviation (e.g., unintended rotation of the phase) from transmitted values. For example, due to calculation errors such as those produced in in down conversion and/or demodulation, energy levels from other channels within the signal may "leak” and cause angular deviation.
  • Filters 302-1 and 302-Q may be digital filters that digitally filter samples of the I and Q data streams on a sample-by-sample basis.
  • Phase compensator 303 produces phase adjusted I and Q data streams 314 and
  • Phase compensator 303 then transfers the phase adjusted I and Q data streams 314 and 315 to multipliers 309-1 and 309-Q, respectively.
  • Multipliers 309-1 and 309-Q subsequently combine the I and Q data streams 314 and 315 with one or more Walsh codes as generated by Walsh sequence generator 304.
  • a plurality of Walsh codes may be communicatively coupled to multipliers 309-1 and 309-Q such that a plurality of channels may be isolated and or extracted.
  • multipliers 309-1 and 309-Q transfer the combined I and Q components 316 and 317, respectively, to accumulator 305.
  • Accumulator 305 correspondingly accumulates, or sums, the combined components 316 and 317 over a symbol duration to generate symbol level data.
  • This symbol level data is ultimately processed by processor 306, which may in turn determine energy level magnitudes of various channels within the signal and/or phase offsets within the signal.
  • system 300 is not intended to be limited to the illustration, but rather only by the claims.
  • a single Walsh generator may be used.
  • FIG. 4 illustrates a block diagram of a phase compensator 400 in one embodiment of the invention.
  • Phase compensator 400 may be used to adjust the phase of a signal in a manner that is similar to that of phase compensator 303 of Figure 3.
  • a plurality of latches 402..408 are used to latch filtered and unfiltered representations of the I and Q data streams at substantially the same time as each latch receives the same latch enable signal LATCH ENABLE.
  • multiplier 410 generates a product of ⁇ u nfilte d " ⁇ ' sm ⁇ *) > multiplier 412 generates a product of (l Unflllered -K -cos ⁇ ), multiplier
  • phase adjusted I and Q components represent the I and Q components 314 and 315 produced by phase adjuster 303 of Figure 3. As such, these phase adjusted I and Q components have no PN codes or residual carrier phase. These I and Q components are typically used in magnitude determinations of channels. Such determinations may be performed by a processor, such as processor 306 of Figure 3.
  • FIG. 5 illustrates a block diagram of system 500 in another embodiment of the invention.
  • system 500 replaces the multipliers 309-1 and 309-Q and Walsh sequence generator 304, each of Figure 3, with a Fast Walsh Transform 501.
  • Phase adjustment is still performed by the phase compensator 303 as was performed in Figure 3.
  • Fast Walsh Transform 501 is capable of incorporating a plurality of Walsh codes thereby expediting the multiplication process previously performed by the multipliers 309-1 and 309-Q through a matrices calculations.
  • the use of such a Walsh transform 501 is disclosed in U.S. Provisional Patent Application No. 60/418,187 (filed Oct. 15, 2002).
  • Figure 6 illustrates a flow chart of one example of a methodical embodiment 600 of the invention.
  • phase of a signal adjusted using various products of first and second components of the signal, such as I and Q components of a QPSK signal.
  • Each component is phase adjusted in elements 601 and 611.
  • Each of elements 601 and 611 comprises additional features to provide such phase adjusted components.
  • an unfiltered first component of the signal is multiplied with a filtered first component of the signal, in element 602.
  • an unfiltered second component of the signal is multiplied with a filtered second component of the signal, in element 603.
  • the products of element 602 and 603 are then combined to generate a phase adjusted first component, in element 604.
  • Such a combination may include adding the products to produce a component such as that shown in Eq. 5 of Figure 4.
  • the unfiltered second component of the signal is multiplied with the filtered first component, in element 612, and, in element 613, the unfiltered first component of the signal is multiplied with the filtered second component.
  • These two products are then combined in element 614 to generate a phase adjusted second component.
  • the two phase adjusted components provided in elements 604 and 614 result in a phase adjusted signal.
  • the phase adjusted I and Q components thereby provide a phase determinable signal such that an underlying pilot signal may be phase adjusted to a desired quadrant.
  • the method includes an element in which the phase adjusted I and Q components are combined with one or more code sequences.
  • code sequences may include Walsh codes that are used to detect one or more channels within the signal. Such channel detection may advantageously require use within a CDMA cellular telephony system, particularly in a subscriber unit such as cell phone.
  • the elements of multiplying are performed synchronously.
  • the invention is not intended to be limited to the order in which multiplying occurs.
  • multiplying may be performed in a time-multiplexed fashion in which products are stored until multiplying is complete.
  • multiplying is performed on a sample-by-sample basis.
  • other embodiments may include registering a predetermined length of data such that different sections of the first and second components may be phase adjusted at the same time.
  • the embodiments are not intended to be limited to CDMA2000 or other CDMA systems as they may be employed in any system using PSK.
  • the above embodiments may be used in PSK applications such as channel estimation for interference cancellation, data testing for determining the presence of multiple Walsh codes, and/or simultaneously demodulating data of multiple channels.

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
  • Mobile Radio Communication Systems (AREA)

Abstract

Dans un système à accès multiple par répartition en code (CDMA) ou à accès multiple par répartition en code à bande élargie (WCDMA), la correction de phase est effectuée au niveau chip, c'est-à-dire avant le désétalement (Walsh et PN utilisateur). La correction est effectuée par calcul du produit interne entre les signaux pilotes désétalés et le signal de données reçu non désétalé.
EP03774851A 2002-10-15 2003-10-15 Reglage de phase au niveau chip Ceased EP1565994A1 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US41818802P 2002-10-15 2002-10-15
US418188P 2002-10-15
PCT/US2003/032757 WO2004036783A1 (fr) 2002-10-15 2003-10-15 Reglage de phase au niveau chip

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EP1565994A1 true EP1565994A1 (fr) 2005-08-24

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JP (1) JP2006503499A (fr)
CN (1) CN100550664C (fr)
AU (1) AU2003282858A1 (fr)
WO (1) WO2004036783A1 (fr)

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WO2006093723A2 (fr) 2005-02-25 2006-09-08 Data Fusion Corporation Limitation d'interference dans un signal
US7577779B2 (en) * 2006-02-14 2009-08-18 Broadcom Corporation Method and system for a RFIC master

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GB9315845D0 (en) * 1993-07-30 1993-09-15 Roke Manor Research Apparatus for use in equipment providing a digital radio link between a fixed and a mobile radio unit

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WO2004036783A1 (fr) 2004-04-29
CN1726655A (zh) 2006-01-25
CN100550664C (zh) 2009-10-14
JP2006503499A (ja) 2006-01-26
AU2003282858A1 (en) 2004-05-04

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