EP1561153A2 - Temperature-compensated current reference circuit - Google Patents
Temperature-compensated current reference circuitInfo
- Publication number
- EP1561153A2 EP1561153A2 EP03749655A EP03749655A EP1561153A2 EP 1561153 A2 EP1561153 A2 EP 1561153A2 EP 03749655 A EP03749655 A EP 03749655A EP 03749655 A EP03749655 A EP 03749655A EP 1561153 A2 EP1561153 A2 EP 1561153A2
- Authority
- EP
- European Patent Office
- Prior art keywords
- channel mos
- coupled
- mos transistor
- drain
- resistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is dc
- G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
- G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
- G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
- G05F3/24—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only
- G05F3/242—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only with compensation for device parameters, e.g. channel width modulation, threshold voltage, processing, or external variations, e.g. temperature, loading, supply voltage
- G05F3/245—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only with compensation for device parameters, e.g. channel width modulation, threshold voltage, processing, or external variations, e.g. temperature, loading, supply voltage producing a voltage or current as a predetermined function of the temperature
Definitions
- the present invention relates to current-reference circuits. More particularly, the present invention relates to temperature-compensated current-reference circuits. 2.
- FIG. 1 Numerous techniques exist for designing current references to be unaffected by supply- oltage and temperature variations.
- One way to generate a current reference that is robust with respect to supply- voltage variation but sensitive to temperature variation is to employ two current mirrors and a resistor as shown in FIG. 1.
- the current through p-channel MOS transistor 10 is mirrored through p-channel MOS transistor 12.
- the current through n- channel MOS transistor 14 is mirrored through n-channel MOS transistor 16, having resistor 18 coupled between its source and ground.
- the circuit of FIG. 1 has a current variation of up to about 30% as a function of temperature.
- P-channel MOS transistors 20 and 22 have their gates driven from the output of operational amplifier 24.
- PNP bipolar transistor 26 has its emitter coupled to the drain of p- channel MOS transistor 20 and its base and collector coupled to ground.
- PNP bipolar transistor 28 has its emitter coupled to the drain of p-channel MOS transistor 20 through resistor 30 and its base and collector coupled to ground.
- One input of operational amplifier 24 is coupled to the drain of p-channel MOS transistor 20 and the other input of operational amplifier 24 is coupled to the drain of p-channel MOS transistor 22.
- the present invention provides a temperature-compensated current reference using only a MOS transistor and polysilicon resistor of the same type.
- FIG. 1 is a schematic diagram of one prior-art current-reference circuit.
- FIG. 2 is a schematic diagram of another prior-art current-reference circuit.
- FIG. 3 is a schematic diagram of a first illustrative current-reference circuit according to the present invention.
- FIG. 4 is a schematic diagram of a second illustrative current-reference circuit according to the present invention.
- a differential amplifier employs p-channel MOS current- source transistors 40 and 42, n-channel MOS input transistors 44 and 46, and n-channel bias transistor 48.
- P-channel MOS transistor 50 supplies current to PNP bipolar transistor 52 through resistor 54 as well as PNP bipolar transistor 56 through a voltage divider comprising resistors 58 and 60.
- resistor 54 and 60 may have resistance of about 12K ⁇
- resistor 58 may have a resistance of about 16K ⁇ .
- P- channel MOS transistor 50 also supplies current to N-channel MOS transistor 62 in driving resistor 64 as a source follower.
- Resistor 64 may have a resistance of about 100K ⁇ .
- the gate of n-channel MOS transistor 62 is driven from a reference voltage Vref that is a fixed value or that can be obtained in different manner as shown in FIG. 4
- N-channel MOS transistor 62 is sized such that it operates in its subthreshold region.
- n-channel MOS transistor 44 is driven from the common connection between resistors 58 and 60 (the "MULTIPLE" node).
- the gate of n-channel MOS transistor 46 is driven from the common connection of PNP bipolar transistor 52 and resistor 54.
- the current through the bipolar transistors 52 and 56 is:
- I Bip U/R2 *[(R3/Rl)*ln(R3/R2) + ln(N*R3)/R2)J
- U t is equal to KT/q: This current is a positive function of Ut normalized with respect to resistance.
- I m increases when temperature rises and decreases when the temperature decreases.
- U is equal to KT/q.
- This current is a positive function of the V gs of n-channel MOS transistor 62 and a negative function of U t .
- the current through n-channel MOS transistor 62 decreases as temperature increases and increases as temperature decreases.
- resistor 64 to n-channel MOS transistor 62, when the temperature increases and the current through n-channel MOS transistor 62 decreases, the excessive reduction of current through n-channel MOS transistor 62 is compensated by the increase of its Vgs, due to the presence of resistor 64. In this way the total current is independent of the supply voltage and a good temperature compensation is obtained.
- FIG. 4 a schematic diagram shows another illustrative ⁇ current-reference circuit according to the present invention. Persons of ordinary skill in the art will observe that the circuit of FIG. 4 is very similar to that of FIG. 3, and the same reference numerals have been used to identify corresponding elements. In the illustrative current-reference circuit of FIG.
- the signal at the MULTIPLE node at the common connection of resistors 58 and 60 can be used to drive the gate of n-channel MOS transistor 62 instead of the fixed value VREF to obtain a good matching with respect to the bipolar behavior of the circuit.
- the signal at the MULTIPLE node is in fact a function of bipolar characteristics (FIG. 4) and provides a feedback loop in the circuitry.
- the circuit works briefly as follows: when, for example, the temperature rises the bipolar current rises but the voltage value at the MULTIPLE node (and at the node "SINGLE” at the collector of PNP bipolar transistor 52) decreases (the coefficient of the VBE respect the temperature is negative -1.56mv/C) so that the current through n-channel MOS transistor 62 decreases because of its dependence on temperature and also because the V GS of n-channel MOS transistor 62 is reduced because the voltage at the node MULTIPLE decreases. Therefore, the current through n-channel MOS transistor 62 compensates the increment of the current sunk by the bipolar transistors and, as already mentioned, the excessive V GS reduction is limited by the resistance of resistor 64.
Abstract
Description
Claims
Applications Claiming Priority (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US407622 | 1995-03-21 | ||
IT000803A ITTO20020803A1 (en) | 2002-09-16 | 2002-09-16 | TEMPERATURE COMPENSATED CURRENT REFERENCE CIRCUIT. |
ITIT20020803 | 2002-09-16 | ||
US10/407,622 US6809575B2 (en) | 2002-09-16 | 2003-04-03 | Temperature-compensated current reference circuit |
PCT/US2003/028835 WO2004025390A2 (en) | 2002-09-16 | 2003-09-12 | Temperature-compensated current reference circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
EP1561153A2 true EP1561153A2 (en) | 2005-08-10 |
EP1561153A4 EP1561153A4 (en) | 2007-08-01 |
Family
ID=31995807
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP03749655A Withdrawn EP1561153A4 (en) | 2002-09-16 | 2003-09-12 | Temperature-compensated current reference circuit |
Country Status (7)
Country | Link |
---|---|
EP (1) | EP1561153A4 (en) |
JP (1) | JP2005539335A (en) |
KR (1) | KR20050042824A (en) |
AU (1) | AU2003267183A1 (en) |
CA (1) | CA2498780A1 (en) |
NO (1) | NO20051558L (en) |
WO (1) | WO2004025390A2 (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4837111B2 (en) * | 2009-03-02 | 2011-12-14 | 株式会社半導体理工学研究センター | Reference current source circuit |
JPWO2017179301A1 (en) * | 2016-04-13 | 2019-02-21 | 株式会社ソシオネクスト | Reference voltage stabilizing circuit and integrated circuit having the same |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4792748A (en) * | 1987-11-17 | 1988-12-20 | Burr-Brown Corporation | Two-terminal temperature-compensated current source circuit |
US5245273A (en) * | 1991-10-30 | 1993-09-14 | Motorola, Inc. | Bandgap voltage reference circuit |
US6292050B1 (en) * | 1997-01-29 | 2001-09-18 | Cardiac Pacemakers, Inc. | Current and temperature compensated voltage reference having improved power supply rejection |
US6351111B1 (en) * | 2001-04-13 | 2002-02-26 | Ami Semiconductor, Inc. | Circuits and methods for providing a current reference with a controlled temperature coefficient using a series composite resistor |
US6448844B1 (en) * | 1999-11-30 | 2002-09-10 | Hyundai Electronics Industries Co., Ltd. | CMOS constant current reference circuit |
US20020125938A1 (en) * | 2000-12-27 | 2002-09-12 | Young Hee Kim | Current mirror type bandgap reference voltage generator |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5821564A (en) * | 1997-05-23 | 1998-10-13 | Mosel Vitelic Inc. | TFT with self-align offset gate |
US6392472B1 (en) * | 1999-06-18 | 2002-05-21 | Mitsubishi Denki Kabushiki Kaisha | Constant internal voltage generation circuit |
JP3954245B2 (en) * | 1999-07-22 | 2007-08-08 | 株式会社東芝 | Voltage generation circuit |
US6388507B1 (en) * | 2001-01-10 | 2002-05-14 | Hitachi America, Ltd. | Voltage to current converter with variation-free MOS resistor |
US6407622B1 (en) * | 2001-03-13 | 2002-06-18 | Ion E. Opris | Low-voltage bandgap reference circuit |
JP4301760B2 (en) * | 2002-02-26 | 2009-07-22 | 株式会社ルネサステクノロジ | Semiconductor device |
-
2003
- 2003-09-12 CA CA002498780A patent/CA2498780A1/en not_active Abandoned
- 2003-09-12 JP JP2004572005A patent/JP2005539335A/en active Pending
- 2003-09-12 KR KR1020057004509A patent/KR20050042824A/en not_active Application Discontinuation
- 2003-09-12 AU AU2003267183A patent/AU2003267183A1/en not_active Abandoned
- 2003-09-12 EP EP03749655A patent/EP1561153A4/en not_active Withdrawn
- 2003-09-12 WO PCT/US2003/028835 patent/WO2004025390A2/en active Application Filing
-
2005
- 2005-03-23 NO NO20051558A patent/NO20051558L/en not_active Application Discontinuation
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4792748A (en) * | 1987-11-17 | 1988-12-20 | Burr-Brown Corporation | Two-terminal temperature-compensated current source circuit |
US5245273A (en) * | 1991-10-30 | 1993-09-14 | Motorola, Inc. | Bandgap voltage reference circuit |
US6292050B1 (en) * | 1997-01-29 | 2001-09-18 | Cardiac Pacemakers, Inc. | Current and temperature compensated voltage reference having improved power supply rejection |
US6448844B1 (en) * | 1999-11-30 | 2002-09-10 | Hyundai Electronics Industries Co., Ltd. | CMOS constant current reference circuit |
US20020125938A1 (en) * | 2000-12-27 | 2002-09-12 | Young Hee Kim | Current mirror type bandgap reference voltage generator |
US6351111B1 (en) * | 2001-04-13 | 2002-02-26 | Ami Semiconductor, Inc. | Circuits and methods for providing a current reference with a controlled temperature coefficient using a series composite resistor |
Non-Patent Citations (1)
Title |
---|
See also references of WO2004025390A2 * |
Also Published As
Publication number | Publication date |
---|---|
AU2003267183A8 (en) | 2004-04-30 |
EP1561153A4 (en) | 2007-08-01 |
WO2004025390A3 (en) | 2005-06-16 |
CA2498780A1 (en) | 2004-03-25 |
WO2004025390A2 (en) | 2004-03-25 |
NO20051558L (en) | 2005-03-23 |
AU2003267183A1 (en) | 2004-04-30 |
JP2005539335A (en) | 2005-12-22 |
KR20050042824A (en) | 2005-05-10 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
Free format text: ORIGINAL CODE: 0009012 |
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17P | Request for examination filed |
Effective date: 20050405 |
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AK | Designated contracting states |
Kind code of ref document: A2 Designated state(s): AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IT LI LU MC NL PT RO SE SI SK TR |
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AX | Request for extension of the european patent |
Extension state: AL LT LV MK |
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DAX | Request for extension of the european patent (deleted) | ||
RBV | Designated contracting states (corrected) |
Designated state(s): DE FR GB NL |
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RIN1 | Information on inventor provided before grant (corrected) |
Inventor name: CHINOSI, MAURO Inventor name: BEDARIDA, LORENZO Inventor name: ODDONE, GIORGIO |
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A4 | Supplementary search report drawn up and despatched |
Effective date: 20070628 |
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RIC1 | Information provided on ipc code assigned before grant |
Ipc: G05F 3/24 20060101ALI20070622BHEP Ipc: G05F 3/16 20060101ALI20070622BHEP Ipc: G05F 1/10 20060101AFI20050622BHEP |
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17Q | First examination report despatched |
Effective date: 20081104 |
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STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: THE APPLICATION IS DEEMED TO BE WITHDRAWN |
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18D | Application deemed to be withdrawn |
Effective date: 20090317 |