EP1560190A2 - System for driving display devices with image data using predetermined bus configurations - Google Patents

Abstract

A host computer (HC) (12) makes image data (ID) available for each frame in a sequence via a serial bus (SB) (10). The ID is extracted from data received via the SB onto an electronic sub-assembly (ESA) (16) connected between the HC and a display device (18). Extracted ID is stored in the ESA's image store to be displayed under the ESA's control. An independent claim is also included for a device for operating a display device by producing a continuously renewed display through sequentially received frames of image data defining one or more pixels.

Description

The present invention relates to a system for Operating image data display devices over predetermined ones Datenbuskonfigurationen. In particular, the The present invention relates to a method and an apparatus for providing image data to a display device, and to a method and apparatus for providing of image data for transmission to a display device according to a predetermined data bus configuration.

Conventional signal processing systems, such as personal computers, personal digital assistants (PDAs), computers, manufacturing controls, and medical devices, control the display of image data display devices by means of a graphics processor, which in turn is driven by an operating system and driver. The connection of a TFT-LCD display (TFT = Thin F ilm T Transistor = thin-film transistor, LCD = L iquid C rystal D isplay = liquid crystal display) is done via a graphics processor. The graphics processor in turn is about the usual in the signal processing system internal buses such. As the PCI bus connected. Most of the graphics processors are on graphics cards. But there are also signal processing systems in which the graphics processor is otherwise integrated. Especially TFT-LCD screens make special demands on the graphics cards or graphics processors with regard to the connections. In order to operate TFT LCD screens on signal processing systems, there is a need for the user to open the signal processing systems and, if possible, equip them with suitable graphics processors. Although there are technical possibilities to run the buses to the outside, but the technical principle remains the same and thus the technical complexity relatively high.

For the operation of peripheral devices, such. Printer, Modems, etc., have signal processing systems easy too managing bus connections, such. USB, RS232, parallel port, Ethernet and V.24 bus connections.

Known in the art are approaches to TFT LCD screens via the RS232 interface or the Ethernet interface to control a computer. But you have to "intelligent" control circuits between the computers and the TFT-LCD screen or in the TFT-LCD screen be included, as mentioned above Interfaces receive no image data in the form of pixels but so-called image description data in form selected control commands. The control circuit must these commands decode and also appropriate circuits to be based on these control commands the required image data in the form of pixels for display on the TFT-LCD screen. The control circuit includes z. B. a character generator, due to the received control commands generates a character to be displayed and on the TFT-LCD screen. In these systems Only the control signals are transmitted via the RS232 bus transfer, then using a predefined Graphics functionality are converted into images (circle, Lines, rectangles, etc.). The graphics functionality is therefore severely limited. For transmission and presentation real pictures (such as photos) sent by the computer these systems are not well suited.

The approach just described is disadvantageous since here only control signals are transmitted from a host computer, that of the ad control (display controller) only in Image data are converted so that a certain computing power must be assumed, for example of inexpensive MCUs (Micro Controller Units) only difficult to provide.

An easy way to have a TFT LCD screen over to operate the above interfaces, so that Image data are transmitted to the same, do not exist. Should TFT-LCD screens with the above computer over one of the mentioned interfaces must be operated, so must this computer via the relevant interface with connected to a second computer, the TFT LCD screen but then in a conventional way (graphics card) connected to this second computer. Alone with it associated effort speaks against such a solution.

The present invention is therefore based on the object a simplified procedure and a simplified one Device for operating display devices for image data to create over predetermined data bus configurations.

This object is achieved by methods according to claim 1 or 8, or a device according to claim 15 or 21 solved.

(a) Empfangen der Bilddaten, die ein oder mehrere Pixel definieren, in einem Übertragungsformat, das einer vorbestimmten Datenbuskonfiguration entspricht; und

(b) Extrahieren der Bilddaten aus dem Übertragungsformat, und Erzeugen eines Anzeigesignals für das Anzeigegerät basierend auf den extrahierten Bilddaten.

The present invention provides a method for providing image data to a display device, comprising the following steps:

(a) receiving the image data defining one or more pixels in a transmission format corresponding to a predetermined data bus configuration; and

(b) extracting the image data from the transmission format, and generating a display signal for the display device based on the extracted image data.

Empfangen zu übertragender Bilddaten, die ein oder mehrere Pixel definieren;

Einfügen von zu übertragenden Bilddaten in ein der Datenbuskonfiguration entsprechendes Übertragungsformat; und

Ausgeben der zu übertragenden Bilddaten in dem Übertragungsformat.

The present invention provides a method of providing image data for transmission to a display device according to a predetermined data bus configuration, comprising the steps of:

Receiving image data to be transmitted that defines one or more pixels;

Inserting image data to be transmitted in a transmission format corresponding to the data bus configuration; and

Outputting the image data to be transmitted in the transmission format.

einem Eingang zum Empfangen der Bilddaten, die ein oder mehrere Pixel definieren, in einem Übertragungsformat, das einer vorbestimmten Datenbuskonfiguration entspricht; und

einer Signalverarbeitungseinrichtung, die ausgebildet ist, um die Bilddaten aus dem Übertragungsformat zu extrahieren, und um basierend auf den extrahierten Bilddaten ein Anzeigesignal für ein Anzeigegerät zu erzeugen.

The present invention provides an apparatus for providing image data to a display device, comprising:

an input for receiving the image data defining one or more pixels in a transmission format corresponding to a predetermined data bus configuration; and

a signal processor configured to extract the image data from the transmission format and to generate a display signal for a display based on the extracted image data.

einem Eingang zum Empfangen zu übertragender Bilddaten, die ein oder mehrere Pixel definieren;

einer Signalverarbeitungseinrichtung, die ausgebildet ist, um die zu übertragenden Bilddaten in ein der Datenbuskonfiguration entsprechendes Übertragungsformat einzufügen; und

einem Ausgang zum Ausgeben der zu übertragenden Bilddaten in dem Übertragungsformat.

The present invention provides an apparatus for providing image data for transmission to a display device according to a predetermined data bus configuration, comprising:

an input for receiving image data to be transmitted defining one or more pixels;

signal processing means configured to insert the image data to be transmitted into a transmission format corresponding to the data bus configuration; and

an output for outputting the image data to be transmitted in the transmission format.

In one aspect, the present invention further provides a method and apparatus for transmitting image data from an image data source to a display device the image data from the image data source to the display device be transmitted, wherein the image data and the display signals be provided according to the invention.

In another aspect, the present invention provides a digital storage medium, in particular a floppy disk with electronically readable control signals that way can interact with a processing device, that the inventive method is carried out, and a program product with on a machine-readable carrier stored program code for carrying out the inventive Procedure if the program product on a Processing device expires.

According to the invention thus an easy way is created Display devices for image data, such as. B. TFT LCD screens, via a standardized peripheral bus, such as USB, RS232, parallel port, Ethernet or V.24 bus connection. The otherwise technically complex use of separate graphics processor on graphics cards and the associated opening of the System deleted. The systems generate the image data and do not give these to a graphics processor or a Graphics card, but give this image data directly over the interface, so that they are on reception displayed on the display without further conversion can be.

According to a preferred embodiment, the Display a touch screen, which has the same interface operate, over which receive the image data become.

An advantage of the present invention is that the intended processing device (MCU) only a little because only data transport is monitored must and the pixel data passed 1: 1 to the screen become. The image is generated in the host computer and as a finished image (image) to the ad control to hand over. Another "interpreting" the received Data is not required.

Preferred embodiments of the present invention are defined in the subclaims.

Fig. 1

ein Blockdiagramm des erfindungsgemäßen Systems zum Betreiben eines Anzeigegeräts über eine Schnittstelle einer vorbestimmten Datenbuskonfiguration gemäß einem bevorzugten Ausführungsbeispiel;

Fig. 2

ein Blockdiagramm der in Fig. 1 gezeigten elektronischen Baugruppe mit angeschlossenem Bildschirm;

Fig. 3

ein detailliertes Blockdiagramm der in Fig. 2 gezeigten elektronischen Baugruppe gemäß einem bevorzugten Ausführungsbeispiel;

Fig. 4

die Schritte in der MCU aus Fig. 3 bei der Datenübertragung;

Fig. 5

die Schritte in der PLD aus Fig. 3 zur Erzeugung eines Adresssignals aus den Zählwerten eines horizontalen Zählers und eines vertikalen Zählers;

Fig. 6

die Schritte in der PLD aus Fig. 3 zur Ansteuerung des Anzeigegeräts;

Fig. 7

die Schritte in der PLD aus Fig. 3 zur vollständigen Übertragung eines Bildes in den Bildspeicher;

Fig. 8

die Schritte in der PLD aus Fig. 3 zur Feststellung, ob ein Bildwechsel auf dem Anzeigegerät stattfindet;

Fig. 9

ein Blockdiagramm des in Fig. 1 gezeigten Computers mit angeschlossenem Anzeigesystem zur Verdeutlichung des Informationsaustausches zwischen einer Anwendung, die die Bilddaten erzeugt, einer Ansteuereinrichtung für das Anzeigegerät, einer Einrichtung, die den Datentransfer ausführt, und einer Einrichtung zur Ansteuerung des Anzeigegeräts;

Fig. 10

einen Kommunikationsprozess zwischen der Anwendung aus Fig. 9 und einem Treiber; und

Fig. 11

einen Ablauf der Prozedur einer Datenübergabe an ein USB-System.

Preferred embodiments of the present invention will be explained in more detail below with reference to the accompanying drawings. Show it:

Fig. 1

a block diagram of the system according to the invention for operating a display device via an interface of a predetermined data bus configuration according to a preferred embodiment;

Fig. 2

a block diagram of the electronic assembly shown in Figure 1 with connected screen.

Fig. 3

a detailed block diagram of the electronic assembly shown in Figure 2 according to a preferred embodiment.

Fig. 4

the steps in the MCU of Figure 3 in the data transmission;

Fig. 5

the steps in the PLD of Fig. 3 for generating an address signal from the counts of a horizontal counter and a vertical counter;

Fig. 6

the steps in the PLD of Figure 3 for controlling the display device;

Fig. 7

the steps in the PLD of Figure 3 for the complete transmission of an image in the image memory;

Fig. 8

the steps in the PLD of Figure 3 to determine whether a picture change takes place on the display device;

Fig. 9

1 is a block diagram of the connected display system computer shown in FIG. 1 illustrating the information exchange between an application that generates the image data, a drive for the display device, a device that performs the data transfer, and a device for driving the display device;

Fig. 10

a communication process between the application of Fig. 9 and a driver; and

Fig. 11

a flow of the procedure of data transfer to a USB system.

1 is a block diagram of the invention System for operating a display device via an interface of a predetermined data bus configuration described in more detail according to a preferred embodiment. In the following description of the preferred Embodiments will be the same or the same effect Elements provided with the same reference numerals.

The system shown in FIG. 1 comprises a data bus 10, one computer 12, e.g. a PC, a PDA, a Completion control, a medical device or a another computer system, with a display device 14 connects, which has an electronic module 16 and a Display device or a screen 18, z. A TFT LCD screen, includes. The electronic assembly 16 includes Further, an interface 20 and generated from the at the Interface 20 received signals / data an indication signal for the screen 18. The display signal is transmitted via a Connection 22 from the electronic module 16 to the Screen 18 transmitted.

Optionally, the screen 18, a touch screen 24 assigned be connected via a connection 26 with the electronic Assembly 16 is connected to information regarding a touched point on the screen 18 to the forward electronic assembly 16 and from there via the interface 20 to the computer 12 to there the appropriate To take steps.

The image data to be displayed on the screen 18 becomes from the computer 12 in the form of pixels, preferably in Form of bitmaps, provided, then in one Format according to the interface 20, the predetermined Data bus configuration corresponds, converts and to a not shown in Fig. 1 interface of the computer 12 is provided for transmission to the display system 14. These data are sent over the data bus 10, which is the predefined data bus configuration to which Transfer interface 20. The at the interface 20 received data are in the electronic module 16 processed to generate the indication signal. The electronic Assembly 16 extracts the image data from the corresponding one Data bus format and generates the display signal for the screen 18, via the connection 22 to the screen is sent.

The data bus format for transmitting the image data and the Configuration of the interfaces of the computer 12 and the Display system 14 correspond to the preferred embodiment USB, RS232 or parallel port data bus format. Other known interface or data bus configurations, such. The Ethernet standard, the V.24 standard, etc., can also be used become.

A typical application of the present invention is the Use of machines, e.g. Vending machines for small goods. Typically, modern vending machines will be screens or displays for user guidance. The The present invention is particularly for small displays with a resolution of e.g. 320x240 pixels, also QVGA called, suitable. According to the invention, an image in the Usage of the USB 2.0 bus for transmission about 50 times in the second, what the above Application is sufficient. For other applications can also several displays or screens parallel to conventional ones Screens are used.

Hereinafter, the present invention will be described with reference to Example of the USB interface explained in detail.

Through the USB interface 20 is used by the host system 12 (e.g., PC) transmit a graphics bitmap. In the Solution shown here is a format of 320 x 240 pixels (Pixels) with 16 bit color depth. Of course the present invention is not hereof limited and other formats can be used become. The graphic bitmap is thus a binary data format from 320x240x16 bit.

A preferred embodiment of the electronic Assembly 16 and the associated software will be described below explained with reference to FIGS. 2 to 8. A preferred embodiment the required configuration of the computer 12 will be explained with reference to FIGS. 9 to 11.

FIG. 2 shows a block diagram of the display-connected electronic assembly 16 shown in FIG. 1. The electronic assembly 16 includes a controller 28 (MCU) that includes the USB interface 20. Further, the electronic assembly 16 includes a timer 30 (PLD = P rogrammable L ogic D evice = programmable logic device or element), an image memory 32, preferably a RAM (RAM = R Andom A ccess M emory = random access memory) , and an optional touch screen controller 34 provided when associated with the screen 18, as in the example shown, the touch screen 24. As can be seen in Fig. 2, the individual components of the electronic module 16 are connected via a plurality of lines for data exchange. More specifically, the MCU 28 and the PLD 30 exchange the signals WR_START, WR_FULL and WR_EN via one line, and the clock signal CLK via another line. The MCU 28 is also connected to the frame buffer 32 and the screen 18 via a data bus carrying the pixel data. The PLD 30 provides the signals OE and addr to the image memory 32, and the signals HSYNC and VSYNC and the clock signal CLK to the display 18. The touch screen controller 34 is connected to the touch screen 24 via the connection 26 and exchanges the information required for operating the touch screen 24 with the MCU 28 via the connection 36.

As can be seen, the signals HSYNC, VSYNC, CLK and transmit the pixel data over the common connection 22.

The electronic assembly 16 consists essentially of two parts, the MCU 28 (Micro-Controller-Unit) and the Timing engine 30, preferably here implemented by the PLD.

The MCU 28 is mainly for the data transport of the Computer 12 (host) to the electronic module 16 responsible. The PDL 30 mainly generates the sync signals HSYNC (horizontal synchronization), VSYNC (vertical Synchronization) for the screen 18 and the address signals addr for the image memory 32.

The MCU 28 is equipped with the USB interface 20, about the graphic bitmap data to be displayed by the Computer 12 transmitted to the electronic module 16 become. The data is then forwarded to the image memory 32.

Since the screen 18, the image memory 32 and the MCU 28 a common data bus (data bus "pixel data" in FIG. 2), access to this item must be controlled become. The output of the image memory 32 is for this purpose in Period of the falling edge of the clock signal CLK and the Output of the MCU 28 in the period of the rising edge of the Clock signal CLK unlocked. The technological reasons Setup and hold times are taken into account.

The optional touch screen controller 34 is commercially available and is operated via the serial bus 36 on the MCU 28. At depends on this bus, as will be explained later, also a program memory for the MCU firmware. The touchscreen data are activated by a USB interrupt transfer Computer 12 transferred.

The brightness control of the screen 18 is determined by the PWM method (PWM = pulse width modulation) accomplished. For this purpose, two, in the MCU 28 integrated "Auto Reload Timer "(timer) in use The PLD 30 alternates one timer each for the "high phase" (high logical rule) and the other for the "low-phase" (lower logical rule) of the PWM signal. With the Signals indicating the timers at the expiration of an interval The PLD 30 toggles the PWM signal as it does will be explained later in more detail.

Referring to Fig. 3, a detailed block diagram will now be given a preferred embodiment of that shown in Fig. 2 electronic assembly and in particular the MCU 28, the PLD 30 and the image memory 32 described in more detail.

The MCU 28 includes a data transfer section in addition to the USB interface 38, a FIFO memory 40 (FIFO = Fist-In-Fist-Out) and a general-purpose interface 42 (GPIF = General Purpose Interface). As you can see, GPIF 42 sends signals WR_START and WR_EN to the PLD 30 receives from the same the signal WR_FULL and exchanges with it the signal WR_RST. The FIFO memory 40 is over the 16 bit data bus 44 with the frame buffer 32 and the screen 18 for transmitting the Pixel data connected. The FIFO memory 40 and the GPIF 42 are connected via a connection 46. The data transfer section 38 of the MCU 28 also receives from the PLD 30 an interface clock IFCLK.

The MCU 28 includes another section 48 in which the not shown CPU of the MCU 28 is arranged. In the further Section 48, a timer / PWM circuit 50 is arranged, which provides signals to the PLD 30 and from receives the same. Further, the MCU clock MCUCLK is applied to the PLD 28, as well as the signal CHANGE_EN. Further, the signal BKL_ON is generated and output. The Signal BKL_ON switches the backlight of the TFT-LCD screen on or off, what about a USB Vendor-CALL is controlled. From the application / application page This USB VENDOR CALL is via the driver-side function IOCTL () triggered. The MCU 28 is over the serial bus 36 with the touch screen controller 34 and a memory 52 (preferably an EEPROM) in which the MCU firmware is stored is connected.

The PLD 30 includes a clock divider 54 received from the MCU 28 receives the MCU clock MCUCLK and to the data transfer section 38, the MCU 28 outputs the interface clock IFCLK. Further, the clock divider 54 outputs the clock signal CLK.

A PWM circuit 56 is provided, which is the clock signal CLK receives and to the timer / PWM circuit 50 of the MCU 28 signals and receives from the same. Further The PWM circuit 56 provides a control signal on the line 58 ready.

A first counter 60 (wr_count) receives from the MCU 28 the Signals WR_START and WR_EN. He gives the MCU 28 that Signal WR_FULL off. Further, the first counter 60 exchanges the Signal WR_RST with the MCU 28 off. From the clock divider 54 the first counter 60 receives the clock signal CLK. About one first bus 62, the first counter 60 indicates its count value an address multiplexer 64 (addrmux), which further includes a Count value of a second counter 66 via a second bus 68 receives. The address multiplexer is provided via a 17-bit bus 64, the address signal ADDR [0..16] to the image memory 32nd out. The address multiplexer 64 further receives the clock signal CLK from the clock divider 54.

The second counter 66 receives the clock signal CLK from the Clock divider 54 and outputs in addition to the count the signals DE, HSYNC and VSYNC to the screen 18 off. The signal VSYNC is also a signal new_frame (new frame) to a Address space selection circuit 70 is applied, which further the Receives signal WR_FULL and sends the signal WR_RST. The Address space selection circuit 70 outputs a selection signal ADDR_17 to the image memory 32 and further receives the Clock signal CLK from the clock divider 54.

The PLD 30 further includes the circuit 72 (OE) for generating an activation signal OE for the image memory 32, depending on the received clock signal CLK.

The electronic assembly 16 further includes the PWM circuit 74, from the PWM circuit 56 of the PDL 30 via the line 58 is driven to a brightness signal to create.

The image memory 32 has two memory sections 32a and 32b, which alternately receive pixel data from the MCU 28 and output to the screen 18.

With reference to FIG. 3 and FIG. 4, the Functionality of the MCU 28 explained in more detail. The MCU 28 controls the transfer of the graphic bitmap data from the host 12 in the image memory 32. The actual data transfer is with the built-in MCU 28 GPIF unit 42 largely self-sufficient from the integrated CPU. The GPIF unit 42 is a state machine (Statemachine), the a DMA data transfer from the also in the MCU 28th integrated FIFO memory 40 in the image memory 32 controls. The GPIF 42 has a counter with the the number of data to be transmitted is filled, so the Number of pixels of a complete bitmap. The counter is set by a USB vendor call (call) "WR_START". In addition, the GPIF 42 is initialized. The call WR_START also sets the signal WR_START to the address counter 60 in the PLD 30 to the memory start position / address of a To put picture.

The incoming bitmap data from the USB bus 10 is stored in the FIFO memory 40. Automatically and this achieved an integrated in the MCU 28 SIE unit (SIE = S erial USB I nterface E ngine not shown). The GPIF 42 recognizes that data is available in the FIFO memory 40 and independently transmits it to the image memory 32.

The addressing of the memory is performed by the PDL 30. If the GPIF 42 places valid pixel data on the data bus 44, this is indicated by the signal WR_EN. The data be with the rising edge of the clock signal CLK in Image memory 32 taken over. For each transmitted pixel the counter of the GPIF 42 is decremented. Is a complete one Transmit image, an interrupt occurs in the MCU 28 (Interrupt) triggered by the signal WR_FULL from der'PLD 30. The ISR (interrupt Service Routine) checks the meter reading of the GPIF 42. Is this "NULL" indicates a successful transfer. This is a complete new image in the image memory 32 stored. This is done with the signal CHANGE_EN by the MCU 28 is displayed. This changes the address space selection circuit 70 of the PLD 30 the address space to the next possible Time, namely at the time of the vertical blanking interval, and the new picture is displayed. Change the PLD 30 the address space, so it sets the first counter 60 and thus the signal WR_FULL back. This is with the Signal WR_RST is displayed and in turn triggers an interruption (Interrupt) in the MCU 28 off. The thus started ISR resets the signal CHANGE_EN, sets the Counter the GPIF 42 back to the pixel count of a complete Picture and starts the GPIF 42 for another Data transfer. In addition, the host 12 is the successful Data transfer via a USB interrupt transfer communicated.

If the signal WR_FULL is displayed and recognizes it triggered ISR that the counter of GPIF 42 is not "NULL" is, there is a misconduct. This is done by a USB interrupt transfer to host 12. The host then must via the USB vendor call "WR_START" the system reset and restart the data transfer.

Another misconduct is when the counter of GPIF 42 goes to "zero" but the signal WR_FULL from the PLD 30 is not set. Does the GPIF run to "zero"? an interrupt in the MCU 28 is triggered. This is lower priority than the interrupt by the signal WR_FULL. Therefore, normally the interrupt "GPIF counter NULL "masked by the" ISR WR_FULL "and solves that does not mean the ISR "GPIF counter zero" off. At a Misconduct is enabled the ISR "GPIF counter NULL" but because no signal WR_FULL is present to the fault Show. This is done through a USB interrupt transfer Host 12 communicated. Host 12 must then use the USB vendor call "WR_START" reset the system and the Restart data transfer.

With reference to the flowchart shown in Fig. 4 is the just described functionality again clarified. The process starts at 100 through a USB vendor call (Call) and then goes to block 102 (WR_START). alternative the flow returns from an error handler to the Block 102 back, as indicated at block 104. in the Block 102, the signal WR_START is set. This will be the Address counter 60 is reset in the PLD 30 and the counter the GPIF 42 will count on the number of pixels to be transmitted (here 320x240 pixels) set.

The process then proceeds to block 106 (TRANSFER), which causes the transmission of image data. The GPIF 42 transmits the image data independently and with each transmitted Pixel (here 16 bits) decrements the counter of the GPIF 42.

During data transmission, the signal WR_FULL and the count value "count" of the GPIF counter is monitored. In the block 108, the interrupt service routine "ISR GPIF DONE" called by the GPIF 42. The GPIF transmits the image data until the data counter "count" runs to zero. This triggers the interrupt 4 off. In block 110, the signal is used WR_FULL checks if the image memory is completely filled is after all the pixels have been transferred. Is not this the case, the process goes to the error block 112, the one Error in transmission indicates the GPIF 42 and the PLD 30 resets and the host 12 the error about the interrupt transfer displays. The image memory is displayed 32 is completely filled after all pixels transmit If so, flow proceeds to block 114 (CHANGE_EN).

If the address counter 60 of the PLD 30 over, it will indicated by the signal WR_FULL and at block 116 the interrupt 1 triggered. Furthermore, the interrupt must be 4 be masked and reset, as this normally is triggered immediately afterwards. Since the signal WR_FULL has a state indicating that the image memory is filled is then checked at block 118 whether the required number of pixels has been transmitted. is if not, the flow goes to block 120, which indicates an error in the transmission, the GPIF 42 and the PLD 30 resets and the host 12 the error over the Interrupt transfer displays. Is displayed, all pixels have been transmitted ("count" = NULL), then the procedure goes to Block 114 (CHANGE_EN).

In block 114 (CHANGE_EN) the signal CHANGE_EN is activated, to allow the PLD 30, the memory area in the Image memory 32 to change. This is the transmitted Image displayed and the memory area of the previous one Image free for retransmission.

In block 122, the change of the memory area and so that the displayed image in the vertical blanking interval performed. The change is indicated by the signal WR_RST. The PLD 32 sets the counter 60 independently back. The signal WR_RST triggers an interrupt that at block 124 indicates that the transfer was correct, the host 12 at block 124 further via an interrupt transfer the successful data transfer of a bitmap is shown. Subsequently, in block 122, the signal CHANGE_EN reset again.

Subsequently, it is determined in block 126 that a Free space is available for transfer. Of the Counter of GPIF 42 will return to the number of pixels an image (here 320x249 pixels).

In block 128, a frame counter is incremented The count This frame counter (frame counter) can be used at any time queried by the host 12 via a vendor call become. This allows the host via the USB connection 16 determine which images (frames) are transmitted and displayed have been and which are not.

Subsequently, at block 130, a new transmission of Image data with the GPIF 42 started and the process goes back to block 106 or terminate at 132 if an end transfer instruction present through a USB vendor call was communicated.

With reference to FIG. 3 and FIG. 5 to 8 is hereinafter the Functionality of the PDL 30 explained in more detail. The PLD 30 generates the sync signals required for the screen 18 HSYNC and VSYNC and generates the addresses for the Image memory access. The clock signal CLK becomes the clock signal MCUCLK the MCU 28 generated by frequency division. In addition, the PLD 30 controls the signal OE (Output-Enable) for the image memory 32. The output of the image memory 32 is switched so free that the screen 18, the pixel data to the falling edge of the clock signal CLK from the Image memory 32 can take over.

The two counter units 60 and 66 are implemented. The first unit 60 is for data transport from the MCU 28 responsible for the image memory 32. The other unit 66 is responsible for the control of the screen 18. Out The counter values are each the address signal for the Image memory 32 generated. For this there are the counter units 60 and 66 from two counters, the horizontal counter and the vertical counter. The horizontal counter is incremented with the clock signal CLK. The value of the meter thus corresponds to the position of a pixel within a Row. The vertical counter is determined by the overflow of the Horizontal counter increments, so with line frequency. The value of the vertical counter thus corresponds to the line position. The horizontal counter and vertical counter together together give a memory address that of the pixel position equivalent. As shown at 140 in FIG. 5, FIG Vertical counter an 8 bit count. The horizontal counter includes, as shown at 142, a 9-bit count. By suitable combination of the counts this results 17 bit address signal as shown at 144.

By dividing into the vertical counter and the horizontal counter can also generate the sync signals. The counter unit 66 for controlling the screen generates the signals HSYNC and VSYNC. Monitor comparators the counter readings and set or reset the sync signals at the appropriate positions after the Specification of the TFT screen 18.

Fig. 6 illustrates the generation of the sync signals. With every rising edge of the clock signal CLK is at block 150 determines whether a line end has been reached or not. If the end of the line has not yet been reached, the Horizontal count ("hcount") is incremented in block 152. When the end of the line is reached, the horizontal counter becomes set to the value 1 in block 154. After the Horizontal counter set to the value 1 in block 154 is checked in block 156, if the end of the image reached been or not. Is not the end of the picture? has been reached, the vertical counter ("vcount") in Block 158 increments. Is the picture end or frame end reached, the vertical counter is in block 160 on the Value 1 set. Subsequently, based on the so set counter values the synchronization of the screen controlled.

In block 162, based on a specification for the SYNCH signals of the screen checks if the value of the horizontal counter ("hcount") a predetermined HSYNC range equivalent. If this is the case, HSYNC is in the block 164 is set to the value 0. If not, will HSYNC is set to 1 in block 166.

In block 168, based on a specification for checks the HSYNCH / SYNCH phase shift of the screen, whether the value of the horizontal counter is a minimum Phase shift value falls short or not. falls below the value of the horizontal counter is the minimum Phase shift value, so no further action carried out. If the value of the horizontal counter reaches the minimum phase shift value or exceeds this so in block 170, based on a specification for the SYNCH signals of the screen checks whether the value of the vertical counter ("vcount") a predetermined VSYNC range corresponds. If this is the case, VSYNC is in Block 172 is set to the value 0. This is not the case, VSYNC is set to the value 1 in block 174.

Finally, in block 176, the counter values "vcount" and "hcount" determines the memory address RD_ADDR.

The counter unit 60, which is responsible for transporting the image data from the MCU 28 in the image memory 24, shows by the signal WR_FULL the complete transmission of a Image in the image memory 32, as with reference to FIG. 7 is clarified.

At each rising edge of the clock signal CLK is in Block 180 based on the signal WR_EN checks to see if Data is written into the memory or whether the MCU 28 provides valid data.

If there is no data for the slices (WR_EN not equal to 1), then the memory address is not changed in block 182 since the counts "vcount" and "hcount" are not changed.

If there are data to write to the memory, the Block 184 checks if the end of the line has been reached (value "count" is greater than or equal to the line length) or not (Value "hcount" is smaller than the line length). Was that End of line not reached, the value of the horizontal counter incremented in block 186. Otherwise, in the Block 188 checks to see if the end of the image has been reached (the Value of the vertical counter "vcount" is greater than or equal to the number of lines) or not (the value of the vertical counter "vcount" is smaller than the number of lines). Is the end of the picture not yet reached, the vertical counter is in the block 190 increments and the horizontal counter is in the block 192 is set to the value 1, which means that the line number is increased and the pixel number again on the Beginning of the line is set.

When the end of the picture has been reached, the signal WR_FULL in Block 194 is set to the value 1, and the value of the horizontal counter at block 196, an unused memory address set. This will show the complete picture is contained in the memory.

Subsequently, in block 198, the signals WR_START and WR_RST checked. Are these not activated (here: lower logic level), i. it has no new data transfer started, no further changes will be made Counter values performed and at 182 the memory address educated. Otherwise, if the signals WR_START and WR_RST indicate that a new data transfer has started becomes (new image), in block 200, the value of the vertical counter set to the value 1, in block 202 the value of the horizontal counter is set to the value 1 and in the block 204, the signal WR_FULL is deactivated to the two Set counter to the beginning of the image and the signal WR_FULL reset. Subsequently, at block 182, the memory address educated.

To avoid so-called frame-tears is with the "double Buffer "principle worked for this is the picture memory 32 divided into the two areas 32a and 32b, respectively can capture a complete picture. The highest quality Address bit of image memory 32 is used to store it in to divide the upper and lower memory areas 32a, 32b. An area serves to supply the screen 18 with the image data and the other takes the new image data, that come from the MCU 28 on. Between the areas 32a, 32b is constantly switched back and forth. To the rising Clock edge is the area active the new data from the MCU 28 receives and to the falling edge of the area with the image data to be displayed. Is a new picture complete transferred, the areas are exchanged. Therefor the address space unit 70 is responsible. About the signal WR_FULL recognizes the address space unit 70 that has a new one Picture in the memory 32 is located. By the signal new_frame, the corresponds to the VSYNC signal, recognizes the address space unit 70 the vertical blanking interval. At this time, a Picture change will be made. The MCU 28 issued with the Signal CHANGE_EN permission to change image. Will the both signals WR_FULL and new_frame is displayed and is that Signal CHANGE_EN is set, the memory area is swapped and thus a new image is displayed on the screen. The change is indicated by the signal WR_RST, its generation will be explained in more detail with reference to FIG. 8.

With each rising edge of a clock, in block 210 determines whether by the signals WR_FULL, new_frame and CHANGE_EN a change of address spaces is displayed or Not. If a change of the address spaces take place, then in block 212, the reset signal WR_RST is asserted to enable the Reset counter 60 and the MCU 28 the image change display. Otherwise, the signal WR_RST becomes block 218 disabled.

According to the currently active address range is the Address signal of the counter unit for the data transport or to control the screen on the address lines of Image memory 32, which is passed through the address multiplexer 64 (addrmux) takes place.

Referring to Figs. 9 to 11, a block diagram of a Embodiment of the computer 12 shown in FIG explained with attached display system 14. In this Embodiment, an application 250 is provided, the runs on the computer and generates the image data. The Application gives the image data to a driver 252, which with a USB subsystem 254 of the operating system cooperates.

On the host page 12 is the transfer of graphic bitmap data accomplished with the software driver 252. This offers the application / application programmer or the Application / Application 250 the required interfaces for the transfer of the bitmaps and delivers success or Error Codes.

Referring to Fig. 10, the steps for opening and Close the interface and transfer data explained in more detail. After the initial opening of the interface at block 256, a transfer from the host 12 started with the "USB vendor call" to transfer to initialize. The call WR_START sets the signal WR_START to the address counter 60 (wr_count) in the PLD 30th to the memory start position / address of an image too sat. The call is made when opening the driver interface via the OPEN () call (see FIG. 9). If the USB vendor call is not executed in block 256 can be, then in block 258 an error code generated and returned an unsuccessful Open the USB vendor call. Otherwise, if so no error occurs is through the block 256 via a Return value The successful initialization to the application 250 confirmed.

Now you can use the function WRITE () of the driver graphic bitmaps be handed over. Only bitmaps in matching Format, here 320x240x16Bit. Other Formats are returned by the driver with an error code in the return value rejected and rejected. Should other formats be used, the driver must be modified accordingly. It can also be provided that the driver 254 supports several formats and initially the appropriate one Format determines.

Fig. 11 illustrates a flow of data transfer from the computer 12 to the display system 14. The bitmap data transfer via a USB bulk transfer. Of the USB bus takes over the data backup during bulk transfer (see USB specification). That's why you can and firmware on an error-free data transport leave. The USB host controller can not handle the data an error code is returned. The mistakes which take place between the MCU 28 and the PLD 30 and of The MCU firmware will be detected by a USB interrupt transfer transmitted. Detects the driver 252 an error is aborted and the data transfer Error code returned. Waiting for correct transmission the driver 252 until the MCU 28 stops displaying the new bitmap confirmed with a USB interrupt transfer. If confirmed, the number of bytes transferred will be returned to the writing application / application 250. The application 250 thus recognizes a faultless transmission. Then a new picture can be transmitted. In the case of an error Must be the driver interface of the application closed and reopened to reset the system. Alternatively, the system can also use the IOCTL () function will be reset.

As can be seen in FIG. 11, in block 260 after Write system call a graphic bitmap passed to the driver 252. Subsequently, the bitmap is transmitted in block 262. After completely transferring the bitmap to the USB host is waited in block 262 until via an interrupt transfer a successful submission is displayed becomes. In block 266, a successful transmission displayed by the number of bytes transferred, ie a complete bitmap is returned (this one 16 bit system described by way of example the number of Lines of a bitmap). Subsequently, the interface closed.

Is detected when passing the bitmap in block 260, that the passed bitmap is not the right size or not having the correct format is entered via block 268 Error value determined and returned at block 266. Also if an error occurs while transferring the bitmap displayed an error by an interrupt transfer and the Transmission interrupted, via the block 268 an error value determined and returned at block 266. Same for, if it is determined in block 264, the one allowed Waiting time has been exceeded.

Depending on the circumstances, the inventive Procedures are implemented in hardware or in software. The implementation may be on a digital storage medium, in particular a floppy disk or CD with electronic readable control signals, so with a programmable computer system that can interact the corresponding procedure is carried out. Generally Thus, the present invention also exists in one Computer program product with on a machine readable Carrier stored program code to carry out the inventive method when the computer program product runs on a computer. With others Words, the invention can thus be considered as a computer program with a program code for carrying out the method be realized when the program is on a computer expires.

Although above a preferred embodiment of the present Invention has been described with reference to the USB format, the present invention is not limited thereto. Also other interface formats, e.g. RS232, parallel port, Ethernet, etc., can be used. Also can image data in bitmaps with different resolution or be handed over in another form. '

In the embodiment described above are over the interface only pixel image data, preferably transmitted in the form of bitmaps. The present invention but is not limited to this. This is how it can be certain applications be desired, first a Addressing the image memory 32 via the interface to Taxes. In this case, then before the actual Image data packet a memory address via the interface Posted. Subsequently, the actual image data package sent and the data contained therein based on the previously received memory address forwarded to the image memory.

As the above description shows, the invention is Solution advantageous, since directly usable image data (Pixels) are transmitted without further conversion can be displayed, reducing the software and hardware Effort is reduced.

In the description of the preferred embodiment was the transmission of image data without compression described. However, if the amount of data is large, the Image data before transmission over the serial bus by means of known techniques are compressed. The extracting the data on the electronic assembly then includes also decompressing the data.

Claims (19)

A method of operating a display device (18) whose display is generated by successively received frames of image data and continuously renewed, the image data defining one or more pixels, the method comprising the steps of: (a) providing the image data for a frame by a host computer (12) via a serial bus (10); (b) extracting the image data from the data received via the serial bus (10) to an electronic assembly (16) connected between the host computer (12) and the display device (18); (c) storing the extracted image data in an image memory (32) of the electronic assembly (16) and displaying the stored image data under the control of the electronic assembly (16); and (d) repeating steps (a) through (c) for each of the frames. The method of claim 1, wherein step (c) is the Collecting a predetermined amount of image data in the Image memory (32), wherein the image data upon reaching the predetermined amount are displayed. The method of claim 2, wherein collecting the Image data is a count of the extracted and cached Includes image data. Method according to one of claims 1 to 3, wherein the display device (18) has a first resolution in the horizontal direction and a second resolution in the vertical direction, wherein the image memory (32) has a plurality of line sections, wherein the size of the line sections of the horizontal Resolution of the display device (18), wherein the number of line sections corresponds to the vertical resolution of the display device (18), the method further comprising the steps of: beginning with a first line portion, writing the image data in the image memory (32) until the first line portion is filled; Incrementing the line section to be written and writing the image data into the further line section; and Repeating the steps of incrementing and writing until the number of line portions described corresponds to the vertical resolution of the display device (18). The method of claim 4, wherein the image memory (32) a first memory section (32a) and a second memory section (32b), wherein the first / second storage section (32a) receives image data during the second / first memory section (32b) provides image data for display. Method according to one of claims 1 to 5, wherein the display device (18) is associated with a touch screen (24), the method further comprising the steps of: Receiving information about the coordinates of a touched point on the display device (18); Converting the received information in the electronic assembly (16) into a format corresponding to the configuration of the serial bus (10); and Providing the received information at an output. Method according to one of claims 1 to 6, wherein step (a) comprises the following steps: Inserting image data to be transmitted into a serial data bus format; and Providing the image data to be transmitted to a serial interface of the host computer (12). Method according to claim 7, comprising the following step: Generating the image data by an application (250). Method according to one of claims 1 to 8, in which the serial bus (10) USB, RS232, Ethernet or V.24 standard supported. Method according to one of claims 1 to 9, wherein the image data is configured in bitmaps. Method according to one of claims 1 to 10, in which providing the image data by the host computer (12) comprises compressing the image data, and wherein extracting the image data decompresses of the image data. Apparatus for operating a display device (18) whose display is generated and continuously renewed by successively received frames of image data, the image data defining one or more pixels, comprising: a serial interface (20) for receiving the image data for a frame via a serial bus (10) from the host computer (12); an electronic assembly (16) connected between the host computer (12) and the display device (18) and adapted to extract, for each frame, the image data from the data received via the serial bus (10); extracted image data in an image memory (32) of the electronic assembly (16) and display the stored image data under control of the electronic assembly (16). Apparatus according to claim 12, which is the electronic Assembly (16) is formed to a predetermined Amount of image data in the image memory (32) to collect and view the image data upon reaching the predetermined To display quantity. Device (14) according to claim 12 or 13, wherein the Display (18) a first resolution in horizontal Direction and a second resolution in the vertical direction and in which the image memory (32) has a Having a plurality of line sections, wherein the Size of the horizontal resolution line segments of the display device (18), wherein the number the line segments of the vertical resolution of the display device (18). Apparatus according to claim 14, wherein the image memory (32) a first memory section (32a) and a second memory section (32b), wherein the first / second memory section (32a, 32b) configurable is to receive pixel data while the second / first Memory section (32b, 32a) pixel data for Display provides. Device according to one of claims 12 to 15, wherein the display device (18) associated with a touch screen (24) is. Apparatus according to any one of claims 12 to 16, wherein the serial bus (10) has the USB, RS232, Ethernet or V.24 standard supported. Device according to one of claims 12 to 17, wherein the pixel data are arranged in bitmaps. Device according to one of claims 12 to 18, wherein the image data is compressed image data, and in the electronic assembly (16) is formed, to decompress the image data.

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