EP1504317B1 - Power supply circuit - Google Patents

Description

The invention relates to a power supply circuit according to the preamble of claim 1, in particular for a microcontroller of a transmission control.

Modern microcontrollers usually require two different supply voltages of, for example, 5 volts and 3.3 volts, the two supply voltages being allowed to fluctuate only within predetermined bandwidths in order not to impair the functionality of the microcontroller. In no case may the voltage difference between the two supply voltages exceed or fall short of the maximum permissible values specified in the data sheet of the respective microcontroller. This is particularly critical during startup after power up and shutdown during the shutdown phase, since then different load currents flow and further different load capacities can be used.

There are therefore voltage supply circuits are known in which the two supply voltages are controlled by a respective linear regulator to avoid voltage deviations.

The disadvantage of this, however, is that control deviations of the two supply voltages are regulated separately, so that the control under strongly different load currents at the two outputs may not be sufficient to maintain the predetermined voltage difference.

Furthermore, it is known to connect the two outputs of such power supply circuits with Zener diodes or power Schottky diodes to the voltage difference between the two supply voltage within the permissible To keep bandwidth. The voltage difference between the two supply voltages can then only increase until the breakdown voltage of the zener diode is reached.

A disadvantage of such power supply circuits is the relatively high cost, which is associated with the use of Zener diodes or power Schottky diodes.

According to the teaching of the closest prior art D1 ( US 5,907,482 ), the two output voltages are monitored separately and regulated individually.

The invention is therefore based on the object to provide a power supply circuit with two different output voltages, wherein the voltage difference between the two output voltages is kept with the least possible effort within a permissible bandwidth.

The object is achieved on the basis of the above-described known power supply circuit according to the preamble of claim 1 by the characterizing features of claim 1.

The invention includes the general technical teaching to regulate the voltage difference between the two output voltages to prevent exceeding the allowable voltage difference, whereas the two output voltages are controlled separately in the known power supply circuits.

The voltage supply circuit according to the invention therefore has a regulator which adjusts the voltage difference between the two output voltages to a predetermined value.

The controller for the regulation of the voltage difference is the input side to the two outputs of the power supply circuit and the output side connected to an actuator which adjusts the two output voltages, whereby a feedback loop is formed.

For example, the control unit can have two conventional linear regulators which regulate the two output voltages separately from one another in accordance with a predetermined desired value. In this case, the control loop for regulating the voltage difference preferably superimposes the two separate control loops for the regulation of the two output voltages.

In contrast, in a simple embodiment of the voltage supply circuit according to the invention, the adjustment of the two output voltages takes place without feedback by a controller, the controller prescribing the control variable for the regulation of the voltage difference. In this case, the control loop for controlling the voltage difference superimposes the two controllers for setting the two output voltages.

In a variant of the invention, the regulator for regulating the voltage difference has a comparator, wherein the two inputs of the comparator are connected to the two outputs of the voltage supply circuit, so that the comparator measures the voltage difference between the two output voltages.

A variant of the invention provides at least one switching element, which allows a low-resistance connection of the two outputs of the two outputs of the power supply circuit in order to reduce or limit the voltage difference between the two outputs.

For this purpose, a separate switching element can be used, which is arranged between the two outputs of the power supply circuit and connects them to limit the voltage difference low impedance with each other.

Preferably, however, the two switching elements are used for the low-resistance connection of the two outputs of the power supply circuit, for separate control the two output voltages are used. Thus, the two output voltages are usually provided by a respective output capacitor, wherein the two output capacitors are charged via a respective switching element by an input voltage. Switching through the two switching elements thus leads to a low-resistance connection between the two outputs of the power supply circuit, which leads to a synchronization.

In a variant of the invention, the controller for controlling the voltage difference on two comparators, which are the input side connected respectively to the two outputs of the power supply circuit. One of the two inputs of the comparators is in each case connected via a reference voltage element to the associated output of the voltage supply circuit, wherein the two reference voltage elements indicate the maximum permissible voltage difference in the positive or in the negative direction. The one comparator thus indicates whether the voltage difference between the two output voltages exceeds the permissible bandwidth upwards. The other comparator, on the other hand, indicates whether the voltage difference between the two output voltages falls below the permissible bandwidth downwards.

Figur 1

eine erfindungsgemäße Spannungsversorgungsschaltung in Form eines Schaltbildes sowie

Figur 2

eine alternative Ausführungsform einer erfindungsgemäßen Spannungsversorgungsschaltung.

Other advantageous developments of the invention are characterized in the subclaims or are explained in more detail below together with the description of the preferred embodiment of the invention with reference to the figures. Show it:

FIG. 1

a voltage supply circuit according to the invention in the form of a circuit diagram and

FIG. 2

an alternative embodiment of a power supply circuit according to the invention.

The block diagram shown in Figure 1 shows a power supply circuit 1 according to the invention, which via a Input 2 is supplied with an input voltage U _IN and two outputs 3, 4, wherein at the output 3, an output voltage U _OUT1 = + 5V is output, while at the output 4, an output voltage U _OUT2 = + 3.3V is provided.

To stabilize the output voltage U _OUT1 , the output 3 of the voltage supply _circuit 1 is connected to ground through two output _capacitors C1, C2.

The output 4 is also connected through two output _capacitors C3, C4 to ground to stabilize the output voltage U _OUT2 .

On the input side, the power supply circuit 1 to a transistor T1, which is controlled by a pre-regulator 5, wherein the primary controller 5 inter alia has the task to limit the current.

For measuring the current, the transistor T1 is connected in series with a measuring resistor R0, wherein the pre-regulator 5 measures the voltage drop across the measuring resistor R0 and blocks the transistor T1 when the current through the measuring resistor R0 rises excessively.

On the output side, the measuring resistor is connected via a transistor T2 to the output 3 and via a transistor T3 to the output 4 of the power supply circuit.

If the two transistors T1 and T2 switch through, then the two output capacitors C1, C2 can be charged by the input voltage U _IN , which leads to an increase of the output voltage U _OUT1 . In contrast, a blocking of the transistor T2 leads to a load-dependent discharge of the output _capacitors C1, C2, as a result of which the output voltage U _OUT1 drops.

Accordingly, the two output capacitors C3, C4 can be charged when the two transistors T1 and T3 are turned on, which leads to an increase of the output voltage U _OUT2 . If the transistor T3 blocks, however, the output capacitors C3, C4 are discharged in dependence on the electrical load connected to the output 4, which leads to a decrease in the output voltage U _OUT2 .

Both the output voltage U _OUT1 and the output voltage U _OUT2 are in this case regulated by a respective regulator, the desired value of the respective output voltage U _OUT1 or U _{OUT2 being predetermined} by a reference _{voltage element} 6.

The regulator for the output voltage U _OUT1 has a comparator OP1, the input side compares the output voltage U _OUT1 with the predetermined setpoint and in response to the control deviation drives the transistor T2 to adjust the output voltage U _OUT1 to the predetermined setpoint.

For detecting the output voltage U _OUT1 a voltage divider is provided, which consists of two resistors R1, R2, which are connected in series between the output 3 of the power supply circuit 1 and ground. The center tap of the voltage divider between the two resistors R1, R2 is connected to the inverting input of the comparator OP1, while the non-inverting input of the comparator OP1 is connected to the reference voltage element 6. A decrease in the output voltage U _OUT1 below the setpoint value specified by the reference voltage _element 6 thus causes the comparator OP1 to open the transistor T2, so that the output capacitors C1, C2 can be charged. On the other hand, an increase in the output voltage U _OUT1 over the reference value specified by the reference voltage _element 6 causes the comparator OP1 to block the transistor T2, so that the output capacitors C1, C2 are no longer charged, which leads to a load-dependent decrease in the output voltage U _OUT1 .

In the same way, the regulator for the output voltage U _{OUT2 on} a comparator OP2, which compares the output voltage U _OUT2 with a predetermined setpoint and the transistor T2 correspondingly _controls to _regulate the output voltage U _OUT2 to the predetermined desired value.

For measuring the output voltage U _OUT2 , a voltage divider consisting of two resistors R3, R4 is likewise provided, which is connected between the output 4 of the voltage supply circuit 1 and ground. The center tap between the two resistors R3, R4 is connected to the inverting input of the comparator OP2, while the non-inverting input of the comparator OP2 is connected to the reference voltage element 6. A drop in the output voltage U _OUT2 below the setpoint value specified by the reference voltage _element 6 thus causes the comparator OP2 to open the transistor T2 so that the output capacitors C3, C4 can be charged. On the other hand, an increase in the output voltage U _OUT2 over the reference value specified by the reference voltage _element 6 results in the comparator OP2 blocking the transistor T2, so that the output capacitors C3, C4 are no longer charged, which leads to a load-dependent decrease in the output voltage U _OUT2 .

However, the setpoint values for the output voltages U _OUT1 and U _OUT2 are not the same, but can be determined by a suitable dimensioning of the resistors R1, R2 or R3, R4.

Furthermore, the power supply _{circuit 1 according} to the invention has a control loop in order to limit the voltage difference between the output voltage U _OUT1 and the output voltage U _OUT2 .

For measuring this voltage difference, a comparator OP3 is provided, wherein the inverting input of the comparator OP3 is connected to the output 3 of the voltage supply circuit, while the non-inverting input of the comparator OP3 is connected to the output 4 of the voltage supply circuit 1.

On the output side, the comparator OP3 is connected to the two comparators OP1 and OP2, so that the comparator OP3 indirectly drives the two transistors T2 and T3. If the output voltage U _{OUT1 drops} below the output voltage U _OUT2 , then the comparator OP3 controls the two comparators OP1 and OP2 so that the two transistors T2 and T3 are turned on. In this case, the output 3 is short-circuited via the two transistors T2 and T3 to the output 4, whereby a synchronization of the two output voltages U _OUT1 and U _{OUT2 is} forced. _{On the} other hand, if the output voltage U _{OUT1 lies} above the output voltage U _OUT2 , then the comparator OP3 has no influence on the two comparators OP1 and OP2.

In an alternative shown in dashed lines, the power supply circuit 1 has a transistor T4 which is connected between the output 3 and the output 4 and is driven by the comparator OP3. The comparator OP3 turns on the transistor T4 when the output voltage U _{OUT1 falls} below the output voltage U _OUT2 , whereby a synchronization of the output voltages U _OUT1 and U _{OUT2 is} forced. In _contrast , if the output voltage U _{OUT1 is} above the output voltage U _OUT2 , the comparator OP3 in this alternative blocks the transistor T4, so that the output voltages U _OUT1 and U _{OUT2 are adjusted} by the two comparators OP1 and OP2 to their respective desired values.

In addition, the power supply circuit 1 has a controllable switching element 7, which connects the output 4 to ground and thus enables a short circuit of the output voltage U _OUT2 to ground. That way, the two can Output capacitors C3, C4 are completely discharged to produce after a shutdown a defined initial state for the next startup. In addition, a switching of the switching element 7 also leads to a discharge of the output capacitors C1, C2, when the two transistors T2, T3 simultaneously through or when the transistor T4 conducts.

The control of the switching element 7 takes place here by a control unit 8, which is connected to the output 4 and compares the output voltage U _OUT2 with a predetermined limit. When falling below the limit value, the control unit 8 then switches the switching element 7 so that the output capacitors C3, C4 or C1, C2 are completely discharged at the end of a switch-off phase.

Furthermore, the voltage supply circuit 1 has a conventional charge pump circuit 9, which pumps the electrical energy stored in a pump capacitor C5 several times into a buffer capacitor C6, so that the output voltage of the charge pump circuit 9 rises above the input voltage U _IN . The driving of the charge pump circuit 9 is effected by a conventional charge pump oscillator 10.

The turn-on operation of the power supply circuit 1 described above will now be explained.

Here, the reference voltage _element 6 is a continuously increasing setpoint for the output voltages U _OUT1 and U _OUT2 before, the voltage increase is so slow that the two controllers OP1, OP2 for the output voltage U _OUT1 and U _OUT2 also at a different load on the outputs 3, 4 are able to _adjust the output voltages U _OU1 , U _OUT2 without large deviations to the respective setpoint. The slow ramp up of the setpoint for the output voltages U _OUT1 , U _OUT2 thus prevents the voltage difference between the output voltages U _OUT1 , U _{OUT1 leaves} the permissible range.

In the following, the turn-off operation of the power supply circuit 1 described above will be explained, which can be initiated in various ways.

One possibility for initiating the switch-off process is that from the outside a shutdown signal is applied to the control input switch, which is connected to the comparator OP1. The shutdown signal then causes the comparator OP1 to turn off the transistor T2.

In addition, the switch-off can also be initiated by the pre-regulator 5, when the input voltage U _{IN is} turned off. The pre-regulator 5 is therefore also connected to the comparator OP1 and controls it at the beginning of the turn-off so that the transistor T2 blocks.

The blocking of the transistor T2 initially leads to a load-dependent discharge of the output capacitors C1, C2 via the output 3 and thus to a decrease in the output voltage U _OUT1 , which is greater than the output voltage U _OUT2 at the beginning of the switch-off.

The output voltage U _OUT2 , on the other hand, is initially kept at its desired value by the comparator OP2 until the output voltage U _OUT1 then drops below the output voltage U _OUT2 as a result of the discharge of the output _capacitors C1, C2.

As soon as the output voltage U _{OUT1 has dropped} to the output voltage U _OUT2 , the synchronization function is activated by the comparator OP3 activating the two comparators OP1, OP2 in such a way that they pass through the two transistors T2, T3. In this state, the output 3 via the two transistors T2 and T3 to the output 4 of the power supply circuit short-circuited, so that a synchronization of the two output voltages U _OUT1 , U _{OUT2 is} forced.

In addition, the comparator OP3 at this time also controls the pre-regulator 5 so that it separates the transistor T1, so that a complete shutdown of the two output voltages U _OUT1 and U _{OUT2 is} possible.

The two output voltages U _OUT1 and U _OUT2 then decrease synchronously until a limit value specified by the control unit 8 is exceeded, whereupon the control unit 8 _switches the switching element 7 so that the output capacitors C1, C2 and C3, C4 are finally short-circuited to ground, resulting in a complete discharge of the output capacitors C1-C4.

On the one hand shortens the short circuit of the output capacitors C1-C4 via the switching element 7, the shutdown.

On the other hand, the complete discharge of the output capacitors C1-C4 at the end of a switch-off process leads to a defined initial state for the next run-up.

The required for the shutdown electrical energy is provided by the charge pump circuit 9, if the input voltage U _{IN has been} turned off. In such case, the pre-regulator 5 turns off the charge pump oscillator 10 to save power during the turn-off operation.

The illustrated in Figure 2 alternative embodiment of a power supply circuit 1 according to the invention is largely consistent with the power supply circuit described above and shown in Figure 1, so that reference is made in the following to avoid repetition largely to the above description.

In addition, matching components in Figures 1 and 2 are provided with corresponding reference numerals to facilitate the assignment.

A special feature of this embodiment is the regulation of the voltage difference between the two output voltages U _OUT1 and U _OUT2 . For this purpose, the voltage supply circuit 1 has two comparators OP4 and OP5, which check whether the voltage difference between the two output voltages U _OUT1 and U _{OUT2 leaves} the permissible range.

In this case, the comparator OP4 checks whether the voltage difference between the two output voltages U _OUT1 , U _{OUT2 becomes} too large. For this purpose, the non-inverting input of the comparator OP4 is connected to the output 3, while the inverting input of the comparator OP4 is connected to the output 4 via a reference voltage element 11. The reference voltage _element 11 in this case supplies a reference voltage U _REF1 , _which corresponds to the maximum permissible voltage difference between the two output voltages U _OUT1 , U _OUT2 . On the output side, the comparator OP4 is connected to the transistor T2 in order to regulate the voltage difference between the two output voltages U _OUT1 and U _OUT2 . The comparator OP4 thus checks the following voltage condition: $${\mathrm{U}}_{\mathrm{OUT}\mathrm{1}}\mathrm{>}{\mathrm{U}}_{\mathrm{OUT}\mathrm{2}}\mathrm{+}{\mathrm{U}}_{\mathrm{REF}\mathrm{1}}\mathrm{,}$$

If this voltage condition is satisfied, the comparator OP4 blocks the transistor T2, so that the output voltage U _OUT1 does not increase any further. This ensures that the maximum permissible voltage difference U _{OUT1 -U OUT2} between the two output voltages remains within the limits specified by the reference voltage.

By contrast, the comparator OP5 is intended to prevent the minimum permissible voltage difference between the two output voltages U _OUT1 , U _{OUT2 from being} undershot. This is the inverting Input of the comparator OP5 connected to the output 3, while the non-inverting input of the comparator OP5 is connected via a reference voltage element 12 to the output 4. The reference voltage _element 12 in this case supplies a reference voltage U _{REF2 which} corresponds to the minimum permissible voltage difference between the output voltages U _OUT1 , U _OUT2 . On the output side, the comparator OP5 is connected to the transistor T3, so that the output voltage U _{OUT2 is regulated} as a function of the measured voltage difference. The comparator OP5 checks the following voltage condition: $${\mathrm{U}}_{\mathrm{OUT}\mathrm{1}}<{\mathrm{U}}_{\mathrm{OUT}\mathrm{2}}\mathrm{+}{\mathrm{U}}_{\mathrm{REF}\mathrm{2}}\mathrm{,}$$

If this condition is satisfied, the comparator OP5 blocks the transistor T3, so that the output voltage U _OUT2 can not increase further. This ensures that the voltage difference between the two output _voltages U _{OUT1 -U OUT2 remains} within the limits specified by the reference voltage.

Claims (11)

1. Power supply circuit (1), especially for a microcontroller of a transmission control, with
   a first output (3) to provide a first output voltage (U_OUT1) and
   a second output (4) to provide a second output voltage (U_OUT2), with the first output voltage (U_OUT1) and the second output voltage (U_OUT2) being different, as well as with
   an adjusting unit (OP1, T2, OP2, T3) for adjusting the first output voltage (U_OUT1) and the second output voltage (U_OUT2),
   characterized in that,
   to limit the voltage difference between the first output voltage (U_OUT1) and the second output voltage (U_OUT2) a first regulator (OP3-OP5, T2, T3) is provided,
   the first regulator (OP3-OP5, T2, T3) is connected on the input side to the first output (3) and the second output (4) and on the output side to the adjusting unit (OP1, T2, OP2, T3), with the first regulator (OP3-OP5, T2, T3) predetermining the control variables for the regulation of the voltage difference through which the first regulator (OP3-OP5, T2, T3) regulates the voltage difference between the two output voltages (U_OUT1), (U_OUT2).
2. Power supply circuit (1) according to claim 1
   characterized in that,
   the first regulator features a comparator (OP3) with a first input and a second input, with the first input of the comparator (OP3) being connected to the first output (3) whereas the second input of the comparator (OP3) is connected to the second output (4).
3. Power supply circuit (1) according to claim 2,
   characterized in that,
   for low-resistance connection of the first output (3) to the second output (4) at least one controllable switching element (T2-T4) is provided, with the comparator (OP3) being connected on the output side with the switching element (T2-T4).
4. Power supply circuit (1) according to claim 3,
   characterized in that,
   the setting unit for setting the first output voltage (U_OUT1) features a first switching element (T2) and for setting the second output voltage (U_OUT2) a second switching element (T3), with the first switching element (T2) and the second element (T3) being connected in series between the first output (3) and the second output (4) and being connected to the comparator (OP3) for activation.
5. Power supply circuit (1) according to at least one of the previous Claims,
   characterized in that,
   the first regulator features two comparators (OP4, OP5) which, to record the voltage difference are each connected on the input side with the first output (3) and the second output (4).
6. Power supply circuit (1) according to claim 5,
   characterized in that,
   at least one of the two comparators (OP4, OP5) of the first regulator is connected via a reference voltage element (11, 12) to the first output (3) or the second output (4).
7. Power supply circuit (1) according to at least one of the previous claims,
   characterized in that,
   the setting unit features a second regulator (OP1, T2) to regulate the first output voltage (U_OUT1) and a third regulator (OP2, T3) to regulate the second output voltage (U_OUT2).
8. Power supply circuit (1) according to claim 7,
   characterized in that,
   the second regulator (OP1, T2) and/or the third regulator (OP2, T3) are connected on the input side with a reference voltage element (6).
9. Power supply circuit (1) according to claim 8,
   characterized in that,
   the reference voltage element (6) features a variable output voltage which corresponds to a prespecified voltage time line.
10. Power supply circuit (1) according to at least one of the previous claims,
    characterized in that,
    the first output (3) and/or the second output (4) is connected to an output capacitor (C1-C4), in which case to discharge the output capacitor (C1-C4), a short circuit switch (7) is provided.
11. Power supply circuit (1) according to at least one of the previous claims,
    characterized in that,
    a charge pump circuit (9) is provided to supply an internal control voltage.

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