EP1364406A2 - Circuit arrangement - Google Patents

Circuit arrangement

Info

Publication number
EP1364406A2
EP1364406A2 EP02712790A EP02712790A EP1364406A2 EP 1364406 A2 EP1364406 A2 EP 1364406A2 EP 02712790 A EP02712790 A EP 02712790A EP 02712790 A EP02712790 A EP 02712790A EP 1364406 A2 EP1364406 A2 EP 1364406A2
Authority
EP
European Patent Office
Prior art keywords
plate
heat
circuit arrangement
chips
inner region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP02712790A
Other languages
German (de)
French (fr)
Inventor
Gerd Auerswald
Hans Rappl
Kurt Gross
Stefan Kulig
Michael Kirchberger
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Continental Automotive GmbH
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Publication of EP1364406A2 publication Critical patent/EP1364406A2/en
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • H01L25/162Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits the devices being mounted on two or more different substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/4824Connecting between the body and an opposite side of the item with respect to the body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01004Beryllium [Be]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/0101Neon [Ne]
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    • H01L2924/01013Aluminum [Al]
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    • H01L2924/01015Phosphorus [P]
    • HELECTRICITY
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01019Potassium [K]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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    • H01L2924/0102Calcium [Ca]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2924/01023Vanadium [V]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01029Copper [Cu]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01031Gallium [Ga]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01052Tellurium [Te]
    • HELECTRICITY
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    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2924/01Chemical elements
    • H01L2924/01065Terbium [Tb]
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • H01L2924/13055Insulated gate bipolar transistor [IGBT]
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901Structure
    • H01L2924/1904Component type
    • H01L2924/19041Component type being a capacitor

Definitions

  • the invention relates to a circuit arrangement, i. H. an arrangement of interconnected components. More specifically, the invention relates to a circuit arrangement with a power section.
  • the circuit arrangement should therefore be suitable for high currents.
  • Such a circuit arrangement has the advantage that it requires only a small amount of space due to the housing-less chips.
  • a disadvantage of such a circuit arrangement is that it acts as a power module for very high currents, such as, for. B. 300 amperes continuous current, is not suitable since conductor tracks arranged in a ceramic carrier generally cannot conduct such high currents.
  • Another disadvantage is that it is difficult to dissipate heat from a circuit arrangement with a ceramic carrier.
  • good heat dissipation is required for high-current applications, since in this case the components generally generate a lot of heat loss, which could lead to the destruction of the components.
  • the invention has for its object to provide a circuit arrangement that takes up little space and is also suitable for high currents.
  • the object is achieved by a circuit arrangement with the following features:
  • the circuit arrangement has a power unit which comprises heat-generating components and at least one less heat-generating component.
  • the less heat-generating component is arranged in an inner region of the circuit arrangement.
  • the heat-generating components are arranged around the inner region and fastened to at least one metallic body which acts as an electrical line and to which they are electrically connected.
  • the body is arranged on a heat sink in an electrically insulated manner, at least in the region of the heat-generating components.
  • the heat sink is configured around the inner area.
  • the heat-generating components are attached directly to the body, which also serves as a carrier for the heat-generating components and as an electrical line. No further lines and wires between the heat-generating components and the body are required, which would increase the electrical resistance.
  • the electrical resistance of the body is very small compared to conductor tracks arranged in an insulating carrier. The circuit arrangement is therefore suitable for high currents.
  • heat generated in the heat-generating components can be dissipated very quickly, since between the heat-generating components and the heat sink, essentially only the metallic body is arranged, which has a better thermal conductivity than a ceramic carrier.
  • the circuit arrangement is designed to be very space-saving since the heat sink is only arranged under the components that generate high heat loss.
  • the circuit arrangement is also very compact for the reason that the heat-generating components by the less heat Constructive component are arranged around, so that connections between the components can be very short.
  • the dimensions of the body depend on the current strength and the thermal conductivity to be achieved.
  • the body is preferably between approximately 2 mm and 4 mm thick and essentially consists of copper. However, other materials are suitable for the body, such as. B. aluminum.
  • the heat-generating components can be chips that, for. B. contain (power) transistors, diodes or IGBT's.
  • the less heat-generating component can, for. B. be a capacitor.
  • the chips In order to reduce the space requirement of the circuit arrangement and to improve the heat dissipation, it is advantageous if the chips have no housing.
  • the circuit arrangement preferably has a logic section via which the power section can be controlled.
  • the logic part is arranged above the inner area. This also has the advantage of being electrical
  • connections between the logic section and the power section can be very short.
  • the connections can e.g. B. realized by wire connections (bonds). Additional connection lines and sensitive and cost-intensive plug connections can be omitted.
  • the circuit arrangement can have a plate which covers the inner region and is arranged above the less heat-generating component.
  • the plate has at least one opening above the inner area.
  • the less heat-generating component is via a first wire-shaped connection, which is passed through the opening, electrically connected to the plate.
  • the plate Due to the first wire-shaped connection, the plate has unevenness. So that the logic part can be applied to a flat surface, it is advantageous to provide a carrier which is arranged above the inner region and above the plate.
  • the carrier can be electrically insulated from the plate by an insulating layer.
  • the surface of the carrier facing the plate has an indentation in the region of the first wire-shaped connection in order to give space to the first wire-shaped connection.
  • the surface of the carrier facing away from the plate is flat.
  • the logic part is arranged in an electrically insulated manner on the surface of the carrier facing away from the plate.
  • the carrier is used for mechanical adaptation between the plate and the logic part.
  • the logic part can simply be removed from the carrier and repaired or replaced independently of the power unit.
  • the carrier preferably consists essentially of a material with high thermal conductivity so that heat generated in the logic part can be dissipated via the carrier and via the plate into the heat sink.
  • the carrier consists essentially of aluminum, for example, and is between 1 and 10 mm thick.
  • the circuit arrangement is particularly suitable for connecting half bridges in parallel.
  • the heat-generating components are package-less first chips and second chips configured, each containing a transistor, wherein the first chips are attached to at least a first metallic body and the second chips to a second metallic body.
  • the first body is designed as a rail, which extends along the outer edge of the heat sink.
  • the second body is plate-shaped and covers the inner area and the inner edge of the heat sink.
  • the plate is arranged on the second body in an electrically insulated manner.
  • the second body has a first opening above the inner region, which is arranged below the opening of the plate and through which the first wire-shaped connection is passed.
  • the second body has at least one second opening above the inner region.
  • the less heat-generating component is designed as a capacitor and is electrically connected to the second body via a second wire-shaped connection which is guided through the second opening.
  • the first wire-shaped connection and the second wire-shaped connection are capacitor connections.
  • the first chips are electrically connected to the board via wire connections.
  • the second chips are electrically connected to the first body via wire connections.
  • the second body and the plate form two metal plates which are electrically insulated from one another and which are different
  • the capacitor is inserted between the different potentials.
  • the first chips are connected in parallel and between the first body and the plate.
  • the second chips are connected in parallel and between the first body and the second body.
  • a first chip and a second chip each form a half bridge.
  • the half bridges are connected in parallel to each other and between the plate and the second body.
  • the circumferential arrangement of the heat sink enables a particularly compact arrangement of a large number of half bridges.
  • the second chips are connected to one another by the plate-shaped second body.
  • first rails can be provided, which z. B. each extend along an edge of the heat sink.
  • the first bodies are preferably not electrically connected to one another so that they can lead different phases.
  • the first body, the second body and the plate are made of copper, for example. However, there are also other materials, such as. B. aluminum, suitable.
  • FIG. 1 shows part of a circuit diagram of a circuit arrangement with first chips, second chips, capacitors, an output connection, a ground connection and a voltage connection.
  • FIG. 2 shows a three-dimensional representation of the circuit arrangement, in which the first chips, the second chips, a first body, a second body, a plate, a carrier, a logic part, a heat sink and bond connections are shown.
  • FIG. 3 shows a cross section through an inner region of the circuit arrangement, in which capacitors, first wire-shaped connections, second wire-shaped connections, openings, first openings, second openings, insulating layers, the second body, the plate, the carrier and the logic part are shown are.
  • a circuit arrangement is provided which has a power section LE and a logic section LO.
  • the power section LE consists of a parallel connection of half bridges and of capacitors K connected in parallel.
  • the capacitors K form fewer heat-generating components of the circuit arrangement.
  • the power unit LE has, as heat-generating components, first chips C1, which are fastened directly to a plurality of first metallic bodies Kl, which are designed as a rail and essentially consist of copper, without a housing (see FIG. 2).
  • the first bodies K1 are arranged along outer edges of a cooling body KK which runs around an inner region IB of the circuit arrangement.
  • the first chips C1 each have a transistor.
  • the first chips Cl are arranged on the first bodies Kl such that first source / drain regions of the first chips Cl are electrically connected to the first bodies Kl.
  • the first bodies Kl have a thickness of approx. 4 mm, a width of approx. 10 mm and a length of approx. 12 cm or 18 cm.
  • the first bodies Kl are electrically separated from one another and carry out different phases.
  • the power unit LE has, as heat-generating components, second chips C2, which are designed like the first chips C1 and are fastened directly to a second metallic body K2 without a housing such that first source / drain regions of the transistors of the second chips C2 with the second one Body K2 are electrically connected.
  • the second body K2 is plate-shaped, consists essentially of copper and covers the inner region and inner edges of the heat sink KK (see FIG. 2).
  • the capacitors K are arranged under the second body K2 in the inner region IB (see FIG. 3). Second source / drain regions of the second chips C2 are connected to the first bodies Kl via bond connections B.
  • a metallic plate P which essentially consists of copper, is arranged on the second body K2 in an electrically insulated manner by means of a first insulating layer II (see FIGS. 2 and 3).
  • the plate P has jagged projections V which are arranged between adjacent second chips C2. Second source / drain regions of the transistors of the first chips C1 are connected to the projections V of the plate P via bond connections B.
  • the second body K2 has first openings 01 and second openings 02 above the inner region.
  • the plate P has openings 0 above the first openings 01 and the second openings 02 of the second body K2.
  • the capacitors K are electrically connected to the plate P via first wire-shaped connections B1, which are passed through the first openings 01 of the second body K2 and through the openings 0 of the plate P arranged above them.
  • the capacitors K are electrically connected to the second body K2 via second wire-shaped connections B2, which are led through the second openings 02.
  • the openings 0 of the plate P, which are arranged above the ' second openings of the second body K2, give space to the second wire-shaped connections B2.
  • the first wire-shaped connections B1 and the second wire-shaped connections B2 form capacitor connections of the capacitors K.
  • the surfaces of the openings 0, the first openings 01 and the second openings 02 are provided with second insulating layers 12.
  • a carrier T made of aluminum is arranged above the plate P (see FIG. 2).
  • the carrier T is approximately 5 mm thick.
  • the surface of the carrier T facing the plate P has indentations E in the region of the first wire-shaped connections B1 in order to give space to the first wire-shaped connections B1.
  • the surface of the carrier T facing away from the plate P is flat.
  • the logic part LO is arranged in an electrically insulated manner on the surface of the carrier T facing away from the plate P by a third insulating layer 13 and is connected to the power part LE via bond connections B.
  • the first bodies Kl are connected to output connections AA (see FIG. 1).
  • the second body K2 is connected to a voltage connection SP which is supplied with approximately 36 volts.
  • the plate P is connected to a ground connection GA, to which zero volts are applied.
  • the capacitor K are connected in parallel to each other and between the ground connection GA and the voltage connection SP.
  • the first chips C1 are connected in parallel and between the output connection AA and the ground connection GA.
  • the second chips C2 are connected in parallel and between the output terminal AA and the voltage terminal SP.
  • the first chips C1 form a lowside drive.
  • the second chips C2 form an en highside drive.
  • a first chip C1 and a second chip C2 each form a half bridge. The half bridges are connected in parallel and between the ground connection GA and the voltage connection SP.

Abstract

The circuit arrangement comprises a power section (LE), comprising heat-generating components and at least one component producing less heat. The component producing less heat is arranged in an internal region of the circuit arrangement. The heat-generating components are arranged around the inner region and fixed to at least one metallic body (K1) acting as electrical conductor, to which said components are electrically connected. In order to cool the heat-generating components the body (K1) is arranged on a cooling body (KK) in an electrically-insulating manner, at least in the region of the heat-generating components. The cooling body (KK) is embodied running around the internal region.

Description

Beschreibungdescription
Schaltungsanordnungcircuitry
Die Erfindung betrifft eine Schaltungsanordnung, d. h. eine Anordnung aus miteinander verschalteten Bauelementen. Genauer gesagt betrifft die Erfindung eine Schaltungsanordnung mit einem Leistungsteil. Die Schaltungsanordnung soll also für hohe Ströme geeignet sein.The invention relates to a circuit arrangement, i. H. an arrangement of interconnected components. More specifically, the invention relates to a circuit arrangement with a power section. The circuit arrangement should therefore be suitable for high currents.
Es ist bekannt, Schaltungsanordnungen in Hybridtechnologie herzustellen. Dazu sind Chips mit Halbleiterbauelementen ohne Chipgehäuse an einem Keramikträger, in dem Leiterbahnen angeordnet sind, befestigt. Die Befestigung ist derart, daß ein direkter elektrischer Kontakt zwischen den Leiterbahnen und den Chips gebildet wird. Weitere elektrische Leitungen für die Chips werden durch Drahtverbindungen realisiert.It is known to produce circuit arrangements using hybrid technology. For this purpose, chips with semiconductor components without a chip housing are attached to a ceramic carrier in which conductor tracks are arranged. The attachment is such that a direct electrical contact is formed between the conductor tracks and the chips. Further electrical lines for the chips are realized by wire connections.
Eine solche Schaltungsanordnung hat den Vorteil, dass sie aufgrund der gehäuselosen Chips nur einen geringen Platzbedarf erfordert. Nachteilig an einer solchen Schaltungsanordnung ist jedoch, dass sie als Leistungsmodul für sehr hohe Ströme, wie z. B. 300 Ampere Dauerstrom, nicht geeignet ist, da in einem Keramikträger angeordnete Leiterbahnen in der Re- gel solche hohen Ströme nicht leiten können.Such a circuit arrangement has the advantage that it requires only a small amount of space due to the housing-less chips. A disadvantage of such a circuit arrangement, however, is that it acts as a power module for very high currents, such as, for. B. 300 amperes continuous current, is not suitable since conductor tracks arranged in a ceramic carrier generally cannot conduct such high currents.
Ein weiterer Nachteil besteht darin, dass sich Wärme aus einer Schaltungsanordnung mit Keramikträger nur schlecht abführen lässt. Eine gute Wärmeabfuhr ist jedoch für Hochstroman- Wendungen erforderlich, da in diesem Fall die Bauelemente in der Regel viel Verlustwärme erzeugen, die zu einer Zerstörung der Bauelemente führen könnte.Another disadvantage is that it is difficult to dissipate heat from a circuit arrangement with a ceramic carrier. However, good heat dissipation is required for high-current applications, since in this case the components generally generate a lot of heat loss, which could lead to the destruction of the components.
Der Erfindung liegt die Aufgabe zugrunde, eine Schaltungsan- Ordnung anzugeben, die einen geringen Platzbedarf aufweist und zugleich für hohe Ströme geeignet ist. Die Aufgabe wird gelöst durch eine Schaltungsanordnung mit folgenden Merkmalen: Die Schaltungsanordnung weist ein Leistungsteil auf, das wärmeerzeugende Bauelemente und mindestens ein weniger wärmeerzeugendes Bauelement umfasst. Das weniger wärmeerzeugende Bauelement ist in einem inneren Bereich der Schaltungsanordnung angeordnet. Die wärmeerzeugenden Bauelemente sind um den inneren Bereich herum angeordnet und an mindestens einem als elektrische Leitung wirkenden metallischen Körper befestigt, mit dem sie elektrisch verbunden sind. Zur Kühlung der wärmeerzeugenden Bauelemente ist der Körper elektrisch isoliert zumindest im Bereich der wärmeerzeugenden Bauelemente auf einem Kühlkörper angeordnet. Der Kühlkörper ist um den inneren Bereich umlaufend ausgestaltet.The invention has for its object to provide a circuit arrangement that takes up little space and is also suitable for high currents. The object is achieved by a circuit arrangement with the following features: The circuit arrangement has a power unit which comprises heat-generating components and at least one less heat-generating component. The less heat-generating component is arranged in an inner region of the circuit arrangement. The heat-generating components are arranged around the inner region and fastened to at least one metallic body which acts as an electrical line and to which they are electrically connected. To cool the heat-generating components, the body is arranged on a heat sink in an electrically insulated manner, at least in the region of the heat-generating components. The heat sink is configured around the inner area.
Die wärmeerzeugenden Bauelemente sind direkt am Körper befestigt, der zugleich als Träger der wärmeerzeugenden Bauelemente und als elektrische Leitung dient. Es sind keine weiteren Leitungen und Drähte zwischen den wärmeerzeugenden Bauelementen und dem Körper erforderlich, die den elektrischen Wider- stand erhöhen würden. Der elektrische Widerstand des Körpers ist sehr klein im Vergleich zu in einem isolierenden Träger angeordneten Leiterbahnen. Die Schaltungsanordnung ist folglich für hohe Ströme geeignet.The heat-generating components are attached directly to the body, which also serves as a carrier for the heat-generating components and as an electrical line. No further lines and wires between the heat-generating components and the body are required, which would increase the electrical resistance. The electrical resistance of the body is very small compared to conductor tracks arranged in an insulating carrier. The circuit arrangement is therefore suitable for high currents.
Darüber hinaus kann in den wärmeerzeugenden Bauelementen erzeugte Wärme sehr schnell abgeführt werden, da zwischen den wärmeerzeugenden Bauelementen und dem Kühlkörper im wesentlichen nur der metallische Körper angeordnet ist, der eine bessere Wärmeleitfähigkeit aufweist, als ein Träger aus Keramik.In addition, heat generated in the heat-generating components can be dissipated very quickly, since between the heat-generating components and the heat sink, essentially only the metallic body is arranged, which has a better thermal conductivity than a ceramic carrier.
Die Schaltungsanordnung ist sehr platzsparend ausgeführt, da der Kühlkörper nur unter den Bauelementen angeordnet ist, die hohe Verlustwärme erzeugen.The circuit arrangement is designed to be very space-saving since the heat sink is only arranged under the components that generate high heat loss.
Die Schaltungsanordnung ist auch aus dem Grund sehr kompakt, weil die wärmeerzeugenden Bauelemente um das weniger wärmeer- zeugende Bauelement herum angeordnet sind, so dass Verbindungen zwischen den Bauelementen sehr kurz sein können.The circuit arrangement is also very compact for the reason that the heat-generating components by the less heat Constructive component are arranged around, so that connections between the components can be very short.
Die Dimensionierung des Körpers ist abhängig von der Strom- stärke und der zu erreichenden thermischen Leitfähigkeit. Der Körper ist vorzugsweise zwischen ca. 2 mm und 4 mm dick und besteht im Wesentlichen aus Kupfer. Es sind jedoch auch andere Materialien für den Körper geeignet, wie z. B. Aluminium.The dimensions of the body depend on the current strength and the thermal conductivity to be achieved. The body is preferably between approximately 2 mm and 4 mm thick and essentially consists of copper. However, other materials are suitable for the body, such as. B. aluminum.
Die wärmeerzeugenden Bauelemente können Chips sein, die z. B. (Leistungs) ransistoren, Dioden oder IGBT's enthalten. Das weniger wärmeerzeugende Bauelement kann z. B. ein Kondensator sein.The heat-generating components can be chips that, for. B. contain (power) transistors, diodes or IGBT's. The less heat-generating component can, for. B. be a capacitor.
Um den Platzbedarf der Schaltungsanordnung zu reduzieren und um die Wärmeabfuhr zu verbessern, ist es vorteilhaft, wenn die Chips keine Gehäuse aufweisen.In order to reduce the space requirement of the circuit arrangement and to improve the heat dissipation, it is advantageous if the chips have no housing.
Die Schaltungsanordnung weist vorzugsweise neben dem Leis- tungsteil ein Logikteil auf, über den das Leistungsteil gesteuert werden kann.In addition to the power section, the circuit arrangement preferably has a logic section via which the power section can be controlled.
Zur Reduktion des Platzbedarfs der Schaltungsanordnung ist es vorteilhaft, wenn das Logikteil über dem inneren Bereich an- geordnet ist. Dies hat auch den Vorteil, dass elektrischeTo reduce the space requirement of the circuit arrangement, it is advantageous if the logic part is arranged above the inner area. This also has the advantage of being electrical
Verbindungen zwischen dem Logikteil und dem Leistungsteil sehr kurz sein können. Die Verbindungen können z. B. durch Drahtverbindungen (Bondungen) realisiert werden. Zusätzliche Verbindungsleitungen und störempfindliche und kostenintensive Steckverbindungen können entfallen.Connections between the logic section and the power section can be very short. The connections can e.g. B. realized by wire connections (bonds). Additional connection lines and sensitive and cost-intensive plug connections can be omitted.
Die Schaltungsanordnung kann eine Platte aufweisen, die den inneren Bereich bedeckt und über dem weniger wärmeerzeugenden Bauelement angeordnet ist. Die Platte weist zumindest eine Öffnung über dem inneren Bereich auf. Das weniger wärmeerzeugende Bauelement ist über eine erste drahtförmige Verbindung, der durch die Öffnung geführt ist, mit der Platte elektrisch verbunden.The circuit arrangement can have a plate which covers the inner region and is arranged above the less heat-generating component. The plate has at least one opening above the inner area. The less heat-generating component is via a first wire-shaped connection, which is passed through the opening, electrically connected to the plate.
Aufgrund der ersten drahtförmigen Verbindung weist die Platte Unebenheiten auf. Damit das Logikteil auf eine ebene Fläche aufgebracht werden kann, ist es vorteilhaft, einen Träger vorzusehen, der über dem inneren Bereich und über der Platte angeordnet ist. Der Träger kann von der Platte durch eine i- solierende Schicht elektrisch isoliert sein. Die der Platte zugewandte Fläche des Trägers weist im Bereich der ersten drahtförmigen Verbindung eine Einbuchtung auf, um der ersten drahtförmige Verbindung Raum zu geben. Die der Platte abgewandte Fläche des Trägers ist dagegen eben. Das Logikteil ist elektrisch isoliert auf der der Platte abgewandten Fläche des Trägers angeordnet. Der Träger dient der mechanischen Adaption zwischen der Platte und dem Logikteil.Due to the first wire-shaped connection, the plate has unevenness. So that the logic part can be applied to a flat surface, it is advantageous to provide a carrier which is arranged above the inner region and above the plate. The carrier can be electrically insulated from the plate by an insulating layer. The surface of the carrier facing the plate has an indentation in the region of the first wire-shaped connection in order to give space to the first wire-shaped connection. The surface of the carrier facing away from the plate, however, is flat. The logic part is arranged in an electrically insulated manner on the surface of the carrier facing away from the plate. The carrier is used for mechanical adaptation between the plate and the logic part.
Stellt sich das Logikteil als fehlerhaft heraus, so kann das Logikteil einfach von dem Träger entfernt werden und unabhän- gig vom Leistungsteil repariert bzw. ausgetauscht werden.If the logic part turns out to be defective, the logic part can simply be removed from the carrier and repaired or replaced independently of the power unit.
Es können mehrere weniger wärmeerzeugende Bauelemente vorgesehen sein, die im inneren Bereich der Schaltungsanordnung angeordnet sind und über erste drahtförmige Verbindungen mit der Platte elektrisch verbunden sind. Entsprechend weist derSeveral less heat-generating components can be provided, which are arranged in the inner region of the circuit arrangement and are electrically connected to the plate via first wire-shaped connections. Accordingly, the
Träger mehrere Einbuchtungen auf .Carrier several indentations.
Vorzugsweise besteht der Träger im wesentlichen aus einem Material mit hoher Wärmeleitfähigkeit, damit im Logikteil er- zeugte Wärme über den Träger und über die Platte in den Kühlkörper abgeführt werden kann. Der Träger besteht beispielsweise im Wesentlichen aus Aluminium und ist zwischen 1 und 10 mm dick.The carrier preferably consists essentially of a material with high thermal conductivity so that heat generated in the logic part can be dissipated via the carrier and via the plate into the heat sink. The carrier consists essentially of aluminum, for example, and is between 1 and 10 mm thick.
Besonders geeignet ist die Schaltungsanordnung für eine Parallelschaltung von Halbbrücken. Dazu sind die wärmeerzeugenden Bauelemente als gehäuselose erste Chips und zweite Chips ausgestaltet, die jeweils einen Transistor enthalten, wobei die ersten Chips an mindestens einem ersten metallischen Körper und die zweiten Chips an einem zweiten metallischen Körper befestigt sind. Der erste Körper ist als Schiene ausges- taltet, die sich entlang des äußeren Randes des Kühlkörpers erstreckt. Der zweite Körper ist plattenförmig ausgestaltet und bedeckt den inneren Bereich und den inneren Rand des Kühlkörpers. Die Platte ist elektrisch isoliert auf dem zweiten Körper angeordnet. Der zweite Körper weist eine erste Öffnung über dem inneren Bereich auf, die unterhalb der Öffnung der Platte angeordnet ist und durch die die erste drahtförmige Verbindung geführt ist. Der zweite Körper weist mindestens eine zweite Öffnung über dem inneren Bereich auf. Das weniger wärmeerzeugende Bauelement ist als Kondensator aus- gestaltet und über eine zweite drahtförmige Verbindung, die durch die zweite Öffnung geführt ist, mit dem zweiten Körper elektrisch verbunden. Die erste drahtförmige Verbindung und die zweite drahtförmige Verbindung sind in diesem Fall Kondensatoranschlüsse. Die ersten Chips sind über Drahtverbin- düngen mit der Platte elektrisch verbunden. Die zweiten Chips sind über Drahtverbindungen mit dem ersten Körper elektrisch verbunden.The circuit arrangement is particularly suitable for connecting half bridges in parallel. For this purpose, the heat-generating components are package-less first chips and second chips configured, each containing a transistor, wherein the first chips are attached to at least a first metallic body and the second chips to a second metallic body. The first body is designed as a rail, which extends along the outer edge of the heat sink. The second body is plate-shaped and covers the inner area and the inner edge of the heat sink. The plate is arranged on the second body in an electrically insulated manner. The second body has a first opening above the inner region, which is arranged below the opening of the plate and through which the first wire-shaped connection is passed. The second body has at least one second opening above the inner region. The less heat-generating component is designed as a capacitor and is electrically connected to the second body via a second wire-shaped connection which is guided through the second opening. In this case, the first wire-shaped connection and the second wire-shaped connection are capacitor connections. The first chips are electrically connected to the board via wire connections. The second chips are electrically connected to the first body via wire connections.
Der zweite Körper und die Platte bilden zwei voneinander e- lektrisch isolierte Metallplatten, welche unterschiedlicheThe second body and the plate form two metal plates which are electrically insulated from one another and which are different
Potentiale führen. Zwischen den unterschiedlichen Potentialen wird der Kondensator eingebracht .Lead potential. The capacitor is inserted between the different potentials.
Die ersten Chips sind parallel und zwischen dem ersten Körper und der Platte geschaltet. Die zweiten Chips sind parallel und zwischen dem ersten Körper und dem zweiten Körper geschaltet. Je ein erster Chip und ein zweiter Chip bilden eine Halbbrücke. Die Halbbrücken sind parallel zueinander und zwischen der Platte und dem zweiten Körper geschaltet.The first chips are connected in parallel and between the first body and the plate. The second chips are connected in parallel and between the first body and the second body. A first chip and a second chip each form a half bridge. The half bridges are connected in parallel to each other and between the plate and the second body.
Die umlaufende Anordnung des Kühlkörpers ermöglicht eine besonders kompakte Anordnung einer Vielzahl von Halbbrücken. Die zweiten Chips sind dabei durch den plattenförmigen zweiten Körper untereinander verbunden.The circumferential arrangement of the heat sink enables a particularly compact arrangement of a large number of half bridges. The second chips are connected to one another by the plate-shaped second body.
Es können mehrere erste Schienen vorgesehen sein, die sich z. B. jeweils entlang einer Kante des Kühlkörpers erstrecken. Die ersten Körper sind vorzugsweise elektrisch nicht miteinander verbunden, damit sie unterschiedliche Phasen führen können .Several first rails can be provided, which z. B. each extend along an edge of the heat sink. The first bodies are preferably not electrically connected to one another so that they can lead different phases.
Der erste Körper, der zweite Körper und die Platte bestehen beispielsweise aus Kupfer. Es sind jedoch auch andere Materialien, wie z. B. Aluminium, geeignet.The first body, the second body and the plate are made of copper, for example. However, there are also other materials, such as. B. aluminum, suitable.
Im Folgenden wird ein Ausführungsbeispiel der Erfindung an- hand der Figuren näher erläutert.An exemplary embodiment of the invention is explained in more detail below with reference to the figures.
Figur 1 zeigt einen Teil eines Schaltbildes einer Schaltungsanordnung mit ersten Chips, zweiten Chips, Kondensatoren, einem Ausgangsanschluss, einem Groundanschluss und einem Spannungsanschluss .FIG. 1 shows part of a circuit diagram of a circuit arrangement with first chips, second chips, capacitors, an output connection, a ground connection and a voltage connection.
Figur 2 zeigt eine dreidimensionale Darstellung der Schaltungsanordnung, in der die ersten Chips, die zweiten Chips, ein erster Körper, ein zweiter Körper, eine Platte, ein Träger, ein Logikteil, ein Kühlkörper und Bondverbindungen dargestellt sind.FIG. 2 shows a three-dimensional representation of the circuit arrangement, in which the first chips, the second chips, a first body, a second body, a plate, a carrier, a logic part, a heat sink and bond connections are shown.
Figur 3 zeigt einen Querschnitt durch einen inneren Bereich der Schaltungsanordnung, in dem Kondensatoren, erste drahtförmige Verbindungen, zweite drahtförmige Verbindungen, Öffnungen, erste Öffnungen, zweite Öffnungen, isolierende Schichten, der zweite Körper, die Platte, der Träger und das Logikteil dar- gestellt sind. Im Ausführungsbeispiel ist eine Schaltungsanordnung vorgesehen, die ein Leistungsteil LE und ein Logikteil LO aufweist.FIG. 3 shows a cross section through an inner region of the circuit arrangement, in which capacitors, first wire-shaped connections, second wire-shaped connections, openings, first openings, second openings, insulating layers, the second body, the plate, the carrier and the logic part are shown are. In the exemplary embodiment, a circuit arrangement is provided which has a power section LE and a logic section LO.
Das Leistungsteil LE besteht aus einer Parallelschaltung aus Halbbrücken sowie aus parallel geschalteten Kondensatoren K. Die Kondensatoren K bilden weniger wärmeerzeugende Bauelemente der Schaltungsanordnung.The power section LE consists of a parallel connection of half bridges and of capacitors K connected in parallel. The capacitors K form fewer heat-generating components of the circuit arrangement.
Das Leistungsteil LE weist als wärmeerzeugende Bauelemente erste Chips Cl auf, die ohne Gehäuse direkt an mehreren ersten metallischen Körpern Kl, die als Schiene ausgestaltet sind und im Wesentlichen aus Kupfer bestehen, befestigt sind (siehe Figur 2) . Die ersten Körper Kl sind entlang äußerer Kanten eines um einen inneren Bereich IB der Schaltungsanord- nung umlaufenden Kühlkörper KK angeordnet. Die ersten Chips Cl weisen jeweils einen Transistor auf. Die ersten Chips Cl sind derart auf den ersten Körpern Kl angeordnet, dass erste Source/Drain-Gebiete der ersten Chips Cl mit den ersten Körpern Kl elektrisch verbunden sind.The power unit LE has, as heat-generating components, first chips C1, which are fastened directly to a plurality of first metallic bodies Kl, which are designed as a rail and essentially consist of copper, without a housing (see FIG. 2). The first bodies K1 are arranged along outer edges of a cooling body KK which runs around an inner region IB of the circuit arrangement. The first chips C1 each have a transistor. The first chips Cl are arranged on the first bodies Kl such that first source / drain regions of the first chips Cl are electrically connected to the first bodies Kl.
Die ersten Körper Kl weisen eine Dicke von ca. 4 mm, eine Breite von ca. 10 mm und eine Länge von ca. 12 cm bzw. 18 cm auf. Die ersten Körper Kl sind elektrisch voneinander getrennt und führen verschiedene Phasen.The first bodies Kl have a thickness of approx. 4 mm, a width of approx. 10 mm and a length of approx. 12 cm or 18 cm. The first bodies Kl are electrically separated from one another and carry out different phases.
Das Leistungsteil LE weist als wärmeerzeugende Bauelemente zweite Chips C2 auf, die wie die ersten Chips Cl ausgestaltet sind und ohne Gehäuse derart direkt an einem zweiten metallischen Körper K2 befestigt sind, dass erste Source/Drain- Gebiete der Transistoren der zweiten Chips C2 mit dem zweiten Körper K2 elektrisch verbunden sind. Der zweite Körper K2 ist plattenförmig ausgestaltet, besteht im Wesentlichen aus Kupfer und bedeckt den inneren Bereich sowie innere Kanten des Kühlkörpers KK (siehe Figur 2) . Unter dem zweiten Körper K2 sind im inneren Bereich IB die Kondensatoren K angeordnet (siehe Figur 3) . Zweite Source/Drain-Gebiete der zweiten Chips C2 sind über Bondverbindungen B mit den ersten Körpern Kl verbunden.The power unit LE has, as heat-generating components, second chips C2, which are designed like the first chips C1 and are fastened directly to a second metallic body K2 without a housing such that first source / drain regions of the transistors of the second chips C2 with the second one Body K2 are electrically connected. The second body K2 is plate-shaped, consists essentially of copper and covers the inner region and inner edges of the heat sink KK (see FIG. 2). The capacitors K are arranged under the second body K2 in the inner region IB (see FIG. 3). Second source / drain regions of the second chips C2 are connected to the first bodies Kl via bond connections B.
Eine metallische Platte P, die im wesentlichen aus Kupfer be- steht, ist durch eine erste isolierende Schicht II elektrisch isoliert auf dem zweiten Körper K2 angeordnet (siehe Figuren 2 und 3) . Die Platte P weist zackenartige Vorsprünge V auf, die zwischen zueinander benachbarten zweiten Chips C2 angeordnet sind. Zweite Source/Drain-Gebiete der Transistoren der ersten Chips Cl sind über Bondverbindungen B mit den Vorsprüngen V der Platte P verbunden.A metallic plate P, which essentially consists of copper, is arranged on the second body K2 in an electrically insulated manner by means of a first insulating layer II (see FIGS. 2 and 3). The plate P has jagged projections V which are arranged between adjacent second chips C2. Second source / drain regions of the transistors of the first chips C1 are connected to the projections V of the plate P via bond connections B.
Der zweite Körper K2 weist über dem inneren Bereich erste Öffnungen 01 und zweite Öffnungen 02 auf. Die Platte P weist über den ersten Öffnungen 01 und den zweiten Öffnungen 02 des zweiten Körpers K2 Öffnungen 0 auf. Die Kondensatoren K sind über erste drahtförmige Verbindungen Bl, die durch die ersten Öffnungen 01 des zweiten Körpers K2 und durch die darüber angeordneten Öffnungen 0 der Platte P hindurch geführt sind, mit der Platte P elektrisch verbunden. Die Kondensatoren K sind über zweite drahtförmige Verbindungen B2 , die durch die zweiten Öffnungen 02 geführt sind, mit dem zweiten Körper K2 elektrisch verbunden. Die Öffnungen 0 der Platte P, die über den 'zweiten Öffnungen des zweiten Körpers K2 angeordnet sind, geben den zweiten drahtförmigen Verbindungen B2 Raum. Die ersten drahtförmigen Verbindungen Bl und die zweiten drahtförmigen Verbindungen B2 bilden Kondensatoranschlüsse der Kondensatoren K.The second body K2 has first openings 01 and second openings 02 above the inner region. The plate P has openings 0 above the first openings 01 and the second openings 02 of the second body K2. The capacitors K are electrically connected to the plate P via first wire-shaped connections B1, which are passed through the first openings 01 of the second body K2 and through the openings 0 of the plate P arranged above them. The capacitors K are electrically connected to the second body K2 via second wire-shaped connections B2, which are led through the second openings 02. The openings 0 of the plate P, which are arranged above the ' second openings of the second body K2, give space to the second wire-shaped connections B2. The first wire-shaped connections B1 and the second wire-shaped connections B2 form capacitor connections of the capacitors K.
Zur Vermeidung von Kurzschlüssen zwischen den ersten drahtförmigen Verbindungen Bl und dem zweiten Körper K2 bzw. zwischen den zweiten drahtförmigen Verbindungen B2 und der Platte P sind die Flächen der Öffnungen 0, der ersten Öffnungen 01 und der zweiten Öffnungen 02 mit zweiten isolierenden Schichten 12 versehen. Über der Platte P ist ein Träger T aus Aluminium angeordnet (siehe Figur 2) . Der Träger T ist ca. 5 mm dick. Die der Platte P zugewandte Fläche des Trägers T weist im Bereich der ersten drahtförmigen Verbindungen Bl Einbuchtungen E auf, um den ersten drahtförmigen Verbindungen Bl Raum zu geben. Die der Platte P abgewandte Fläche des Trägers T ist eben.In order to avoid short circuits between the first wire-shaped connections B1 and the second body K2 or between the second wire-shaped connections B2 and the plate P, the surfaces of the openings 0, the first openings 01 and the second openings 02 are provided with second insulating layers 12. A carrier T made of aluminum is arranged above the plate P (see FIG. 2). The carrier T is approximately 5 mm thick. The surface of the carrier T facing the plate P has indentations E in the region of the first wire-shaped connections B1 in order to give space to the first wire-shaped connections B1. The surface of the carrier T facing away from the plate P is flat.
Das Logikteil LO ist durch eine dritte isolierende Schicht 13 elektrisch isoliert auf der der Platte P abgewandten Fläche des Trägers T angeordnet und über Bondverbindungen B mit dem Leistungsteil LE verbunden.The logic part LO is arranged in an electrically insulated manner on the surface of the carrier T facing away from the plate P by a third insulating layer 13 and is connected to the power part LE via bond connections B.
Die ersten Körper Kl sind mit Ausgangsanschlüssen AA verbunden (siehe Figur 1) . Der zweite Körper K2 ist mit einem Span- nungsanschluss SP verbunden, der mit ca. 36 Volt beaufschlagt ist. Die Platte P ist mit einem Groundanschluss GA verbunden, der mit Null Volt beaufschlagt ist.The first bodies Kl are connected to output connections AA (see FIG. 1). The second body K2 is connected to a voltage connection SP which is supplied with approximately 36 volts. The plate P is connected to a ground connection GA, to which zero volts are applied.
Die Kondenstoren K sind parallel zueinander und zwischen dem Groundanschluß GA und dem Spannungsanschluß SP geschaltet.The capacitor K are connected in parallel to each other and between the ground connection GA and the voltage connection SP.
Die ersten Chips Cl sind parallel und zwischen dem Ausgangsanschluß AA und dem Groundanschluß GA geschaltet. Die zweiten Chips C2 sind parallel und zwischen dem Ausgangsanschluß AA und dem Spannungsanschluß SP geschaltet. Die ersten Chips Cl bilden einen Lowside-Drive. Die zweiten Chips C2 bilden ein en Highside-Drive. Je eine erster Chip Cl und ein zweiter Chip C2 bilden eine Halbbrücke. Die Halbbrücken sind parallel und zwischen dem Groundanschluß GA und dem Spannungsanschluß SP geschaltet. The first chips C1 are connected in parallel and between the output connection AA and the ground connection GA. The second chips C2 are connected in parallel and between the output terminal AA and the voltage terminal SP. The first chips C1 form a lowside drive. The second chips C2 form an en highside drive. A first chip C1 and a second chip C2 each form a half bridge. The half bridges are connected in parallel and between the ground connection GA and the voltage connection SP.

Claims

Patentansprüche claims
1. Schaltungsanordnung1. Circuit arrangement
- mit einem Leistungsteil (LE) , das wärmeerzeugende Bauele- mente und mindestens ein weniger wärmeerzeugendes Bauelement umfasst,- with a power unit (LE), which comprises heat-generating components and at least one less heat-generating component,
- bei der das weniger wärmeerzeugende Bauelement in einem inneren Bereich (IB) der Schaltungsanordnung angeordnet ist,in which the less heat-generating component is arranged in an inner region (IB) of the circuit arrangement,
- bei der die wärmeerzeugenden Bauelemente um den inneren Be- reich (IB) herum angeordnet sind und an mindestens einem als elektrische Leitung wirkenden metallischen Körper (Kl) befestigt sind, mit dem sie elektrisch verbunden sind,in which the heat-generating components are arranged around the inner region (IB) and are fastened to at least one metallic body (Kl) which acts as an electrical line and to which they are electrically connected,
- bei der zur Kühlung der wärmeerzeugenden Bauelemente der Körper (Kl) elektrisch isoliert zumindest im Bereich der wärmeerzeugenden Bauelemente auf einem Kühlkörper (KK) angeordnet ist,in which the body (K1) is arranged in an electrically insulated manner at least in the area of the heat-generating components on a heat sink (KK) for cooling the heat-generating components,
- bei der der Kühlkörper (KK) um den inneren Bereich (IB) umlaufend ausgestaltet ist.- In which the heat sink (KK) is designed to run around the inner region (IB).
2. Schaltungsanordnung nach Anspruch 1,2. Circuit arrangement according to claim 1,
- mit einem Logikteil (LO) , das über dem inneren Bereich (IB) angeordnet ist,with a logic part (LO) which is arranged above the inner region (IB),
- bei der das Logikteil (LO) mit dem Leistungsteil (LE) über Bondverbindungen (B) elektrisch miteinander verbunden ist.- In which the logic part (LO) is electrically connected to the power part (LE) via bond connections (B).
3. Schaltungsanordnung nach Anspruch 2,3. Circuit arrangement according to claim 2,
- mit einer metallischen Platte (P) , die den inneren Bereich (IB) bedeckt und über dem weniger wärmeerzeugenden Bauelement angeordnet ist, - bei der die Platte (P) zumindest eine Öffnung (0) über dem inneren Bereich (IB) aufweist,with a metallic plate (P) which covers the inner region (IB) and is arranged above the less heat-generating component, - in which the plate (P) has at least one opening (0) above the inner region (IB),
- bei der das weniger wärmeerzeugende Bauelement über eine erste drahtförmige Verbindung (Bl) , die durch die Öffnung (0) geführt ist, mit der Platte (P) elektrisch verbunden ist,in which the less heat-generating component is electrically connected to the plate (P) via a first wire-shaped connection (B1) which is guided through the opening (0),
- mit einem Träger (T) , der elektrisch isoliert über dem inneren Bereich (IB) und über der Platte (P) angeordnet ist, - bei der die der Platte (P) zugewandte Fläche des Trägers (T) im Bereich der ersten drahtförmigen Verbindung (Bl) eine Einbuchtung (E) aufweist, um der ersten drahtförmigen Verbindung (Bl) Raum zu geben,with a carrier (T) which is arranged in an electrically insulated manner above the inner region (IB) and above the plate (P), in which the surface of the carrier (T) facing the plate (P) has an indentation (E) in the region of the first wire-shaped connection (Bl) in order to give space to the first wire-shaped connection (Bl),
- bei der die der Platte (P) abgewandte Fläche des Trägers (T) im wesentlichen eben ist,in which the surface of the support (T) facing away from the plate (P) is essentially flat,
- bei der das Logikteil (LO) elektrisch isoliert auf der der Platte (P) abgewandten Fläche des Trägers (T) angeordnet ist.- In which the logic part (LO) is arranged electrically isolated on the surface of the carrier (T) facing away from the plate (P).
4. Schaltungsanordnung nach Anspruch 3,4. Circuit arrangement according to claim 3,
- bei der der Träger (T) im wesentlichen aus Aluminium besteht.- In which the carrier (T) consists essentially of aluminum.
5. Schaltungsanordnung nach einem der Ansprüche 1 bis 4,5. Circuit arrangement according to one of claims 1 to 4,
- mit einer metallischen Platte (P) , die den inneren Bereich- with a metallic plate (P) covering the inner area
(IB) bedeckt und über dem weniger wärmeerzeugenden Bauelement angeordnet ist,(IB) is covered and arranged over the less heat-generating component,
- bei der die Platte (P) zumindest eine Öffnung (0) über dem inneren Bereich (IB) aufweist,- in which the plate (P) has at least one opening (0) above the inner region (IB),
- bei der das weniger wärmeerzeugende Bauelement als Kondensator (K) ausgestaltet ist und über eine erste drahtförmige Verbindung (Bl) , die durch die Öffnung (0) geführt ist, mit der Platte (P) elektrisch verbunden ist, - bei der die wärmeerzeugenden Bauelemente als gehäuselose erste Chips (Cl) und zweite Chips (C2) ausgestaltet sind, die jeweils einen Transistor enthalten, wobei die ersten Chips (Cl) an mindestens einem ersten metallischen Körper (Kl) und die zweiten Chips (C2) an einem zweiten metalli- sehen Körper (K2) befestigt sind,- In which the less heat-generating component is designed as a capacitor (K) and is electrically connected to the plate (P) via a first wire-shaped connection (B1) which is guided through the opening (0), - in which the heat-generating components are designed as package-less first chips (Cl) and second chips (C2), each containing a transistor, the first chips (Cl) on at least one first metallic body (Kl) and the second chips (C2) on a second metallic see body (K2) are attached,
- bei der der erste Körper (Kl) als Schiene ausgestaltet ist, die sich entlang des äußeren Randes des Kühlkörpers (KK) erstreckt,the first body (Kl) is designed as a rail which extends along the outer edge of the heat sink (KK),
- bei der der zweite Körper (K2) als Platte (P) ausgestaltet ist, die den inneren Bereich (IB) und den inneren Rand des- In which the second body (K2) is designed as a plate (P), the inner area (IB) and the inner edge of the
Kühlkörpers (KK) bedeckt, - bei der die Platte (P) elektrisch isoliert auf dem zweiten Körper (K2) angeordnet ist,Heat sink (KK) covered, the plate (P) is arranged on the second body (K2) in an electrically insulated manner,
- bei der der zweite Körper (K2) eine erste Öffnung (01) über dem inneren Bereich (IB) aufweist, die unterhalb der Öff- nung (0) der Platte (P) angeordnet ist und durch die die erste drahtförmige Verbindung (Bl) geführt ist,- in which the second body (K2) has a first opening (01) above the inner region (IB), which is arranged below the opening (0) of the plate (P) and through which the first wire-shaped connection (Bl) is led
- bei der der zweite Körper (K2) mindestens eine zweite Öffnung (02) über dem inneren Bereich (IB) aufweist,- in which the second body (K2) has at least one second opening (02) above the inner region (IB),
- bei der das weniger wärmeerzeugende Bauelement über eine zweite drahtförmige Verbindung (B2) , die durch die zweite- In which the less heat-generating component via a second wire-shaped connection (B2) through the second
Öffnung (02) geführt ist, mit dem zweiten Körper (K2) e- lektrisch verbunden ist,Opening (02) is guided, is electrically connected to the second body (K2),
- bei der die ersten Chips (Cl) über Bondverbindungen (B) mit der Platte (P) elektrisch verbunden sind, - bei der die zweiten Chips (C2) über Bondverbindungen (B) mit dem ersten Körper (Kl) elektrisch verbunden sind.- in which the first chips (Cl) are electrically connected to the plate (P) via bond connections (B), - in which the second chips (C2) are electrically connected to the first body (Kl) via bond connections (B).
6. Schaltungsanordnung nach Anspruch 5,6. Circuit arrangement according to claim 5,
- bei der der erste Körper (Kl), der zweite Körper (K2) und die Platte (P) im wesentlichen aus Kupfer bestehen. - In which the first body (Kl), the second body (K2) and the plate (P) consist essentially of copper.
EP02712790A 2001-02-27 2002-02-20 Circuit arrangement Withdrawn EP1364406A2 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE10109329 2001-02-27
DE10109329A DE10109329C1 (en) 2001-02-27 2001-02-27 Circuit has power stage with heat generating components mounted around component(s) that generates less heat mounted in inner region, conducting metal body mounted on cooling body
PCT/DE2002/000601 WO2002069404A2 (en) 2001-02-27 2002-02-20 Circuit arrangement

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WO2002069404A3 (en) 2003-05-22
US6930373B2 (en) 2005-08-16
WO2002069404A2 (en) 2002-09-06
US20040169268A1 (en) 2004-09-02
DE10109329C1 (en) 2002-05-02

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