EP1346287B1 - Verfahren zur dynamischen speicherzuordnung von speicherblöcken an eine datenstruktur, und entsprechendes eingebettetes system - Google Patents

Verfahren zur dynamischen speicherzuordnung von speicherblöcken an eine datenstruktur, und entsprechendes eingebettetes system Download PDF

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Publication number
EP1346287B1
EP1346287B1 EP01990601A EP01990601A EP1346287B1 EP 1346287 B1 EP1346287 B1 EP 1346287B1 EP 01990601 A EP01990601 A EP 01990601A EP 01990601 A EP01990601 A EP 01990601A EP 1346287 B1 EP1346287 B1 EP 1346287B1
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aforesaid
identification number
memory block
elementary
elementary memory
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French (fr)
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EP1346287A2 (de
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Nicolas Fougeroux
Patrice Hameau
Olivier Landier
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CP8 Technologies SA
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CP8 Technologies SA
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/0223User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023Free address space management
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S707/00Data processing: database and file management or data structures
    • Y10S707/99951File or database maintenance
    • Y10S707/99952Coherency, e.g. same view to multiple users
    • Y10S707/99953Recoverability
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S707/00Data processing: database and file management or data structures
    • Y10S707/99951File or database maintenance
    • Y10S707/99956File allocation

Definitions

  • the invention relates to a method for dynamically allocating memory by elementary memory blocks to a data structure in an on-board computer system, also referred to as an embedded system, and to the corresponding onboard system.
  • Embedded systems, or current portable objects such as microprocessor cards or smart cards, PCMCIA cards and electronic assistants tend to perform more and more complex functions, in particular because of the implementation of computer programs.
  • multiple applications the microprocessor or microcontroller cards being, in such a case, designated by multi-application cards.
  • the applications implemented in this type of object can be very varied, because of the great flexibility of the current high-level languages and their adaptability to the most varied hardware elements by the implementation of virtual machines in particular.
  • applications such as electronic wallet PME, control of physical access, control of access to services, such as pay TV programs or the like.
  • the portable object constituted, for example, by a microprocessor card and referenced 10
  • the portable object conventionally comprises input / output circuits, I / O, referenced 12, information processing resources.
  • referenced 14 constituted by a microcontroller and connected to the input / output circuits 12.
  • a non-volatile memory 18 is provided, which consists of a programmable memory 18a and a ROM-type memory, or memory of Read access type only 18b. These memories are connected to the microcontroller or microprocessor 14.
  • a working memory, RAM memory, referenced 16 is also provided and connected to the microprocessor. The aforementioned links are connected by BUS.
  • the set is managed by an operating system OS, which can be implemented in nonvolatile memory 18.
  • the multi-application portable object may comprise a cryptographic computing unit SI, referenced 20, it - even connected to the microprocessor 14.
  • the microprocessor itself can be replaced or supplemented by logic circuits implanted in a semiconductor chip, these logic circuits can be ASIC type circuits, the English Application Specific Integrated Circuit.
  • EP-A-0 686 918 describes a method for assigning, checking and releasing object which is considered very close to the invention.
  • the object of the present invention is to implement a method of dynamically allocating memory by elementary memory blocks to a data structure, the data structures corresponding either to applications as such or to data system for implementing the operating system, or specific security data, such as encryption / decryption access keys or others.
  • the notion of dynamic allocation covers the allocation and / or deletion of allocated memory.
  • Another object of the present invention is also, in the context of the aforementioned rationalization, access to the very fast knowledge of the membership of each byte stored in the memory zone to the application or data structure to which this byte belongs .
  • Another object of the present invention is also the implementation of a method for dynamically allocating memory by elementary memory blocks to a data structure making it possible to avoid or reduce any phenomenon of crumbling, also referred to as fragmentation, during the process of allocating / erasing the memory.
  • Another object of the present invention is finally the implementation of a method of dynamic allocation of memory by elementary memory blocks, in which the integrity of the memory is ensured by a checking the value of each block of elementary memory allocated.
  • the method of dynamically allocating memory to a data structure identified by an identification number and stored in the form of packets of digital information in the memory zone of an on-board system provides that the memory zone being subdivided into elementary memory blocks, the latter is implemented from at least one erase instruction of an elementary memory block and an allocation instruction of an elementary memory block, by which to this elementary memory block is associated with a reference to this identification number.
  • this method consists in assigning to the reference to the identification number the value of this identification number.
  • To delete an elementary memory block this method consists in assigning to the reference to the identification number an arbitrary value fixed a priori, distinct from any identification number value.
  • a multi-application embedded system comprises an operating system for managing the input / output circuits, the random access memory and the non-volatile memory via a microprocessor.
  • it may include in a non-volatile memory a management table of the memory zone by elementary memory blocks, this table comprising at least, for each block of elementary memory, a reference to an identification number of the structure data base to which the corresponding elementary memory block has been allocated and a memory space value occupied in the corresponding allocated elementary memory block.
  • the method which is the subject of the invention is applicable to the dynamic memory allocation of any embedded computer system, but more particularly to any portable object such as a microprocessor or micro-controller card, in which the memory resources are reduced, in particular because of the size and small size of the latter.
  • the figure 2a represents a functional flowchart of the essential steps for implementing the dynamic memory allocation method that is the subject of the present invention, this functional flowchart corresponding in fact to a state diagram of the aforementioned essential steps.
  • step S corresponds to a start state in which a data structure, constituted by an application, by system data, if necessary keys or specific numerical values, must be stored, c ' that is to say installed in the case of applications, for example in the memory zone of an embedded system whose structure corresponds to that previously described in the description in connection with the figure 1 .
  • each data structure is identified by an identification number noted ID_A j where j can take the values between 1 and n, n indicating the total number of data structures that can be stored or installed in the memory. memory space mentioned above.
  • each block BL 1 can be a power of 2 in order to facilitate the addressing of each memory block and in each memory block thus defined. In one embodiment given by way of non-limiting example, it is indicated that each block may comprise 256 bytes.
  • AAAA an arbitrary numerical value
  • each data structure that is to say, applications, system data, keys or specific numerical values, identified by the identification number ID_A j can be stored in the form of packets of digital information in the memory zone of the aforementioned embedded system.
  • Digital information packets are, on the one hand, digital data packets representative of an object code allowing the installation and execution of an application, for example, system data or keys, or values specific digital data, respectively application data packets generated by one or more applications implanted on the corresponding embedded system, or intermediate digital data allowing management of the set by the operating system to ensure the execution of the various functionalities of the embedded system from the previously mentioned system data, keys or intermediate numerical values.
  • FIG 2a it is indicated that the method of dynamic allocation of memory by memory blocks elementary to a data structure, object of the invention, is implemented from at least one allocation instruction of an elementary memory block BL 1 , assignment operation denoted A by which the aforementioned elementary memory block is associated with a reference to the identification number of the data structure or application considered, and from at least one erase instruction of an elementary memory block, instruction corresponding to the operation E represented on the figure 2a .
  • the allocation operation A for allocating an elementary memory block, consists in assigning the reference to the identification number associated with the elementary memory block. considered the value of ID number ID_A j .
  • the storage areas of the data structures include a simple reference to the identification number of the data structure or corresponding application made in the form of data.
  • the allocation step A according to the subject of the present invention consists in fact of to be assigned as a reference to the identification number of the data structure or application, the value of the aforementioned identification number to each block BL 1 in which the packets of digital object code information or data are stored.
  • the aforementioned one-to-one mapping can be done by associating with each block BL 1 a data field representative of the value of the aforementioned identification number ID_A j in a management table of the dynamic allocation. of the memory zone of the abovementioned embedded system.
  • the erasing step E consists, to erase an elementary memory block, to assign to the reference to the identification number associated with the elementary memory block considered BL 1 an arbitrary value in place of the identification number the data structure or application considered.
  • This arbitrary value is of course the AAAA value previously mentioned in the description. This arbitrary value is distinct from any identification number value assigned to a given data structure.
  • each double arrow representing, of course, the call of the function or of the allocation instruction A, respectively of the function or of the erasure instruction E, the allocation or erasing operations respectively. being conducted as previously described, and the return arrow representing an acknowledgment addressed to the starting state S.
  • the method which is the subject of the present invention, in the embodiment of the figure 2b may correspond to a memory allocation process to data generated by an application for example, or if necessary obtained by loading or downloading application update, the digital information packets, in both cases, can match those of an already installed application or data structure.
  • the allocation operation A may consist, to allocate a given elementary memory block, denoted BL 1 , to the aforementioned digital information packet Q k , and prior to any step consisting in attributing to the reference to the identification number the value of the identification number , to verify, for any previously allocated elementary memory block, the identity of the reference to the identification number and the identification number of the corresponding data structure, in a step A 1 .
  • This identity verification consists in carrying out a test consisting in searching for the first block of memory BL 1 whose associated identification number ID_A j corresponds to the identification number ID_A k of the data structure or application for which the allocation must to be carried out.
  • step A3 On a negative answer to the test A1, consisting of searching for the next block belonging to the application whose identification number is ID_A k , an allocation instruction of a free elementary memory block is called in step A3, no any memory blocks already allocated to the application whose identification number is ID_A k does not have sufficient free space to contain the information packet Q k .
  • the aforementioned allocation instruction of the following elementary block thus makes it possible to allocate an elementary memory block of address a, where a is any offset value, to ⁇ N set of natural numbers.
  • the elementary memory block retained is of course an elementary block to which the arbitrary value AAAA has been previously assigned and therefore corresponds to an erased block, that is to say to a free block and ready for any allocation operation. and storing the corresponding information packet Q k .
  • the positive answer to the test A 1 indicates that the elementary memory block which has just been found is at least partially allocated to the data structure or application for which the allocation must be made.
  • the allocation method then consists in verifying, in a test A 2 , the existence of a sufficient memory space remaining in the current elementary memory block BL 1 (ID_Aj) mentioned above for storing the digital information Q k previously mentioned.
  • the information packet Q k requiring a memory space less than the memory space of the current elementary memory block, to the information packet Q k can be allocated, in a step A 4 , the aforementioned current elementary memory block BL 1 (ID_A j ), the digital information packet Q k being able to be stored in the free memory zone of the aforementioned current elementary memory block.
  • the current block BL (ID_A j0 ) does not have enough free space to hold the information packet Qk, it is necessary to return to step A1 to search for a new block whose identification number is ID_A k and has not yet been analyzed during this allocation.
  • the corresponding allocation method to the object of the present invention may further consist in calculating, in a step A 5 a verification value of the allocated elementary memory block, this operation being designated by calculation CKS on the figure 2b .
  • step A 5 the calculation of the verification value, again designated by check sum in English language, can be carried out by means of calculation means.
  • verification value of conventional type these calculation means may also correspond to the specialized calculation circuit 20 contained in embedded systems of conventional type, as described previously in the description.
  • An error management step A 6 of the conventional type may be provided.
  • a preferred embodiment of the operation of calculating a verification value of the elementary memory blocks is an asynchronous verification mode, as described with the Figure 2c .
  • the dynamic memory allocation method of the present invention may consist, for the implementation of the step A 5 , to select according to a random selection criterion one of the allocated elementary memory blocks.
  • X denotes the content of the elementary memory block BL A called in reading.
  • Step A 53 of calculating a verification value of the allocated allocated elementary memory block.
  • Step A 53 is denoted by "calculation of CKS (X)". This verification value is then compared to a true value stored in the above-mentioned table, according to the check sum verification process previously mentioned in the description.
  • the process for calculating the verification value can be periodically triggered by a step A 54 going back to step A 51 , which resets the generation of a separate random value, then the read call of the corresponding elementary memory block by performing steps A 51 and A 52 .
  • step A 6 may provide for the blocking of the embedded system or the attempt to recover the data if an error correction code is used as a checksum.
  • ID_A J 00h: free block
  • YYYY 00h
  • FFh unreadable system block
  • FEh readable system block
  • FDh specific value or key
  • 01h-FCh elementary memory block belonging to application of application identification number i, with i ⁇ [01h, FCh].
  • LR j can take any value from 01h to FFh, the value 00h further indicating that the current block of elementary memory is fully used, no memory space in the block being available.
  • the method of dynamic allocation of memory by elementary memory blocks object of the present invention also allows to erase any data structure, or application, identified by an identification number in a particularly flexible and efficient manner, in the manner below, as well as represented in figure 3 .
  • the corresponding deletion process may consist, according to claim 3, in collecting all the blocks BL 0 , BL b to BL q whose identification number ID_A e corresponds to the application to be deleted in step E 1 represented in figure 3 , then to assign to the reference to the identification number of the set of elementary memory blocks allocated to the application considered the arbitrary value AAAA previously mentioned in step E 2 of the same figure 3 , at the value 00h above.
  • ID_A k info block address_octet - memory_store_address / 64
  • the preceding relation is obtained taking into account the embodiment described for blocks of 256 bytes per block and 4 bytes of information in block info by current block considered.
  • the implementation of the dynamic memory allocation method according to claim 2 makes it possible to reduce or eliminate the crumbling of the managed memory area, which is still fragmentarily fragmented. Indeed, when creating an object or a type of variable, one looks in the block info list for the first block belonging to the application or the data structure and having a free space sufficient for the creation of this object or type of variable considered. Under these conditions, according to claim 2, a new block is assigned to an application, or to a data structure, only if the remaining space is not sufficient for the object or type of variable to be created in at least one blocks already assigned to this application or this data structure. Thus, there is never any object or type of variable that is distributed over at least two blocks non-consecutive.
  • any deleted block which consequently becomes free, can always be reallocated and reallocated either to data from applications or to object code relating to an application.
  • the risk of crumbling is therefore limited to the loading and frequent erasure of consecutive code blocks.
  • the crumbling phenomenon of the memory zone can also be reduced by a process of reallocation of the elementary memory blocks to the object code packets by translation rearrangement.
  • the verification value can be calculated at each reading for blocks containing data deemed critical, such as, for example, sensitive data of the OS or key values for which the number identification maybe at the value FDh.
  • the period can be set at 50 ms for example.
  • the calculation of the verification value of all the blocks can also be implemented during very specific events of the onboard system, such as the change. state of life of the latter in the field of application of smart cards for example.
  • Applets can be programs written in high-level language of any type.
  • Applet 1 150 bytes of code
  • block 600 bytes of data
  • blocks Applet 2 150 bytes of code 1 block 150 bytes of data
  • block Applet 3 1100 bytes of code
  • 5 blocks 200 bytes of data 1 block Applet 4 400 bytes of code
  • ie 2 blocks 300 bytes of data ie 2 blocks
  • step 1 corresponds to the installation of Applet 1 and Applet 2
  • step 2 to erasure of Applet 1
  • step 3 the installation of Applet 3
  • step 4 install the Applet 4.
  • Table II below gives the value, expressed in hexadecimal notation, of the identification number ID_A k where k takes the values 1 to 4, the value 00 in hexadecimal notation corresponding to the arbitrary value AAAA.
  • This embedded system comprises an operating system managing the input / output circuits of the RAM and non-volatile memory via the aforementioned microprocessor.
  • programmable non-volatile memory 18 a it includes in programmable non-volatile memory 18 a , a management table of the memory zone by elementary memory blocks, this table comprising at least, for each memory block elementary element BL 1 previously described in the description, a reference to an identification number of a data structure to which the corresponding elementary memory block has been allocated, and a memory space value occupied in the corresponding elementary memory block allocated.
  • the reference to the identification number of the data structure is noted ID_A 1 , respectively ID_A 2 and the occupied memory space value is denoted LI 1 respectively LI 2 on the figure 5 .
  • the table may comprise, for each corresponding elementary memory block, a verification value of the allocated elementary block, these values being denoted CKS 1a and CKS 1b , respectively CKS 2a and CKS 2b . It is indicated that in the embodiment of the figure 5 , the verification value is coded on 2 bytes.
  • This low value of the memory area occupied for the implementation of the method that is the subject of the present invention is entirely acceptable taking into account the gain obtained in terms of flexibility of use and installation of various applications, the number of which depends only on the size of the non-volatile memory 18a.

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Claims (9)

  1. Verfahren zur dynamischen Zuordnung eines Speichers zu einer (oder mehreren) Datenstruktur(en) (ID_Aj), die durch eine Identifikationsnummer identifiziert wird (werden) und in Form von digitalen Informationspaketen in einem Speicherbereich eines eingebetteten Systems gespeichert wird (werden), wobei der oben genannte Speicherbereich in Elementarspeicherblöcke (BL1) unterteilt ist und dieses Verfahren zur dynamischen Zuordnung über mindestens einen Löschbefehl (E) für einen Elementarspeicherblock und einen Zuordnungsbefehl (A) für einen Elementarspeicherblock erfolgt, durch den dem besagten Elementarspeicherblock eine Referenz zu der oben genannten Identifikationsnummer zugewiesen wird, wobei das Verfahren aus folgenden Etappen besteht,
    • für die Zuordnung eines Elementarspeicherblocks:
    - Zuweisung des Wertes der besagten Identifikationsnummer zu der besagten Referenz der besagten Identifikationsnummer und
    • für das Löschen eines Elementarspeicherblocks:
    - Zuweisung eines willkürlichen Wertes zu der besagten Referenz der besagten Identifikationsnummer, der sich von allen Werten der Identifikationsnummer unterscheidet.
  2. Verfahren gemäß Anspruch 1, bei dem für die Zuordnung eines Elementarspeicherblocks dieser unter anderem vor der Etappe zur Zuweisung des Werts der besagten Identifikationsnummer zu der besagten Referenz der besagten Identifikationsnummer für jeden zugeordneten Elementarspeicherblock folgende Schritte vorgesehen sind:
    - Überprüfung (A1 der Identität der besagten Referenz für die besagte Identifikationsnummer und von der besagten Identifikationsnummer, wobei der laufende Elementarspeicherblock bei einer positiven Antwort auf diese Identitätsüberprüfung mindestens teilweise dieser Datenstruktur zugeordnet wird,
    - Überprüfung (A2) des Vorhandenseins eines ausreichenden verbleibenden Speicherplatzes im besagten Elementarspeicherblock für das Speichern der besagten digitalen Information und, falls dies nicht der Fall ist, Aufruf eines Zuordnungsbefehls eines nachfolgenden Elementarspeicherblocks.
  3. Verfahren gemäß Anspruch 1 oder 2, bei dem zum Löschen einer durch eine Identifikationsnummer (ID-Ae) identifizierten Datenstruktur der besagten Referenz der besagten Identifikationsnummer aller dieser Datenstruktur zugeordneten Elementarspeicherblöcke der besagte willkürlich Wert (AAAA) zugeordnet wird.
  4. Verfahren gemäß Anspruch 1, bei dem nach der Zuordnung eines Elementarspeicherblocks zu einer Datenstruktur und nach dem Speichern durch Schreiben der besagten digitalen Information in besagten Elementarspeicherblock unter anderem eine Prüfsumme (CKS) des Elementarspeicherblocks berechnet wird.
  5. Verfahren gemäß Anspruch 1, das unabhängig von der Zuordnung eines Elementarspeicherblocks zu einer Datenstruktur unter anderem folgende Schritte enthält:
    - Auswahl (A51) eines der zugeordneten Elementarspeicherblöcke nach einem zufallsbedingten Auswahlkriterium und
    - Berechnung (A53) einer Prüfsumme (CKS (X)) des besagten zugeordneten Elementarspeicherblocks.
  6. Verfahren gemäß Anspruch 5, bei dem die besagte Auswahl und danach die besagte Berechnung eines Überprüfungswertes periodisch mit einem festgelegten Zeitwert ausgelöst werden.
  7. Eingebettetes System, das einen Speicherbereich enthält, der dynamisch einer (oder mehreren) Datenstruktur(en) (ID_Aj) zugeordnet wird, die durch eine Identifikationsnummer in Form von digitalen Informationspaketen identifiziert wird (werden), wobei der besagte Speicherbereich in Elementarspeicherblöcke (BL1) unterteilt wird und jeder Block mit einer Referenz der besagten Identifikationsnummer verbunden ist, wobei die besagte Referenz Folgendes enthält:
    • den Wert der besagten Identifikationsnummer wenn der Elementarspeicherblock zugeordnet wurde,
    • einen zufälligen Wert, der sich von allen Identifikationsnummern unterscheidet, wenn der Elementarspeicherblock gelöscht wurde.
  8. Eingebettetes System gemäß Anspruch 7, dadurch gekennzeichnet, dass es als programmierbaren nicht flüchtigen Speicher (18a) ein Kennzahlensystem des Speicherbereichs für die einzelnen Elementarspeicherblöcke enthält, wobei das besagte System pro Elementarspeicherblock mindestens folgendes enthält:
    - eine Referenz für eine Identifikationsnummer einer Datenstruktur (ID_Ai), der der entsprechende Elementarspeicherblock zugeordnet wurde;
    - einen Wert für den belegten Speicherplatz (LIi) im besagten zugeordneten Elementarspeicherblock.
  9. Eingebettetes System gemäß Anspruch 7, in dem das besagte System unter anderem für jeden Elementarspeicherblock eine Prüfsumme (CKS1a bis CKS2b) des entsprechenden zugeordneten Elementarspeicherblocks enthält.
EP01990601A 2000-12-21 2001-12-20 Verfahren zur dynamischen speicherzuordnung von speicherblöcken an eine datenstruktur, und entsprechendes eingebettetes system Expired - Lifetime EP1346287B1 (de)

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Application Number Priority Date Filing Date Title
FR0016722A FR2818771A1 (fr) 2000-12-21 2000-12-21 Procede d'allocation dynamique de memoire par blocs de memoire elementaires a une structure de donnees, et systeme embarque correspondant
FR0016722 2000-12-21
PCT/FR2001/004126 WO2002050661A2 (fr) 2000-12-21 2001-12-20 Procede d'allocation dynamique de memoire par blocs de memoire elementaires a une structure de donnees, et systeme embarque correspondant

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EP1346287A2 EP1346287A2 (de) 2003-09-24
EP1346287B1 true EP1346287B1 (de) 2009-10-14

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AT (1) ATE445879T1 (de)
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DE (1) DE60140208D1 (de)
ES (1) ES2335863T3 (de)
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Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2818770A1 (fr) * 2000-12-21 2002-06-28 Bull Cp8 Procede de gestion optimisee de l'allocation de memoire d'un systeme embarque et systeme embarque correspondant
US7299384B1 (en) * 2004-08-17 2007-11-20 Symantec Operating Corporation Fixing prematurely freed objects
US7434105B1 (en) * 2005-11-07 2008-10-07 Symantec Operating Corporation Selective self-healing of memory errors using allocation location information
JP4281738B2 (ja) * 2005-12-26 2009-06-17 コニカミノルタビジネステクノロジーズ株式会社 画像形成装置、画像形成方法及びプログラム
SE531837C2 (sv) * 2007-12-05 2009-08-25 Oricane Ab Förfarande och datorprogramprodukt
US8618418B2 (en) * 2009-04-29 2013-12-31 Ppc Broadband, Inc. Multilayer cable jacket
DE102010010851A1 (de) * 2010-03-10 2011-09-15 Giesecke & Devrient Gmbh Ausspähungsschutz bei der Ausführung einer Operationssequenz in einem tragbaren Datenträger

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4816653A (en) * 1986-05-16 1989-03-28 American Telephone And Telegraph Company Security file system for a portable data carrier
US5485595A (en) * 1993-03-26 1996-01-16 Cirrus Logic, Inc. Flash memory mass storage architecture incorporating wear leveling technique without using cam cells
EP0686918A1 (de) * 1994-05-31 1995-12-13 Siemens Nixdorf Informationssysteme AG Verfahren zur Verwaltung von Objekten in Datenverarbeitungsanlagen, insbesondere zur Speicherverwaltung
DE19716015A1 (de) * 1997-04-17 1998-10-29 Ibm Einbringen von Information auf einer Chipkarte
US6480935B1 (en) * 1999-01-15 2002-11-12 Todd Carper Smart card memory management system and method
WO2001016759A1 (en) * 1999-08-31 2001-03-08 Cryptec Systems, Inc. Smart card memory management system and method

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ATE445879T1 (de) 2009-10-15
ES2335863T3 (es) 2010-04-06
WO2002050661A2 (fr) 2002-06-27
US20040215913A1 (en) 2004-10-28
EP1346287A2 (de) 2003-09-24
FR2818771A1 (fr) 2002-06-28
WO2002050661A3 (fr) 2002-08-22
DE60140208D1 (de) 2009-11-26

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