EP1218761A1 - Phase detector - Google Patents

Phase detector

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Publication number
EP1218761A1
EP1218761A1 EP00960920A EP00960920A EP1218761A1 EP 1218761 A1 EP1218761 A1 EP 1218761A1 EP 00960920 A EP00960920 A EP 00960920A EP 00960920 A EP00960920 A EP 00960920A EP 1218761 A1 EP1218761 A1 EP 1218761A1
Authority
EP
European Patent Office
Prior art keywords
diodes
transformer
phase detector
reference signal
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP00960920A
Other languages
German (de)
French (fr)
Inventor
Udo Pursche
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Telent GmbH
Original Assignee
Marconi Communications GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Marconi Communications GmbH filed Critical Marconi Communications GmbH
Publication of EP1218761A1 publication Critical patent/EP1218761A1/en
Withdrawn legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D13/00—Circuits for comparing the phase or frequency of two mutually-independent oscillations
    • H03D13/005—Circuits for comparing the phase or frequency of two mutually-independent oscillations in which one of the oscillations is, or is converted into, a signal having a special waveform, e.g. triangular
    • H03D13/006—Circuits for comparing the phase or frequency of two mutually-independent oscillations in which one of the oscillations is, or is converted into, a signal having a special waveform, e.g. triangular and by sampling this signal by narrow pulses obtained from the second oscillation
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R25/00—Arrangements for measuring phase angle between a voltage and a current or between voltages or currents
    • G01R25/005—Circuits for comparing several input signals and for indicating the result of this comparison, e.g. equal, different, greater, smaller, or for passing one of the input signals as output signal
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/44—Modifications of instruments for temperature compensation

Definitions

  • the present invention relates to a phase detector which has at least two diodes connected in series, to which a reference signal is supplied via a transformer, and which are connected to a decoupling network, via which an input signal is applied to the diode and inserted
  • Output signal is tapped, which corresponds to the phase offset between the input signal and the reference signal.
  • phase detector is known from DE 197 03 889 Cl.
  • an existing circuit asymmetry is eliminated by changing the working resistances connected in series with the diodes accordingly, for which purpose both working resistors are connected to one another via a variable resistor.
  • circuit symmetry can only be set for one temperature.
  • the output signal of the known one Phase detector have a temperature-dependent drift.
  • the invention is therefore based on the object of specifying a phase detector of the type mentioned at the beginning, the circuit symmetry of which is maintained over the largest possible temperature range and therefore a drift of the output signal of the phase detector remains as low as possible when the ambient temperature fluctuates.
  • tunable capacitances and / or tunable inductors are inserted in the feed lines from the diodes to a transformer that feeds a reference signal, and / or the transformer is used to symmetrize the voltages applied to the diodes of the phase detector is provided with a balance with which the voltages at its outputs can be changed.
  • the transformer can be set to have the circuit symmetry unchanged over a wide temperature range.
  • the decoupling network for the input and the output signal consisting of R / C elements, is connected between the two diodes.
  • a load resistor is connected in series with each diode, and both load resistors are connected together at a connection point with a fixed potential - preferably ground.
  • the feeder lines with the tunable capacitors and / or inductors inserted therein are connected between the respective diode and its load resistor.
  • the only figure in the drawing shows a phase detector which generates an output signal U3 which is dependent on the phase offset between a reference signal U1 and an input signal U2.
  • the phase detector has two diodes VI and V2 connected in series, with the same polarity, a load resistor R1, R2 being connected in series with each diode VI, V2. Both load resistors R1 and R2 are connected at a connection point 4, which is at a fixed potential, which is preferably the ground potential.
  • the reference signal Ul is at an input 1 of a
  • Transmitter ÜT the outputs of which are connected to the diodes VI and V2, namely between the respective diode VI and V2 and the associated load resistor R1, R2.
  • the transformer UT serves to distribute the reference signal Ul symmetrically between the two diodes VI and V2.
  • the capacitances C1 and C2 inserted into the leads from the transformer UT to the diodes VI and V2 prevent a direct current short-circuit of the diodes VI and V2 by the transformer UT.
  • An R / C decoupling network consisting of the two capacitors C3 and C4 and the resistor R4, is connected between the two diodes VI and V2. Between the terminal 2 of the capacitor C3, the other end of which is connected between the two diodes VI and V2, and ground the input signal U2 applied.
  • the series connection of the resistor R4 and the capacitance C4 is also present at one end between the two diodes VI and V2 and is connected to ground potential at the other end.
  • the voltage that arises across the capacitance C4, between the connection point 3 and ground, is the output signal U3 that is dependent on the phase offset between the reference signal U1 and the input signal U2.
  • the diodes VI and V2 are turned on by the reference signal Ul, and according to the phase offset between the reference signal Ul and the
  • Input signal U2 capacitance C4 is charged to different levels via resistor R4.
  • the charging voltage of the capacitor C4 can then be tapped as a measure of the phase difference between the reference signal U1 and the input signal U2 as the output signal U3.
  • the capacitance C3 blocks the input signal U2 in the direct current.
  • the circuit can have a certain asymmetry because the voltages UR1, UR2 dropping across the load resistors R1, R2 can be unequally large due to different partial voltages URF1, URF2 at the diodes VI, V2.
  • Different partial voltages URF1 and URF2 at the diodes VI and V2 can arise from deviations in the structure of the diodes, through manufacturing asymmetries in the transformer UT or through component and assembly tolerances.
  • the following equations (1) and (2) show the temperature dependence of the voltage drops UR1 and UR2 across the two load resistors R1 and R2.
  • T is the temperature
  • IS is the diode blocking saturation current
  • q is the elementary charge
  • k is the Boltz constant
  • m is a gradation exponent.
  • circuit symmetry can only succeed for a constant temperature.
  • the circuit symmetry is established in that the partial voltages URF1 and URF2 to be rectified at the diodes VI and V2 are compared to values of the same size, as a result of which both the voltage drops URl and UR2 at the load resistors Rl and R2 and their temperature coefficients are equal become.
  • the said balancing of the circuit over a wide temperature range can be achieved in that the capacitances C1 and C2 in the feed lines between the transformer UT and the diodes VI and V2 can be compared.
  • adjustable inductors L1 and L2 can also be provided in the feed lines.
  • the circuit can also be symmetrized by adjusting the transformer UT, with which the voltages at its outputs can be changed. All three adjustment options, that of the capacitors C1, C2, the inductors L1, L2 and the transformer UT, can be carried out on their own or in combination with one another.
  • a comparison of the transformer UT can be made possible by the fact that it has two secondary windings arranged on a coil carrier and that a penetration depth of a ferrite core penetrating both windings can be adjusted by a thread. Depending on whether the ferrite core is located more in the upper or the lower winding, a greater voltage is induced in the upper or the lower winding, as a result of which different voltages URF1, URF2 arise.
  • the capacitors C1, C2 and the inductors L1, L2 can be compared by using trimmable concentrated components. If the capacities C1, C2 and inductors L1, L2 are realized by means of planar line structures, the adjustment can be carried out by changing the lines by means of a laser or by soldering or bonding additional line sections.

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Networks Using Active Elements (AREA)
  • Measurement Of Current Or Voltage (AREA)
  • Power Conversion In General (AREA)
  • Filters And Equalizers (AREA)

Abstract

The invention relates to a phase detector, comprising at least two diodes (V1, V2), connected in series, to which a reference signal (U1) is supplied via a transformer (UT). In addition, the diodes (V1, V2) are connected to a decoupling network (R4, C3, C4) which is used to supply an input signal (U2) to said diodes (V1, V2) and to pick up an output signal (U3). In order to achieve the least possible drift in the output current of the phase detector during changes in the ambient temperature, predefinable capacitances (C1, C2) and/or inductances (L1, L2) are inserted into the supply lines from the diodes (V1, V2) to the transformer (UT), to achieve the symmetrization of the currents (URF1, URF2) which are applied to the diodes (V1, V2), and/or the transformer (UT) is provided with a balancing function, with which the current at its outputs can be modified.

Description

Phasendetektorphase detector
Stand der TechnikState of the art
Die vorliegende Erfindung betrifft einen Phasendetektor, der mindestens zwei in Reihe geschaltete Dioden aufweist, denen über einen Übertrager ein Referenzsignal zugeführt wird, und welche mit einem Entkopplungsnetzwerk beschaltet sind, über n das ein Eingangssignal an die Diode^ gelegt und einThe present invention relates to a phase detector which has at least two diodes connected in series, to which a reference signal is supplied via a transformer, and which are connected to a decoupling network, via which an input signal is applied to the diode and inserted
Ausgangssignal abgegriffen wird, das der Phasenablage zwischen dem Eingangssignal und dem Referenzsignal entspricht .Output signal is tapped, which corresponds to the phase offset between the input signal and the reference signal.
Ein derartiger Phasendetektor ist aus der DE 197 03 889 Cl bekannt . Bei diesem bekannten Phasendetektor wird eine vorhandene Schaltungsunsymmetrie dadurch beseitigt, daß mit den Dioden in Reihe geschaltete Arbeitswiderstände entsprechend verändert werden, wozu beide Arbeitswiderstände über einen veränderbaren Widerstand miteinander verbunden sind. Mit dieser Maßnahme läßt sich eine Schaltungssymmetrie nur für eine Temperatur einstellen. Soll aber der Phasendetektor in einem größeren Temperaturbereich eingesetzt werden, so wird das Ausgangssignal des bekannten Phasendetektors eine temperaturabhängige Drift aufweisen. Der Erfindung liegt daher die Aufgabe zugrunde, einen Phasendetektor der eingangs genannten Art anzugeben, dessen Schaltungssymmetrie über einen möglichst großen Temperaturbereich erhalten bleibt und deshalb eine Drift des Ausgangssignals des Phasendetektors bei einer Schwankung der Umgebungstemperatur möglichst gering bleibt.Such a phase detector is known from DE 197 03 889 Cl. In this known phase detector, an existing circuit asymmetry is eliminated by changing the working resistances connected in series with the diodes accordingly, for which purpose both working resistors are connected to one another via a variable resistor. With this measure, circuit symmetry can only be set for one temperature. However, if the phase detector is to be used in a larger temperature range, the output signal of the known one Phase detector have a temperature-dependent drift. The invention is therefore based on the object of specifying a phase detector of the type mentioned at the beginning, the circuit symmetry of which is maintained over the largest possible temperature range and therefore a drift of the output signal of the phase detector remains as low as possible when the ambient temperature fluctuates.
Vorteile der ErfindungAdvantages of the invention
Die genannte Aufgabe wird mit den Merkmalen des Anspruchs 1 dadurch gelöst, daß zur Symmetrierung der an den Dioden des Phasendetektors anliegenden Spannungen in den Zuleitungen von den Dioden zu einem ein Referenzsignal zuführenden Übertrager abstimmbare Kapazitäten und/oder abstimmbare Induktivitäten eingefügt sind und/oder der Übertrager mit einem Abgleich versehen ist, mit dem die Spannungen an seinen Ausgängen verändert werden können. Mit abgleichbaren Kapazitäten und/oder Iduktivitäten oder einem abstimmbarenThe stated object is achieved with the features of claim 1 in that tunable capacitances and / or tunable inductors are inserted in the feed lines from the diodes to a transformer that feeds a reference signal, and / or the transformer is used to symmetrize the voltages applied to the diodes of the phase detector is provided with a balance with which the voltages at its outputs can be changed. With matchable capacities and / or inductivities or a tunable one
Übertrager läßt sich eine über einen weiten Temperaturbereich unveränderte Symmetrie der Schaltung einstellen.The transformer can be set to have the circuit symmetry unchanged over a wide temperature range.
Vorteilhafte Weiterbildungen der Erfindung gehen aus den Unteransprüchen hervor.Advantageous developments of the invention emerge from the subclaims.
Danach ist das Entkopplungsnetzwerk für das Eingangs- und das Ausgangssignal, bestehend aus R/C-Gliedern, zwischen den beiden Dioden angeschlossen.Then the decoupling network for the input and the output signal, consisting of R / C elements, is connected between the two diodes.
Zu jeder Diode ist ein Arbeitswiderstand in Reihe geschaltet, und beide Arbeitswiderstände sind an einem Anschlußpunkt mit festem Potential - vorzugsweise Masse - zusammengeschaltet. Die Zuleitungen des Übertragers mit den darin eingefügten abstimmbaren Kapazitäten und/oder Induktivitäten sind zwischen der jeweiligen Diode und ihrem Arbeitswiderstand angeschlossen.A load resistor is connected in series with each diode, and both load resistors are connected together at a connection point with a fixed potential - preferably ground. The feeder lines with the tunable capacitors and / or inductors inserted therein are connected between the respective diode and its load resistor.
Beschreibung eines AusführungsbeispielsDescription of an embodiment
Die einzige Figur der Zeichnung zeigt einen Phasendetektor, der eine in Abhängigkeit von der Phasenablage zwischen einem Referenzsignal Ul und einem Eingangssignal U2 abhängiges Ausgangssignal U3 erzeugt.The only figure in the drawing shows a phase detector which generates an output signal U3 which is dependent on the phase offset between a reference signal U1 and an input signal U2.
Der Phasendetektor besitzt zwei in Reihe geschaltete, gleichgepolte Dioden VI und V2 , wobei mit jeder Diode VI, V2 ein Arbeitswiderstand Rl, R2 in Reihe geschaltet ist. Beide Arbeitswiderstände Rl und R2 sind an einem Anschlußpunkt 4 zusammengeschlossen, der auf einem festen Potential liegt, das vorzugsweise das Massepotential ist .The phase detector has two diodes VI and V2 connected in series, with the same polarity, a load resistor R1, R2 being connected in series with each diode VI, V2. Both load resistors R1 and R2 are connected at a connection point 4, which is at a fixed potential, which is preferably the ground potential.
Das Referenzsignal Ul liegt an einem Eingang 1 einesThe reference signal Ul is at an input 1 of a
Übertragers ÜT an, dessen Ausgänge mit den Dioden VI und V2 verbunden sind und zwar zwischen der jeweiligen Diode VI und V2 und dem zugehörigen Arbeitswiderstand Rl, R2. Der Übertrager ÜT dient dazu, daß Referenzsignal Ul symmetrisch auf die beiden Dioden VI und V2 aufzuteilen. Die in die Zuleitungen vom Übertrager ÜT zu den Dioden VI und V2 eingefügten Kapazitäten Cl und C2 verhindern einen gleichstrommäßigen Kurzschluß der Dioden VI und V2 durch den Übertrager ÜT.Transmitter ÜT, the outputs of which are connected to the diodes VI and V2, namely between the respective diode VI and V2 and the associated load resistor R1, R2. The transformer UT serves to distribute the reference signal Ul symmetrically between the two diodes VI and V2. The capacitances C1 and C2 inserted into the leads from the transformer UT to the diodes VI and V2 prevent a direct current short-circuit of the diodes VI and V2 by the transformer UT.
Zwischen den beiden Dioden VI und V2 ist ein R/C- Entkopplungsnetzwerk geschaltet, bestehend aus den beiden Kapazitäten C3 und C4 und dem Widerstand R4. Zwischen dem Anschluß 2 der Kapazität C3 , deren anderes Ende zwischen den beiden Dioden VI und V2 angeschlossen ist, und Masse wird das Eingangssignal U2 angelegt. Die Reihenschaltung aus dem Widerstand R4 und der Kapazität C4 liegt mit einem Ende ebenfalls zwischen den beiden Dioden VI und V2 an und ist mit dem anderen Ende an Massepotential gelegt. Die über der Kapazität C4 , zwischen dem Anschlußpunkt 3 und Masse, entstehende Spannung ist das von der Phasenablage zwischen dem Referenzsignal Ul und dem Eingangssignal U2 abhängige Ausgangssignal U3. Die Dioden VI und V2 werden durch das Referenzsignal Ul leitend geschaltet, und entsprechend der Phasenablage zwischen dem Referenzsignal Ul und demAn R / C decoupling network, consisting of the two capacitors C3 and C4 and the resistor R4, is connected between the two diodes VI and V2. Between the terminal 2 of the capacitor C3, the other end of which is connected between the two diodes VI and V2, and ground the input signal U2 applied. The series connection of the resistor R4 and the capacitance C4 is also present at one end between the two diodes VI and V2 and is connected to ground potential at the other end. The voltage that arises across the capacitance C4, between the connection point 3 and ground, is the output signal U3 that is dependent on the phase offset between the reference signal U1 and the input signal U2. The diodes VI and V2 are turned on by the reference signal Ul, and according to the phase offset between the reference signal Ul and the
Eingangssignal U2 wird die Kapazität C4 über den Widerstand R4 unterschiedlich hoch aufgeladen. Die Ladespannung der Kapazität C4 kann dann als Maß für die Phasendifferenz zwischen dem Referenzsignal Ul und dem Eingangssignal U2 als Ausgangssignal U3 abgegriffen werden. Die Kapazität C3 blockt das Eingangssignal U2 gleichstrommäßig ab.Input signal U2, capacitance C4 is charged to different levels via resistor R4. The charging voltage of the capacitor C4 can then be tapped as a measure of the phase difference between the reference signal U1 and the input signal U2 as the output signal U3. The capacitance C3 blocks the input signal U2 in the direct current.
Damit das Ausgangssignal U3 unverfälscht die Phasendifferenz zwischen dem Referenzsignal Ul und dem Eingangssignal U2 wiedergibt, müssen Maßnahmen ergriffen werden, um eine SchaltungsSymmetrie zu erhalten. Ohne solche speziellen Maßnahmen kann die Schaltung nämlich eine gewisse Unsymmetrie aufweisen, weil die an den Arbeitswiderständen Rl, R2 abfallenden Spannungen UR1, UR2 aufgrund unterschiedlicher TeilSpannungen URF1, URF2 an den Dioden VI, V2 ungleich groß sein können. Unterschiedliche TeilSpannungen URF1 und URF2 an den Dioden VI und V2 können durch Abweichungen im Aufbau der Dioden, durch Fertigungsunsymmetrieen im Übertrager ÜT oder durch Bauelement- und Montagetoleranzen entstehen. Die nachfolgenden Gleichungen (1) und (2) geben die Temperaturabhängigkeit der Spannungsabfälle UR1 und UR2 an den beiden Arbeitswiderstanden Rl und R2 wieder. In order for the output signal U3 to reproduce the phase difference between the reference signal U1 and the input signal U2 in an unadulterated manner, measures must be taken to obtain circuit symmetry. Without such special measures, the circuit can have a certain asymmetry because the voltages UR1, UR2 dropping across the load resistors R1, R2 can be unequally large due to different partial voltages URF1, URF2 at the diodes VI, V2. Different partial voltages URF1 and URF2 at the diodes VI and V2 can arise from deviations in the structure of the diodes, through manufacturing asymmetries in the transformer UT or through component and assembly tolerances. The following equations (1) and (2) show the temperature dependence of the voltage drops UR1 and UR2 across the two load resistors R1 and R2.
In den Gleichungen (1) und (2) ist mit T die Temperatur, mit IS der Dioden-Sperrsättigungsstro , mit q die Elementarladung, mit k die Boltz annkonstante und mit m ein Gradationsexponent bezeichnet. Wie die Gleichungen (1) und (2) zeigen, sind die Temperaturkoeffizienten der beiden an den Arbeitswiderständen Rl und R2 abfallenden Spannungen URl und UR2 von den unterschiedlich hohen gleichzurichtenden TeilSpannungen URF1 und URF2 der Dioden VI und V2 abhängig und ungleich. Wenn man, wie es bei dem eingangs beschriebenen bekannten Phasendetektor geschieht, einen Symmetrieabgleich allein durch Verändern derIn equations (1) and (2), T is the temperature, IS is the diode blocking saturation current, q is the elementary charge, k is the Boltz constant, and m is a gradation exponent. As equations (1) and (2) show, the temperature coefficients of the two voltages UR1 and UR2 dropping across the load resistors Rl and R2 are dependent and unequal from the different voltages URF1 and URF2 to be rectified of the diodes VI and V2. If, as is the case with the known phase detector described at the outset, a symmetry adjustment only by changing the
Arbeitswiderstände durchführt, kann eine Schaltungssymmetrie nur für eine konstante Temperatur gelingen. Mit den nachfolgend beschriebenen Maßnahmen wird die Schaltungssymmetrie dadurch hergestellt, daß die gleichzurichtenden TeilSpannungen URF1 und URF2 an den Dioden VI und V2 auf gleich große Werte abgeglichen werden, wodurch sowohl die Spannungsabfälle URl und UR2 an den Arbeitswiderständen Rl und R2 als auch deren Temperaturkoeffizienten gleich groß werden.Carrying out resistances, a circuit symmetry can only succeed for a constant temperature. With the measures described below, the circuit symmetry is established in that the partial voltages URF1 and URF2 to be rectified at the diodes VI and V2 are compared to values of the same size, as a result of which both the voltage drops URl and UR2 at the load resistors Rl and R2 and their temperature coefficients are equal become.
Die besagte Symmetrierung der Schaltung über einen weiten Temperaturbereich läßt sich dadurch realisieren, daß die Kapazitäten Cl und C2 in den Zuleitungen zwischen dem Übertrager ÜT und den Dioden VI und V2 abgleichbar sind. Zusätzlich zu den abgleichbaren Kapazitäten Cl und C2 oder an deren Stelle können in den Zuleitungen auch noch abgleichbare Induktivitäten Ll und L2 vorgesehen werden. Eine Symmetrierung der Schaltung kann auch durch einen Abgleich des Übertragers ÜT vorgenommen werden, womit die Spannungen an seinen Ausgängen verändert werden können. Alle drei Abgleichmöglichkeiten, die der Kapazitäten Cl, C2, der Induktivitäten Ll , L2 und des Übertragers ÜT können für sich alleine oder in Kombination miteinander durchgeführt werden.The said balancing of the circuit over a wide temperature range can be achieved in that the capacitances C1 and C2 in the feed lines between the transformer UT and the diodes VI and V2 can be compared. In addition to the adjustable capacitors C1 and C2 or in their place, adjustable inductors L1 and L2 can also be provided in the feed lines. The circuit can also be symmetrized by adjusting the transformer UT, with which the voltages at its outputs can be changed. All three adjustment options, that of the capacitors C1, C2, the inductors L1, L2 and the transformer UT, can be carried out on their own or in combination with one another.
Ein Abgleich des Übertragers ÜT kann dadurch ermöglicht werden, daß er zwei auf einem Spulenträger angeordnete Sekundär-Wicklungen aufweist und ein beide Wicklungen durchdringender Ferritkern in seiner Eindringtiefe durch ein Gewinde verstellbar ist. Je nachdem, ob sich der Ferritkern mehr in der oberen oder der unteren Wicklung befindet, wird in der oberen oder der unteren Wicklung eine größere Spannung induziert, wodurch unterschiedlich große Spannungen URF1, URF2 entstehen.A comparison of the transformer UT can be made possible by the fact that it has two secondary windings arranged on a coil carrier and that a penetration depth of a ferrite core penetrating both windings can be adjusted by a thread. Depending on whether the ferrite core is located more in the upper or the lower winding, a greater voltage is induced in the upper or the lower winding, as a result of which different voltages URF1, URF2 arise.
Der Abgleich der Kapazitäten Cl, C2 und der Induktivitäten Ll, L2 kann dadurch realisiert werden, daß trimmbare konzentrierte Bauelemente verwendet werden. Werden die Kapazitäten Cl, C2 und Induktivitäten Ll, L2 mittels planarer Leitungsstrukturen realisiert, so kann der Abgleich durch Verändern der Leitungen mittels Laser oder Zulöten bzw. Anbonden von zusätzlichen Leitungsabschnitten erfolgen. The capacitors C1, C2 and the inductors L1, L2 can be compared by using trimmable concentrated components. If the capacities C1, C2 and inductors L1, L2 are realized by means of planar line structures, the adjustment can be carried out by changing the lines by means of a laser or by soldering or bonding additional line sections.

Claims

Ansprüche Expectations
1. Phasendetektor, der mindestens zwei in Reihe geschaltete Dioden (VI, V2 ) aufweist, denen über einen Übertrager (ÜT) ein Referenzsignal (Ul) zugeführt wird, und welche mit einem Entkopplungsnetzwerk (R4, C3 , C4) beschaltet sind, über das ein Eingangssignal (U2) an die Dioden (VI, V2) gelegt und ein Ausgangssignal (U3) abgegriffen wird, das der Phasenlage zwischen dem Eingangssignal (U2) und dem Referenzsignal (Ul) entspricht, dadurch gekennzeichnet, daß zur Symmetrierung der an den Dioden (VI, V2) anliegenden Spannungen (URF1, URF2) in den Zuleitungen von den Dioden (VI, V2) zu dem Übertrager (ÜT) abstimmbare Kapazitäten (Cl, C2 ) und/oder abstimmbare Induktivitäten (Ll, L2) eingefügt sind und/oder der Übertrager (ÜT) mit einem Abgleich versehen ist, mit dem die Spannungen an seinen Ausgängen verändert werden können.1. Phase detector, which has at least two diodes (VI, V2) connected in series, to which a reference signal (Ul) is fed via a transformer (ÜT), and which are connected to a decoupling network (R4, C3, C4) via which an input signal (U2) is applied to the diodes (VI, V2) and an output signal (U3) is tapped which corresponds to the phase position between the input signal (U2) and the reference signal (U1), characterized in that for the balancing of the diodes (VI, V2) applied voltages (URF1, URF2) in the feed lines from the diodes (VI, V2) to the transformer (ÜT) tunable capacitances (Cl, C2) and / or tunable inductors (Ll, L2) are inserted and / or the transformer (ÜT) is provided with an adjustment with which the voltages at its outputs can be changed.
2. Phasendetektor nach Anspruch 1, dadurch gekennzeichnet, daß das Entkopplungsnetzwerk für das Eingangs- (U2) und das Ausgangssignal (U3) , bestehend aus R/C-Gliedern (R4, C3 , C4) , zwischen den beiden Dioden (VI, V2) angeschlossen ist.2. Phase detector according to claim 1, characterized in that the decoupling network for the input (U2) and the output signal (U3), consisting of R / C elements (R4, C3, C4), between the two diodes (VI, V2 ) connected.
3. Phasendetektor nach Anspruch 1, dadurch gekennzeichnet, daß zu jeder Diode (VI, V2) ein Arbeitswiderstand (Rl, R2) in Reihe geschaltet ist und beide Arbeitswiderstände (Rl, R2) an einem Anschlußpunkt (4) mit festem Potential - vorzugsweise Masse - zusammengeschaltet sind und daß die Zuleitungen des Übertragers (ÜT) mit den darin eingefügten abstimmbaren Kapazitäten (Cl, C2) und/oder Induktivitäten (Ll, L2) zwischen der jeweiligen Diode (VI, V2 ) und ihrem Arbeitswiderstand (Rl, R2) angeschlossen sind. 3. phase detector according to claim 1, characterized in that for each diode (VI, V2) a load resistor (Rl, R2) is connected in series and both load resistors (Rl, R2) at a connection point (4) with a fixed potential - preferably ground - are interconnected and that the feed lines of the transformer (ÜT) with the tunable capacitances (Cl, C2) and / or inductances (Ll, L2) inserted therein between the respective diode (VI, V2) and their load resistance (Rl, R2 ) are connected.
EP00960920A 1999-09-14 2000-09-14 Phase detector Withdrawn EP1218761A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE19943956 1999-09-14
DE1999143956 DE19943956C1 (en) 1999-09-14 1999-09-14 Phase detector uses at least 2 series diodes for comparing phase of input signal with reference signal with tuned capacitors and/or inductances for providing circuit symmetry
PCT/IB2000/001378 WO2001020350A1 (en) 1999-09-14 2000-09-14 Phase detector

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EP1218761A1 true EP1218761A1 (en) 2002-07-03

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AU (1) AU7307300A (en)
DE (1) DE19943956C1 (en)
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WO (1) WO2001020350A1 (en)

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US6962201B2 (en) 2003-02-25 2005-11-08 Halliburton Energy Services, Inc. Cement compositions with improved mechanical properties and methods of cementing in subterranean formations
DE102006024210A1 (en) 2006-05-23 2007-11-29 Deutsches Elektronen-Synchrotron Desy Self-tuning drift-free radio-frequency phase detector circuit
CN102969763B (en) * 2012-11-09 2016-08-03 长兴鑫瑞复合材料有限公司 A kind of water-cooled storage battery charging rack column

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DE1946640A1 (en) * 1968-09-19 1970-10-29 Tavkoezlesi Ki Broadband phase discriminator with great steepness
US3922679A (en) * 1974-08-06 1975-11-25 Us Army Wide band radio-frequency phase sensor
GB2055265A (en) * 1979-07-25 1981-02-25 Philips Electronic Associated Comparison circuits
US4810904A (en) * 1985-07-17 1989-03-07 Hughes Aircraft Company Sample-and-hold phase detector circuit
DE19703889C1 (en) * 1997-02-03 1998-02-19 Bosch Gmbh Robert Scanning phase detector device

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CN1390306A (en) 2003-01-08
CN1222778C (en) 2005-10-12
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DE19943956C1 (en) 2001-02-08
AU7307300A (en) 2001-04-17
NO20021287L (en) 2002-05-14
WO2001020350A1 (en) 2001-03-22

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