EP1203507A2 - Hearing aid including an integrated circuit - Google Patents
Hearing aid including an integrated circuitInfo
- Publication number
- EP1203507A2 EP1203507A2 EP00943693A EP00943693A EP1203507A2 EP 1203507 A2 EP1203507 A2 EP 1203507A2 EP 00943693 A EP00943693 A EP 00943693A EP 00943693 A EP00943693 A EP 00943693A EP 1203507 A2 EP1203507 A2 EP 1203507A2
- Authority
- EP
- European Patent Office
- Prior art keywords
- integrated circuit
- hearing aid
- layer
- semiconductor layer
- outer circumference
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; ELECTRIC HEARING AIDS; PUBLIC ADDRESS SYSTEMS
- H04R25/00—Electric hearing aids
- H04R25/60—Mounting or interconnection of hearing aid parts, e.g. inside tips, housings or to ossicles
- H04R25/609—Mounting or interconnection of hearing aid parts, e.g. inside tips, housings or to ossicles of circuitry
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; ELECTRIC HEARING AIDS; PUBLIC ADDRESS SYSTEMS
- H04R25/00—Electric hearing aids
- H04R25/50—Customised settings for obtaining desired overall acoustical characteristics
- H04R25/505—Customised settings for obtaining desired overall acoustical characteristics using digital signal processing
Definitions
- Hearing aid including an integrated circuit
- Integrated circuits are used in numerous electronic devices for the controlling of various elements of these.
- One example of such a device is a hearing aid.
- the invention is especially relevant in connection with hearing aids, due to the desired and often required small size of these.
- the small size requirement is especially pronounced in connection with the so- called ITE or CIC hearing aids, which are mounted partly or entirely in the ear canal of the hearing aid user.
- the integrated circuits typically perform the signal processing and the amplification in the hearing aids.
- US 4783815 discloses the manufacturing of miniature hearing aids having a multi-layer circuit arrangement.
- This prior art publication describes a multi-layer pcb having plated through holes.
- the pcb may be arranged in several layers.
- the pcb may comprise one or more IC's arranged on and connected to the pcb.
- EP 0820099 discloses a packaged semiconductor device and a method of manufacturing this device.
- the document describes a board being electrically and mechanically connected to an IC by means of laser cut holes in the IC and the board.
- chip scale packaging in various versions.
- a chip scale packaging is defined as a package, which has a size less than 1,2 times the size of the chip.
- CSP's are typically made with solder balls distributed in an area array over the active side of the IC.
- the CSP is soldered to a circuit board with the active side of the IC facing the circuit board.
- the CSP Due to the requirement for the above mentioned connection sites for either discrete component mounting or external connection to the remaining electrical system the CSP has to have a certain size in order to make this mounting possible.
- an objective of the present invention is to provide a hearing aid, which with an identical physical size makes it possible to provide an increase in functionality, and which is less cumbersome to handle in a manufacturing process, or which by reduced size of the integrated circuit can be handled with essentially the same production tolerances as it is the case by the prior art.
- an objective is to provide an integrated circuit for a hearing aid, which with the same outer dimensions can make it possible to provide an increased functionality, and which is easier to handle in a manufacturing process, or which by reduced size of the integrated circuit can be handled with essentially the same production tolerances as it is the case by the prior art.
- the objectives of the hearing aid aspect is achieved by a hearing aid as defined in claim 1 and claim 8.
- the dimensions of the integrated circuit circumference are maintained allowing a possibility of increasing the circuitry area, this again allowing the providing of an increased functionality to the hearing aid at maintained the size of the hearing aid.
- Due to the placement of solder balls on a rear side of the circuit more space is available for these, meaning that the handling of such circuitry in a manufacturing process in widely facilitated.
- By reduced size a considerable area is still left on both sides of the integrated circuit for being provided with solder balls.
- the mounting of the integrated circuit on a base plate having a larger circumference in order hereby to provide a sufficiently large area for solder balls is no longer necessary, as a sufficient area is available on the two sides of the integrated circuit.
- the substrate which is normally provided, has been omitted in this invention. Omitting the substrate leads to a thinner integrated circuit, and hence facilitates the manufacturing of smaller and cosmetically attractive hearing aids.
- a coating may be provided on the second side without hereby differing from the definition of facing the interior surface of the housing.
- a redistribution layer is provided on at least one side of the integrated circuit, preferably on both sides of the integrated circuit, in order hereby to establish connection sites in distance from the through electrical connections.
- the total surface area of both sides of the integrated circuit may be made available for connection sites in the form of solder balls.
- discrete electrical components are mounted on one side of this by means of solder balls in connection with the through electrical connections.
- connection pad is provided on one side of the integrated circuit.
- connection pad is provided on one side and discrete electrical components on the other side.
- an EEPROM component is mounted on one side and solder balls are provided on the other side.
- Further possibilities comprise the mounting of a micro-mechanical device or a second integrated circuit on one side of the integrated circuit. According to the invention the objectives of the integrated circuit manufacturing aspect is achieved by an integrated circuit as defined in claims 10, 11 and 12.
- the semiconductor layer comprising electric circuitry this is the raw semi-conducting material, e.g. silicon, which has been subjected to a process where the semi-conducting elements of the electric circuit have been manufactured in one of the surfaces of the semi-conducting material layer.
- the further elements which most are often present, e.g. metal layers for establishing electrical contacts to the semi-conducting elements and the insulation layers between the respective metal layers, are not described in this connection as they are implicitly comprised by the definition of an integrated circuit as this is normally interpreted.
- FIG. 1 is a schematic view of the electronics of a typical prior art hearing aid seen from one side;
- FIG. 2 is a schematic view showing the electronics of FIG. 1 from the opposite side;
- FIG. 3 is a schematic view showing an integrated circuit according to the invention.
- FIG. 4 is a schematic drawing showing cross section through a hearing aid according to the invention with an integrated circuit according to the invention
- the electronics of a typical prior art hearing aid comprises a microphone 1, an amplifier 2 and a receiver 3,
- the system is powered by a battery4.
- the elements of the system are typically connected like shown in Fig. 1 and 2, i.e. the amplifier is mounted on a PCB 5 , the side edges of which extends beyond the edges of the amplifier circuit 2.
- the amplifier circuit is here a usual construction.
- the placing of external components, e.g. capacitors 6, requires a rather large surface area, which appears from FIG. 1.
- the integrated circuit comprises a semiconductor layer and superimposed on this a number of metal layers. At the sides and at a small distance from the edge via's 11 are provided for establishing an electrical connection to the rear side of the semiconductor 2. After establishing the electrical connection to the rear side the mounting of a separate capacitor 6 and a separate integrated circuit 13 is realized on a redistribution layer 12 on this side. The solder balls 7,8,9,10 are provided on the one side of the semiconductor layer.
- a via is an electrical conducting path, which connects electric circuitry on one side of a structure with electric circuitry on the other side of the structure.
- a via consists of a hole through the structure, an insulation that isolates a conductor from the structure and an electrical conductor inside the insulation.
- the integrated circuits in this patent are made from silicon wafers.
- the holes through the silicon wafer can be of any shape and size.
- a technical desirable hole would be squares of size 50 - 150 micron.
- the holes can be made by wet anisotropic KOH etching or by for example isotropic etching using hydrofluoric acid and nitric acid.
- the holes can also be made by dry etching, for example reactive ion etching process, or by laser microchemical etching.
- the inside surface of the hole is covered by an insulating layer.
- the insulation can be organic or inorganic.
- An organic insulation can for example be a thin layer of polyimide or BCB.
- An inorganic insulation can for example be a Silicon Oxide, Silicon Nitride or glass passivation layer.
- the conductor through the structure is made by a metallization of the insulating surface.
- the metallization of the hole can be made by electroplating, sputtering or by laser deposition of various metals.
- An alternative to making holes through the structure is to change the doping of the silicon locally from both sides thus making an insulated semi-conducting path through the structure. These electrical connections are often designated diffusion plugs.
- the redistribution layers are made by a process, which allows arbitrary structures in the metal layer and where openings can be made in the insulation layers. Different types of process can be used including electroplating, spin-coating, etching, sputtering etc..
- a typical process is to spincoat the surface of the wafer with polyimide. Etch holes in the polyimide over the bond-pads of the IC and over the via's. Then metal layers are electro-plated connecting the via's with the bond-pads and the solder pads. Then a second layer of polyimide is spincoated over the wafer, and holes are etched over the solder pads. Solder is then electroplated for the solder pads and reflowed to form solderballs or pads for wires or components.
- the integrated circuits are made on the silicon wafer.
- the passive components are mounted on the solder pads on one side of the wafer.
- the other side of the wafer is used for solder pads for wires.
- the amplifiers are singulated.
- the passive components are mounted on solder pads on one side of the wafer, the other side is used for solder balls for attach to a printed circuit board.
- WL version The largest integrated circuit is made on a silicon wafer.
- the smaller IC/IC's are mounted on pads on one side of the wafer together with passives, the other side of the wafer is used for solder pads for wires.
- CSP version As above but with solder balls for attach to a printed circuit board.
- the hearing aid appears schematically in a sectional view.
- the hearing aid comprises a housing 14, which holds a microphone 1, in connection with the microphone an integrated circuit 2 including an amplifier and a signal processor for the hearing aid and in connection with the integrated circuit 2 a receiver 3 for outputting an amplified and processed signal.
- a battery 4 connected to the amplifier powers the system.
- the integrated circuit comprises connection sites on both sides as described in connection with FIG. 3. No base plate is present. This means that the active area of the chip in relation to the available space in the hearing aid housing may be larger than an integrated circuit as normally used, this meaning that more functionality may be added to the integrated circuit, using the same production technology and having the same available space within the hearing aid housing. This provides for a hearing aid having improved properties and therefore is more beneficial for the hearing aid user.
- the manufacturing of the hearing aid has been facilitated as more space has been made available for the soldering process and other assembling processes performed during the manufacturing.
Landscapes
- Health & Medical Sciences (AREA)
- General Health & Medical Sciences (AREA)
- Neurosurgery (AREA)
- Otolaryngology (AREA)
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Acoustics & Sound (AREA)
- Signal Processing (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
Claims
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DKPA199901078 | 1999-07-28 | ||
| DK107899 | 1999-07-28 | ||
| PCT/DK2000/000378 WO2001010167A2 (en) | 1999-07-28 | 2000-07-07 | Hearing aid including an integrated circuit and an integrated circuit in a hearing aid |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| EP1203507A2 true EP1203507A2 (en) | 2002-05-08 |
Family
ID=8100755
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| EP00943693A Withdrawn EP1203507A2 (en) | 1999-07-28 | 2000-07-07 | Hearing aid including an integrated circuit |
Country Status (3)
| Country | Link |
|---|---|
| EP (1) | EP1203507A2 (en) |
| AU (1) | AU5806200A (en) |
| WO (1) | WO2001010167A2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8369553B2 (en) | 2008-12-19 | 2013-02-05 | Starkey Laboratories, Inc. | Hearing assistance device with stacked die |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE3134888A1 (en) * | 1981-09-03 | 1983-03-10 | Robert Bosch Gmbh, 7000 Stuttgart | "HOERGERAET" |
| US5156998A (en) * | 1991-09-30 | 1992-10-20 | Hughes Aircraft Company | Bonding of integrated circuit chip to carrier using gold/tin eutectic alloy and refractory metal barrier layer to block migration of tin through via holes |
| JPH1027866A (en) * | 1996-07-11 | 1998-01-27 | Hitachi Ltd | Semiconductor integrated circuit device and method of manufacturing the same |
-
2000
- 2000-07-07 EP EP00943693A patent/EP1203507A2/en not_active Withdrawn
- 2000-07-07 WO PCT/DK2000/000378 patent/WO2001010167A2/en not_active Ceased
- 2000-07-07 AU AU58062/00A patent/AU5806200A/en not_active Abandoned
Non-Patent Citations (2)
| Title |
|---|
| None * |
| See also references of WO0110167A3 * |
Also Published As
| Publication number | Publication date |
|---|---|
| AU5806200A (en) | 2001-02-19 |
| WO2001010167A3 (en) | 2001-08-09 |
| WO2001010167A2 (en) | 2001-02-08 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
Free format text: ORIGINAL CODE: 0009012 |
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| 17P | Request for examination filed |
Effective date: 20020228 |
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| AK | Designated contracting states |
Kind code of ref document: A2 Designated state(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LI LU MC NL PT SE |
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| RAP1 | Party data changed (applicant data changed or rights of an application transferred) |
Owner name: OTICON A/S |
|
| 17Q | First examination report despatched |
Effective date: 20090415 |
|
| RIC1 | Information provided on ipc code assigned before grant |
Ipc: H01L 23/50 19740701AFI20180315BHEP Ipc: H04R 25/00 19680901ALI20180315BHEP |
|
| GRAP | Despatch of communication of intention to grant a patent |
Free format text: ORIGINAL CODE: EPIDOSNIGR1 |
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| INTG | Intention to grant announced |
Effective date: 20180515 |
|
| RIC1 | Information provided on ipc code assigned before grant |
Ipc: H04R 25/00 20060101ALI20180315BHEP Ipc: H01L 23/50 20060101AFI20180315BHEP |
|
| STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: THE APPLICATION IS DEEMED TO BE WITHDRAWN |
|
| 18D | Application deemed to be withdrawn |
Effective date: 20180926 |