EP1130508A3 - Pseudo-random number generator, radio transmitter and radio receiver - Google Patents
Pseudo-random number generator, radio transmitter and radio receiver Download PDFInfo
- Publication number
- EP1130508A3 EP1130508A3 EP00125065A EP00125065A EP1130508A3 EP 1130508 A3 EP1130508 A3 EP 1130508A3 EP 00125065 A EP00125065 A EP 00125065A EP 00125065 A EP00125065 A EP 00125065A EP 1130508 A3 EP1130508 A3 EP 1130508A3
- Authority
- EP
- European Patent Office
- Prior art keywords
- pseudo
- random
- registers
- words
- radio
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/58—Random or pseudo-random number generators
- G06F7/582—Pseudo-random number generators
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/06—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
- H04L9/065—Encryption by serially and continuously modifying data stream elements, e.g. stream cipher systems, RC4, SEAL or A5/3
- H04L9/0656—Pseudorandom key sequence combined element-for-element with data sequence, e.g. one-time-pad [OTP] or Vernam's cipher
- H04L9/0662—Pseudorandom key sequence combined element-for-element with data sequence, e.g. one-time-pad [OTP] or Vernam's cipher with particular pseudorandom sequence generator
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
- H04L2209/12—Details relating to cryptographic hardware or logic circuitry
- H04L2209/125—Parallelization or pipelining, e.g. for accelerating processing of cryptographic operations
Abstract
Es wird ein Pseudozufallsgenerator zum Erzeugen von Pseudozufallsworten bzw. ein Rundfunksender bzw. ein Rundfunkempfänger vorgeschlagen, der dazu dient, gleichzeitig mehrere Pseudozufallsworte zu erzeugen bzw. verschlüsselte Daten zu versenden bzw. verschlüsselte Daten zu empfangen. Der Pseudozufallsgenerator umfaßt mehrere Register, wobei mindestens ein Register zurückgekoppelt ist. Weiterhin umfaßt weist der Pseudozufallsgenerator arithmetisch-logische Einheiten auf, mit denen die Pseudozufallsworte berechnet werden. Durch die gleichzeitige Berechnung von Pseudozufallsworten können gleichzeitig mehrere Daten verschlüsselt werden. Die arithmetisch-logische Einheit weist zwei Volladdiererketten auf, deren Ausgänge an einen Multiplexer angeschlossen sind. Die rückgekoppelten Register sind mit gepufferten Eingängen verbunden, die rückgekoppelte Signale aufweisen, wobei die Signale nur in die Register weitergeschoben werden, wenn die Register leer sind.It becomes a pseudo-random generator for generating Pseudo-random words or a broadcaster or a Radio receiver, which serves to simultaneously generate several pseudo-random words or encrypted data or encrypted data to recieve. The pseudo-random generator includes several Register, wherein at least one register is fed back. Furthermore, the pseudo-random generator comprises arithmetic-logical units with which the Pseudo random words are calculated. By the simultaneous Calculation of pseudo-random words can be done simultaneously several data are encrypted. The arithmetic-logical Unit has two full adder chains whose Outputs are connected to a multiplexer. The Feedback registers are with buffered inputs connected, the feedback signals, wherein the Signals only be pushed into the registers when the Registers are empty.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19963962 | 1999-12-31 | ||
DE1999163962 DE19963962C1 (en) | 1999-12-31 | 1999-12-31 | Pseudo-random generator for radio transmitter or receiver uses registers coupled to arithmetic-logic unit providing pseudo-random words and processor controlling pseudo-random generator sequence |
Publications (2)
Publication Number | Publication Date |
---|---|
EP1130508A2 EP1130508A2 (en) | 2001-09-05 |
EP1130508A3 true EP1130508A3 (en) | 2005-12-07 |
Family
ID=7935116
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP00125065A Ceased EP1130508A3 (en) | 1999-12-31 | 2000-11-17 | Pseudo-random number generator, radio transmitter and radio receiver |
Country Status (3)
Country | Link |
---|---|
EP (1) | EP1130508A3 (en) |
JP (1) | JP2001256040A (en) |
DE (1) | DE19963962C1 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6571181B1 (en) | 1999-08-11 | 2003-05-27 | Broadcom Corporation | System and method for detecting a device requiring power |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0490618A1 (en) * | 1990-12-10 | 1992-06-17 | Sony Corporation | Scrambling/descrambling circuit |
US5148386A (en) * | 1989-06-06 | 1992-09-15 | Kabushiki Kaisha Toshiba | Adder-subtracter for signed absolute values |
US5218559A (en) * | 1991-01-16 | 1993-06-08 | France Telecom Etablissement Autonome De Droit Public (Centre National D'etudes Des Telecommunications) | Pseudo-random generator |
US5222230A (en) * | 1988-01-29 | 1993-06-22 | Texas Instruments Incorporated | Circuitry for transferring data from a data bus and temporary register into a plurality of input registers on clock edges |
US5867409A (en) * | 1995-03-09 | 1999-02-02 | Kabushiki Kaisha Toshiba | Linear feedback shift register |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE6941618U (en) * | 1969-10-24 | 1970-02-05 | Kaefer Isoliertechnik | DEVICE FOR LEVELING THE UNEVEN SURFACE OF INSULATION |
DE3888421T2 (en) * | 1987-07-31 | 1994-08-04 | Advantest Corp | Device for generating a pseudo-random pattern. |
-
1999
- 1999-12-31 DE DE1999163962 patent/DE19963962C1/en not_active Expired - Fee Related
-
2000
- 2000-11-17 EP EP00125065A patent/EP1130508A3/en not_active Ceased
-
2001
- 2001-01-04 JP JP2001000258A patent/JP2001256040A/en active Pending
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5222230A (en) * | 1988-01-29 | 1993-06-22 | Texas Instruments Incorporated | Circuitry for transferring data from a data bus and temporary register into a plurality of input registers on clock edges |
US5148386A (en) * | 1989-06-06 | 1992-09-15 | Kabushiki Kaisha Toshiba | Adder-subtracter for signed absolute values |
EP0490618A1 (en) * | 1990-12-10 | 1992-06-17 | Sony Corporation | Scrambling/descrambling circuit |
US5218559A (en) * | 1991-01-16 | 1993-06-08 | France Telecom Etablissement Autonome De Droit Public (Centre National D'etudes Des Telecommunications) | Pseudo-random generator |
US5867409A (en) * | 1995-03-09 | 1999-02-02 | Kabushiki Kaisha Toshiba | Linear feedback shift register |
Non-Patent Citations (1)
Title |
---|
KIM S C ET AL: "MULTIBIT-PARALLEL SCRAMBLING TECHNIQUES FOR DISTRIBUTED SAMPLE SCRAMBLING", IEICE TRANSACTIONS ON COMMUNICATIONS, INSTITUTE OF ELECTRONICS INFORMATION AND COMM. ENG. TOKYO, JP, vol. E78-B, no. 7, 1 July 1995 (1995-07-01), pages 1056 - 1064, XP000532489, ISSN: 0916-8516 * |
Also Published As
Publication number | Publication date |
---|---|
DE19963962C1 (en) | 2001-03-22 |
JP2001256040A (en) | 2001-09-21 |
EP1130508A2 (en) | 2001-09-05 |
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Legal Events
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17P | Request for examination filed |
Effective date: 20060607 |
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AKX | Designation fees paid |
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17Q | First examination report despatched |
Effective date: 20060925 |
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17Q | First examination report despatched |
Effective date: 20060925 |
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STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: THE APPLICATION HAS BEEN REFUSED |
|
18R | Application refused |
Effective date: 20080429 |