EP1122709B1 - Method of displaying analog signals generated in a graphic processor - Google Patents

Abstract

The analogue output of the graphics processor (1) is fed to a display (3) via an analog to digital converter (2) to convert the pixel data into digital format . A clock signal generator (4) provides a clock signal input for the converter and an input circuit (9) provides a means of controlling the image position. A protection circuit (19) generates a warning signal for a prohibited image move.

Description

The invention relates to a device for displaying in a Graphics processor generated graphics signals on a digital display.

The technical fields of personal computers and television receivers are growing always further together. So were already personal computers proposed that are equipped with a tuner card to a PC user the reception and playback of received television programs allow. Furthermore, so-called internet boxes are already known, which one Provided television receiver or in such a television receiver be integrated to give television viewers access to the Internet to enable.

Furthermore, television receivers are already known, in which the reproduced images can be shown on a plasma display. Such television receivers are named by the applicant Planatron offered on the market.

In a representation of those generated in a graphics processor Graphic signals on a plasma display there is a need Adaptation of the image position and image size of the graphic signals to the Plasma display as it is the one generated by a graphics processor Signals are not standard television signals, but rather Image signals, the image position relative to the existing synchronous signals can be different and their image size normalized from the size TV pictures may differ.

Document EP 07 07 305 A shows a device in which the image position can be adjusted manually. The features of the preamble of claim 1 are known from this document.

Based on this prior art, the object of the invention based on showing a way as generated in a graphics processor analog graphic signals can be displayed on a digital display, without synchronization errors.

This object is achieved by a device with the in claim 1 specified features solved. Advantageous configurations and Further developments of the invention result from the dependent claims.

The advantages of the invention are in particular that the user the representation of graphics signals generated in a graphics processor a digital display using the input unit for operating commands Positioning the image on the display can be entered, ensuring is that there is no impermissibly wide image shift. Such impermissible Image shifts would result in image synchronization and thus Disrupt image playback.

The claimed output of a warning signal is particularly then advantageous if the microcomputer evaluating the operating commands only two bit wide control signals for changing the setpoint of a counter outputs and in the case of transmission errors to the meter no exact Has knowledge of the setpoint. With such a transmission of only The two-bit control signals for changing the setpoint are the number of Output pins of the microcomputer are advantageously reduced.

Further advantageous properties of the invention result from the Explanation of an embodiment with reference to the figure. This shows a Block diagram of a device according to the invention.

Those generated in a graphics processor 1 of a personal computer Graphic signals, which are in analog form, are to be shown on a display 3, in particular a digital display, which it is preferably around a plasma display or an LCD or a CRT unit is. For this purpose, those derived from the graphics processor 1 Graphic signals converted into digital signals in an analog-digital converter 2, which are forwarded to the digital display 3.

To generate the clock signal CK of the analog-digital converter 2 is a Clock signal generator 4 is provided, which is formed by a PLL. This PLL has a phase comparator 5, the output signal of which Clock signal CK for the analog-digital converter 2 is. The output signal of the Phase comparator 5 is also fed to an actual value counter 6.

Its output signal is in a first comparator 7 with a setpoint compared, which is provided by a first setpoint counter 12. The output signal of the comparator 7 is an input of the Phase comparator 5 supplied to the PLL, at whose other input 8 in the Graphics processor 1 generated horizontal synchronizing signals of the graphics signal issue.

Consequently, the clock signal CK for the analog-to-digital converter 2 by a Phase comparison between that generated in the graphics processor Horizontal synchronizing signal and that provided by the first comparator 7 Horizontal synchronous signal determined, the latter of the total number of Corresponds to sampling pulses for each horizontal interval.

The output signal of the actual value counter 6 continues to be a second Comparator 15 and a third comparator 16 supplied, the Output signals are passed to a superimposition circuit 17, the provides a blanking pulse at its output 18. Whose The beginning of the output signal of the second comparator 15 and the end of which is determined by the output signal of the third comparator 16.

In the second comparator 15, a comparison is made between the actual value counter 6 the actual value signal provided by a second setpoint counter 13 delivered setpoint. By changing this second setpoint, the Starting time of the blanking pulse can be changed and thus the beginning of the image within the line ..

In the third comparator 16, a comparison is made between the actual value counter 6 provided actual value signal with a third setpoint counter 14 delivered setpoint. By changing this third setpoint, the End time of the blanking pulse can be changed and thus the end of Image within the line.

By changing the setpoints for setpoint counters 12, 13 and 14 can the image positioning of that derived from the graphics processor 1 Graphic signal can be changed on the digital display 3. A change of the setpoint provided by the setpoint counter 12 changes the clock signal CK for the analog-digital converter 2 and thus the horizontal image width of the graphic signal to be displayed on the display 3. A change of the Setpoint counter 13 provided setpoint changes the beginning of Blanking impulse and thus the beginning of the image display within a Row. A change in the setpoint provided by the setpoint counter 14 changes the end of the blanking impulse and thus the end of the Image display within a line.

A change in each of these setpoints can be made by the user who Display 3 shown image viewed by means of the control unit 9 of the Display 3 having television set can be made. This Control unit has either plus / minus keys or cursor control keys, those in a setting mode of the television for image positioning, i.e. for setting the image size and position of the displayed image, can be used.

The operating commands entered by means of the operating unit 9 are transferred to one Microcomputer 10 supplied and from this in two bits wide control signals implemented, which is only the instruction for the respective setpoint counter included, the respective setpoint by one count up or down change. These control signals are from the microcomputer 10 via a Data bus 11 fed to the respective setpoint counter. To a bigger one Change of a setpoint by repeated or longer pressing a button of the control unit 9 can be initiated by the Microcomputer 10 over the data bus 11 successively several two bits wide Transfer control signals to the affected setpoint counter.

The setpoint counter 12 and the setpoint counter 14 are for example, by an 11-bit counter, in the case of the setpoint counter 13 by an 8-bit counter. Since according to the invention from the microcomputer 10 to the respective counter only Control signals two bits wide are transmitted on the microcomputer only two output pins are required to transmit the control signals.

To ensure that even when there is transmission interference no unacceptably wide image shifts occur on the data bus 11 can, the device shown in the figure has a protective circuit 19 Output of a warning signal at output 22. This warning signal will Microcomputer 10 fed by ignoring operator commands or a suitable influence on the setpoints of the setpoint counters for remedial action provides.

The protection circuit 19 assigns a first flip-flop 20 and one in series this arranged second flip-flop 21, at the output of which. Warning signal is present if an impermissibly wide image shift is detected. For this purpose, the protective circuit (19) has a one-bit output. the Input of the first flip-flop 20 becomes the output signal of the third Comparator 16 supplied, which defines the end of the blanking pulse. This occurs at the Q output of the first flip-flop 20 and thus also at Input of the second flip-flop 21 delayed by one clock period. the The enable input of the second flip-flop 21 is that derived from the PLL Output signal of the first comparator 7 supplied. As long as that Output signal of the comparator 16 by at least one clock period before Output signal of the first comparator 7 occurs, the warning signal on Output 22 not generated. When the output signal of the comparator 16 within one cycle with the output signal of the first comparator 7 occurs, said warning signal is generated so that the microcomputer 10th by suitably influencing the setpoint of the setpoint counter 14 this means that the blanking pulse generated at output 18 is in good time the occurrence of the output signal of the first comparator 7 has ended, which defines the beginning of the next line interval.

After all, the advantages of the invention are in particular that by issuing a warning signal to the limits of a permissible Image shift is pointed out. This warning signal can be used for this will automatically counteract another image shift. This prevents an image shift into the area of a subsequent sync pulse occurs, causing synchronization problems or image interference could be caused. The output of a Warning signal when there are impermissibly large image shifts allows Setpoints for the existing setpoint counters are only two bits wide Change control signals. This requires the control signals generating microcomputer only two output pins for the above Control signals.

Claims (11)

1. Device for displaying an analog graphics signal, generated in a graphics processor (1) on a display (3), comprising an analog/digital converter (2) for converting analog pixel data of the graphics signals into digital pixel data, a clock-signal generator (4) for providing a clock signal (CK) for the analog/digital converter (2), an input unit (9) for inputting operating commands that influence the image positioning on the display (3), characterized by a protective circuit (19) for emitting a warning signal that signals the existence of an impermissible image positioning.
2. Device according to Claim 1, characterized in that the display (3) is a digital or analog display unit.
3. Device according to Claim 2, characterized in that the display (3) is a plasma display or an LCD or a CRT unit.
4. Device according to any one of the preceding claims, characterized in that the input unit (9) has a remote controller and/or the device has a microcomputer (10) that is connected to the input unit (9) and that decodes the operating commands inputted by means of the input unit and emits control signals that influence the image positioning on the display and/or the control signals are two-bits wide and/or the control signals correspond to an incremental or a decremental command and/or the protective circuit (19) has a one-bit-wide output.
5. Device according to any one of the preceding claims, characterized in that it has a first setpoint counter (12), the control signals are routed to the first setpoint counter and the first setpoint counter makes available a first setpoint signal on the output side.
6. Device according to any one of the preceding claims, characterized in that the clock-signal generator (4) is a PLL that has a phase comparator (5), an actual-value counter (6) and a first comparator (7) whose input is connected to the output of the actual-value counter (6) and the output of the first setpoint counter (12), and whose output is connected to an input of the phase comparator (5) and/or the first setpoint signal determines the image width of the image to be displayed on the display.
7. Device according to any one of the preceding claims, characterized in that it has a second setpoint counter (13) whose input is connected to the microcomputer (10) and whose output emits a second setpoint signal that influences the start of the blanking pulse.
8. Device according to Claim 7, characterized in that the second setpoint signal is fed to a second comparator (15) to which the output signal of the actual-value counter (6) is furthermore supplied, wherein the output of the second comparator (15) is connected to an input of a superimposing circuit (17) at whose output the blanking pulse can be tapped off and/or the device has a third setpoint counter (14) whose input is connected to the microcomputer (10) and whose output emits a third setpoint signal that influences the end of the blanking pulse.
9. Device according to Claim 8, characterized in that the third setpoint signal is routed to a third comparator (16) to which the output signal of the actual-value counter (6) is supplied, wherein the output of the third comparator (16) is connected to a further input of the superimposing circuit (17) at whose output the blanking pulse can be tapped off.
10. Device according to Claim 6, characterized in that a signal indicating the end of the blanking pulse and the output signal, derived from the PLL, of the first comparator (7) are fed to the protective circuit (19) and/or the protective circuit has a first flip-flop (20) to whose input the signal indicating the end of the blanking pulse is routed and a second flip-flop (21) provided in series with the first flip-flop (20), wherein the output signal, derived from the PLL (4) of the first comparator (7), is furthermore fed to the second flip-flop (21).
11. Device according to Claim 4, characterized in that the output of the protective circuit (19) is connected to the microcomputer (10) and the microcomputer ignores, as a response to the emission of the warning signal, operating commands causing a further image shift and/or the input unit (9) has cursor-control keys or plus/minus keys for inputting the operating commands influencing the image position.

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