EP1110353A4 - Marquage de debit explicite pour controle de flux dans des reseaux atm - Google Patents

Marquage de debit explicite pour controle de flux dans des reseaux atm

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Publication number
EP1110353A4
EP1110353A4 EP99924274A EP99924274A EP1110353A4 EP 1110353 A4 EP1110353 A4 EP 1110353A4 EP 99924274 A EP99924274 A EP 99924274A EP 99924274 A EP99924274 A EP 99924274A EP 1110353 A4 EP1110353 A4 EP 1110353A4
Authority
EP
European Patent Office
Prior art keywords
value
virtual
explicit rate
explicit
bandwidth
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP99924274A
Other languages
German (de)
English (en)
Other versions
EP1110353A1 (fr
Inventor
Tao Yang
Ping Wang
Wengang Zhai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ascend Communications Inc
Original Assignee
Ascend Communications Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ascend Communications Inc filed Critical Ascend Communications Inc
Publication of EP1110353A1 publication Critical patent/EP1110353A1/fr
Publication of EP1110353A4 publication Critical patent/EP1110353A4/fr
Withdrawn legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00—Traffic control in data switching networks
    • H04L47/10—Flow control; Congestion control
    • H04L47/26—Flow control; Congestion control using explicit feedback to the source, e.g. choke packets
    • H04L47/263—Rate modification at the source after receiving feedback
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/30—Peripheral units, e.g. input or output ports
    • H04L49/3081—ATM peripheral units, e.g. policing, insertion or extraction
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
    • H04Q11/0428—Integrated services digital network, i.e. systems for transmission of different types of digitised signals, e.g. speech, data, telecentral, television signals
    • H04Q11/0478—Provisions for broadband connections
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5629—Admission control
    • H04L2012/5631—Resource management and allocation
    • H04L2012/5632—Bandwidth allocation
    • H04L2012/5635—Backpressure, e.g. for ABR
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5629—Admission control
    • H04L2012/5631—Resource management and allocation
    • H04L2012/5636—Monitoring or policing, e.g. compliance with allocated rate, corrective actions
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5678—Traffic aspects, e.g. arbitration, load balancing, smoothing, buffer management
    • H04L2012/5681—Buffer or queue management
    • H04L2012/5682—Threshold; Watermark

Definitions

  • the invention relates generally to the field of digital communications systems and more particularly to digital networks for facilitating communication of digital data in, for example, digital image, audio and video distribution systems and among digital computer systems.
  • the invention is more particularly directed to a digital network in which message transfer paths may be provided with various classes of transfer service, including an unregulated available bit rate service and provides a mechanism for allowing the network to control the rate at which devices transmit messages over the network based on congestion along the path between source devices and destination devices.
  • Digital networks have been developed to facilitate the transfer of information, including data and programs, among digital computer systems and other digital devices.
  • a variety of types of networks have been developed and implemented using diverse information transfer methodologies.
  • ATM Asynchronous Transfer Mode
  • communications are handled through a mesh of switching nodes.
  • the computer systems and other devices are connected to various ones of the switching nodes to, as information sources, provide information for transfer over the network and/or, as destinations, receive information from the network, with the information being transferred over paths, termed “virtual paths" and “virtual circuits,” established through switching nodes comprising the network.
  • the virtual circuits through an ATM network can be assigned to various types of service classes, which serve to govern the rate at which information, in the form of "cells," is transferred thereover.
  • service classes virtual circuits are guaranteed maximum rates at which information can be transferred thereover.
  • Other service classes provide "available bit rate” (“ABR") services, for which virtual circuits are each guaranteed a minimum information transfer rate, referred to as a “minimum cell rate” (“MCR”) and can also make use of the bandwidth which has not been assigned to the virtual circuits which have the guaranteed maximum rates.
  • ABR available bit rate
  • MCR minimum cell rate
  • the rate at which the sources can transmit may vary based on a number of factors, including, but not limited to, congestion conditions at the destination as well as congestion conditions at each switching node along the respective path from the source to the destination.
  • the source periodically transmits a "resource management" ("RM") cell over the virtual circuit, the RM cell including the MCR assigned to the virtual circuit.
  • RM resource management
  • the destination can include an explicit rate value in the backward RM cell which indicates the maximum rate at which the source can trnsmit information.
  • Each switching node along the path can also determine the maximum rate at which it can allow the source to transmit information and, if that rate is lower than the explicit rate contained in the backward RM cell, it can substitute its rate as the explicit rate value in the backward RM cell.
  • the explicit rate contained therein will be the minimum value generated by the destination and all of the switching nodes along the path defined by the virtual circuit.
  • the invention provides a new and improved system and method, referred to herein as a virtual bandwidth explicit rate marking system, for performing explicit rate marking of resource management (RM) cells in an ATM network.
  • a virtual bandwidth explicit rate marking system for performing explicit rate marking of resource management (RM) cells in an ATM network.
  • the invention provides an explicit rate marking system for use in connection with a switching node to generate an explicit rate value for use in a resource management cell associated with a virtual circuit in an ATM network.
  • the explicit rate marking system comprises a virtual bandwidth value generator module and an explicit rate value generator module.
  • the virtual bandwidth value generator module generate a virtual bandwidth value reflecting an available bandwidth capacity value, an explicit rate value associated with each bottlenecked virtual circuit for which the switching node forms part of a path, and a minimum cell rate value associated with each unbottlenecked virtual circuit for which the switching node forms part of a path.
  • the explicit rate value generator module generates the explicit rate value in relation to the virtual bandwidth value and the minimum cell rate value associated with the virtual circuit and other virtual circuits for which the switching node forms part of a path.
  • FIG. 1 schematically depicts an ATM network including a system for performing explicit rate marking for flow control in ATM networks using a virtual bandwidth-based methodology, constructed in accordance with the invention
  • FIG. 2 schematically illustrates the structure of message packets and constituent message cells transferred over the network depicted in FIG. 1 ;
  • FIG. 3 schematically depicts a switching node, constructed in accordance with the invention, which is used in the computer network depicted in FIG. 1 ;
  • FIG. 4 is a flow chart depicting general operations performed by an explicit rate marking system constructed in accordance with the invention.
  • FIGS. 5 and 6 are flow charts depicting details of operations performed by the explicit rate marking system.
  • FIG. 1 schematically depicts an illustrative ATM network 10 including a system for performing explicit rate marking for flow control in ATM networks using a virtual bandwidth-based methodology, constructed in accordance with the invention.
  • network 10 includes a plurality of switching nodes 11(1) through 11(5) (generally identified by reference numeral 1 l(n)) for transferring signals representing data among a number of devices 12(1) through 12(10) (generally identified by reference numeral 12(m)).
  • the devices 12(m) may comprise any of a number of types of devices, including, for example, digital computer systems, other networks, customer premises equipment, and the like.
  • certain devices 12(m s ) may, as a source device, need to transfer data to another, destination, device 12(m D ) (subscript “D” referencing “destination”), which may need to use the transferred information in its operations.
  • Each device 12(m) is connected over a communication link, generally identified by reference numeral 13(j), to a switching node l l(n) to facilitate transmission of data thereto or the reception of data therefrom.
  • the switching nodes 11 (n) are interconnected by communication links, also generally identified by reference numeral 13(j) to facilitate the transfer of data thereamong.
  • the communication links 13(j) may utilize any convenient data transmission medium; in one embodiment, the transmission medium of each communication link 13(j) is selected to comprise one or more fiber optic links.
  • Each communication link 13(j) is preferably bidirectional, allowing the switching nodes 11 (n) to transmit and receive signals among each other and with devices 12(m) connected thereto over the same link; in the embodiment in which the communication links 13(j) are fiber optic links, two optical fibers will be provided for each communication link 13(j), each of which facilitates unidirectional transfer of optical signals.
  • the network 10 transfers data using the well-known "ATM" (“Asynchronous Transfer Mode”) transfer methodology. That methodology is described in detail in C. Partridge, Gigabit Networking, (Reading MA: Addison Wesley Publishing Company, 1994), primarily in chapters 3 and 4, and D. McDysan, et al., ATM Theory And Application (McGraw Hill, 1995) and will not be described in detail.
  • ATM Asynchronous Transfer Mode
  • the devices 12(m) and the switching nodes 1 l(n) transmit data in the form of fixed- length "cells."
  • the source device 12(m s ) allocates the data packet 20 to a plurality of "cells," identified CELL(l) through CELL(I) (generally identified "CELL(i)"), for transmission serially over the communication link 13(j) to initiate transfer thereof over the network 10.
  • Each cell includes a header portion HEADER(i) and a data portion DATA(i), with the header portion HEADER(i) including circuit" information which controls the transfer of the cell through the network 10, and the data portion DATA(i) containing data from the packet 20.
  • the data portion DATA(i) of each cell is of fixed, predetermined length (in one embodiment forty-eight bytes) and so the source device 12(m s ) will pad the data in the last data portion DATA(i) if the amount of data in the packet 20 is not an integral multiple of the size of the data portion DATA(i) of each cell to ensure that the last data portion DATA(i) has the required length.
  • the source device 12(m s ) transmits the series of cells CELL(l) through CELL(i) generated from a data packet 20 in order, and the network 10 is to deliver the cells to the destination device 12(m D ) in the order in which they are transmitted.
  • the destination device 12(m D ) must receive all of the cells transmitted by the source device 12(m s ) in order to reconstruct the packet 20.
  • the cells do not contain ordering information; and so the destination device 12(m D ) determines the proper order to reconstitute the packet 20 from the order in which it receives the cells.
  • the last cell CELL(i) includes a set end of packet flag, designated EOP in FIG. 2, to indicate that it is the last cell for the packet.
  • header portion HEADER(i) includes "virtual circuit" information which controls the transfer of the cell over the network 10.
  • Each switching node ll(n) uses the virtual circuit information for a cell CELL(j) that it receives over an input communication link to identify an output communication link over which it is to transmit the cell to the next switching node or the destination device 12(m D ).
  • the virtual circuit information in the headers HEADER(i) of the cells CELL(i) associated with a packet 20 will be the same, but it will differ for cells associated with different packets.
  • a destination device 12(m D ) will be receiving cells generated for a specific packet 20 in the order of the data in the packet, it may be contemporaneously receiving cells from the network 10 which originated at several source devices 12(m s ), which cells may be received in an interleaved manner.
  • the virtual circuit information in each cell CELL(i) will enable the destination device 12(m D ) to determine the packet 20 with which the cell is associated.
  • the network 10 For virtual circuits over which cells are transferred using the ATM's ABR (available bit rate) service, in addition to cells, such as those described above in connection with FIG.2, for transferring data, the network 10 also transfers resource management ("RM") cells which carry flow control information used by the respective source devices 12(mS) to regulate the rate at which they transmit cells over each virtual circuit.
  • RM resource management
  • the device 12(mS) For each virtual circuit for which a device 12(m) is the source device 12(mS), the device 12(mS) periodically transmits an RM cell thereover to the virtual circuit's destination device 12(mD). When the destination device 12(mD) receives the RM cell, it transmits it (that is, the RM cell) back to the source device 12(mS) over the virtual circuit in a reverse direction.
  • the RM cell when traversing the path from the source device 12(mS) to the destination device 12(mD), is referred to as a "forward" RM (“FRM”) cell, and, when traversing the path from the destination device 12(mD) to the source device 12(mS), is referred to as a "backward” RM (“BRM”) cell.
  • FRM forward RM
  • BRM backward RM
  • the destination device 12(mD) and each switching node 1 l(n) along the path of the virtual circuit from the destination device 12(mD) to the source device 12(mS) can provide flow control information in the BRM cell.
  • the flow control information provided by the destination device 12(mD) or a switching node 11 (n) may, for example, be reflective of the degree of congestion at the respective destination device 12(mD) or switching node 1 l(n), or the like.
  • the flow control information serves to limit the rate at which the source device 12(mS) will transmit cells, above a minimum cell rate ("MCR") which has been assigned to the virtual circuit, and which the source device 12(mS) includes in the FRM cell when it (that is, the source device 12(mS)) transmits the FRM cell.
  • MCR minimum cell rate
  • a switching node 1 l(n) when a switching node 1 l(n) receives an BRM cell for a virtual circuit, it can generate flow control information and determine whether the flow control information indicates a lower cell transmission rate than indicated in the received BRM cell. If not, the switching node 11 (n) will transmit the BRM cell with the same flow control information as received. On the other hand, if the switching node l l(n) determines that the flow control information which it generates does indicate a lower cell transmission rate than indicated in the received BRM cell, it will substitute the flow control information which it generated for the received flow control information in the BRM cell before transmitting the BRM cell.
  • the flow control information will reflect the minimum of the flow control information as among the destination device 12(mD) and the switching nodes 1 l(n) which received the BRM cell, which, in turn, is the minimum for the virtual circuit.
  • the invention provides an explicit rate marking system for generating an explicit rate marking system used by the switching nodes 11 (n) to generate the flow control information for inclusion in the BRM cells.
  • each switching node 1 l(n) includes an input interface 30, a buffer 32, and an output interface 34, all under control of a control element 35.
  • the input interface 30 and output interface 34 will be connected to all of the communication links 13(p) to which the switching node 1 l(n) is connected to facilitate reception of signals from, and transmission of signals to, others of the switching nodes in the network 10 or ones of the devices 12(m) to which the switching node 1 l(n) is connected.
  • the input interface 30 is connected to particular ones of the communication links, namely, input communication links 13(p)(i), over which the switching node l l(n) receives the optical signals, and the output interface 34 is connected to others of the communication links, namely, output communication links 13(p)(o), over which the switching node transmits the optical signals.
  • each input communication link 13(p)(i) will constitute an output communication link over which a device 12(m) or another switching node in the network 11 transmits signals
  • each output communication link 13(p)(o) will constitute an input communication link over which a device 12(m) or another switching node in the network 11 receives signals.
  • the invention provides an explicit rate marking system 36, which is included in and forms part of the control element 35 of the respective switching node 1 l(n), for generating flow control information for inclusion in the BRM cells received thereby.
  • the explicit rate marking system 36 will be described in connection with the illustrative network 10, in which five illustrative virtual circuits are established between respective source and destination devices as follows:
  • communication links 13(1) through 13(4) interconnecting the switching nodes 1 l(n) can form paths for multiple virtual circuits.
  • R M link explicit rate
  • the portion of the bandwidth for a communication link 13(j) above the MCR's for all of the virtual circuits for which the communication link 13(j) forms part of the path (which will be referred to as the "excess bandwidth"), is divided among the virtual circuits on an equal basis, and the link explicit rate R, d for the "i-th" virtual circuit will be the sum of that and the virtual circuit's MCR, that is
  • a similar operation can be performed at every communication link 13(j) to determine the link explicit rate R ] for the respective link and virtual circuit, and, as noted above, the explicit rate R, for each virtual circuit will be the minimum of the link explicit rates R, d for the respective virtual circuit.
  • the capacity C 4 60
  • the explicit rate marking system 36 determines the explicit rate using a virtual bandwidth methodology, in which for a communication link 13(j), if a virtual circuit for which the communication link 13(j) forms part of the path is bottlenecked over another virtual circuit, the explicit rate marking system 36 determines the link explicit rate(s) of other virtual circuits which use it (that is, communication link 13(j)) as part of the path, by generating a virtual bandwidth value C' j available for the ABR service, and determining link explicit rates as described above in connection with equations (2) and (3) using the virtual bandwidth value C' j as well as the actual bandwidth capacity C, available for the ABR service.
  • the link explicit rate R, j will be the link explicit rate so determined, whereas for the virtual circuits which are bottlenecked.
  • the explicit rate marking system 36 determines the virtual bandwidth value C' j according to
  • I B (j) corresponds to the set of virtual circuits which are bottlenecked elsewhere
  • I ⁇ j (j) corresponds to the set of virtual circuits which are not bottlenecked elsewhere
  • N represents the number of virtual circuits for which the communication link 13(j) forms part of the path (which, in turn, corresponds to
  • the virtual bandwidth C' j for communication link 13(j) corresponds to the bandwidth capacity available for virtual circuits which are not bottlenecked, which corresponds to C - ⁇ R, ,
  • link explicit rate for an unbottlenecked virtual circuit corresponds to the bandwidth capacity available for virtual circuits which are not bottlenecked multiplied by the ratio of the MCR of the respective virtual circuit to the sum of the MCR's of the virtual circuits which are not bottlenecked.
  • the virtual bandwidth C' j for the equal share methodology is somewhat more complex.
  • Equation (4) is used to determine the link explicit rate for a virtual circuit (equation (2))
  • each explicit rate marking system 36 for each virtual circuit and each connection, initially determines the link explicit rate R, for each communication link 13(j) using equation (2) or (3) for the selected methodology using the actual bandwidth capacity C, of the respective communication link 13(j) available for the ABR service (step 100). Thereafter, the explicit rate marking system 36 marks each bottlenecked virtual circuit and assigns it its explicit rate R, in accordance with equation (1) (step 101). The explicit rate marking system 36 then determines if there are any virtual circuits which have not been marked (step 102).
  • step 102 If the explicit rate marking system 36 makes a positive determination in step 102, it has not determined the explicit rate R, for all of the virtual circuits, and in that case it will sequence to step 103 in which it identifies each communication link 13(j) which forms part of the path for at least one non-bottlenecked virtual circuit, and thereafter determine the virtual bandwidth value therefor in accordance with equation (4) or (5) (step 104).
  • the explicit rate marking system 36 determines the link explicit rate R, ⁇ for each of the unmarked virtual circuits using equation (2) or (3) using the virtual bandwidth values C' j instead of the actual bandwidth capacities C j (step 105) and returns to step 101 to identify and mark virtual circuits which are determined to be bottlenecked using the new link explicit rates.
  • the explicit rate marking system 36 repeats steps 101 through 105 until it determines in step 102 that all of the virtual circuits have been marked, at which point it will exit (step 106). It will be appreciated that, by the point at which the explicit rate marking system 36 determines that all virtual circuits have been marked, explicit rates R, will have been determined for all of the virtual circuits.
  • the explicit rate marking system 36 maintained by each switching node l l(n), after generating the virtual bandwidth value once can make use of a virtual bandwidth factor "vbf," which it periodically updates as ATM cells are received and transmitted.
  • the explicit rate marking system 36 updates several counters which are used for monitoring cell traffic load and capacity.
  • the explicit rate marking system 36 will increment a total counter which identifies the total number of cells received since the beginning of an interval (step 121).
  • the explicit rate marking system 36 will also determine whether the ATM cell is for a virtual circuit using the ABR service (step 122), and, if so, increment an interval ABR cell counter and a buffered ABR cell counter (step 123).
  • the interval ABR cell counter identifies the number of ATM cells which have been received since the beginning of the same interval.
  • the buffered ABR cell counter identifies the number of cells for virtual circuits which utilize the ABR service currently in the switching node's buffer 32.
  • the explicit rate marking system 36 determines whether the total counter's value corresponds to a predetermined update interval value (step 124). If the explicit rate marking system 36 makes a negative determination in step 124, it will return to step 120 to wait for the arrival of the next ATM cell.
  • the explicit rate marking system 36 determines an update time interval value corresponding to the actual time interval over which the number of cells corresponding to the update interval value was received (step 125). Using the update time interval value, the explicit rate marking system 36 will determine an ABR rate value and a non-ABR rate value (step 126), the ABR rate value corresponding to the value provided by the interval ABR cell counter divided by the update time interval value and the non-ABR rate value corresponding to the difference between the value provided by the total counter and the interval ABR cell counter divided by the update time interval value. Thereafter, the explicit rate marking system 36 can reset the total counter and the interval ABR cell counter (step 127) for use during the next cell reception interval.
  • the explicit rate marking system 36 updates an ABR bandwidth capacity value (which corresponds to C j above) and an ABR utilization value (step 128).
  • the ABR bandwidth capacity value reflects the bandwidth that is currently available for the ABR service.
  • the explicit rate marking system 36 updates the ABR bandwidth capacity value in relation to a smoothing value, the previously generated ABR bandwidth capacity value and the difference between the a target bandwidth utilization capacity for the respective communication link 13(j) and the non-ABR rate value as determined in step 126. It will be appreciated that the difference will generally correspond to the bandwidth capacity that is then available for the ABR service over the respective communication link.
  • the smoothing value is selected to be between zero and one, and the explicit rate marking system 36 generates the updated ABR bandwidth capacity value as the smoothing value multiplied by the difference between the target bandwidth utilization capacity for the respective communication link 13 j) and the non-ABR rate value, plus one minus the smoothing value multiplied by the current ABR bandwidth capacity value.
  • the smoothing value is used to smooth changes which may occur between vbf updates, and in one embodiment is selected to be on the order of one-eighth.
  • the ABR utilization value updated in step 128 reflects the portion of ABR bandwidth capacity that is currently being utilized.
  • the explicit rate marking system 36 updates the ABR utilization value in relation to the smoothing value, the ABR rate value generated in step 126, the just-generated ABR bandwidth capacity value and the current ABR utilization value.
  • the ABR rate divided by the ABR bandwidth capacity value reflects the portion of the ABR bandwidth capacity that is currently being utilized. Accordingly, the explicit rate marking system 36 generates the updated ABR utilization value as the smoothing value multiplied by the ABR rate and divided by the ABR capacity value, plus one minus the smoothing value multiplied by the current ABR utilization value.
  • the explicit rate marking system 36 Following step 128, the explicit rate marking system 36 generates the value of a vbf utilization factor, in relation to the current ABR cell occupancy of the buffer 32 as determined by the buffered ABR cell counter and three predetermined utilization factor values, namely, an maximum utilization factor value, an intermediate utilization factor value and a minimum utilization factor value. In that operation, the explicit rate marking system 36 initially determines whether the current ABR cell occupancy is below a low threshold value (step 129). If the explicit rate marking system 36 makes a positive determination in step 129, the number of cells for virtual circuits utilizing the ABR service is relatively low.
  • the explicit rate marking system 36 initially generates a proportionality value as the difference between the maximum and intermediate utilization factors divided by the low threshold value (step 130), and the vbf utilization factor value as the maximum utilization factor value minus a value corresponding to the proportionality value times the value provided by the buffered ABR cell counter (step 131).
  • step 132 determines whether the current ABR cell occupancy is between the low threshold value and a high threshold value. If the explicit rate marking system 36 makes a positive determination in step 132, it will determine the proportionality value as the difference between the intermediate and low utilization factor values divided by the difference between the high and low threshold values (step 133) and the vbf utilization factor as the intermediate utilization factor minus a value corresponding to the proportionality value determined in step 133 multiplied by the difference between the value provided by the buffered ABR cell counter and the minimum threshold value (step 134).
  • the explicit rate marking system 36 determines the vbf utilization factor as the low utilization factor (step 135).
  • the high and low threshold values, and the values for the maximum, intermediate and minimum utilization factor will be selected so that,
  • the vbf utilization factor value will continue decreasing from the intermediate utilization factor and approach the minimum utilization factor, and (iv) if the buffered ABR cell occupancy is above the high threshold value, the vbf utilization factor value will correspond to the minimum utilization factor.
  • the maximum utilization factor is selected to have a value of on the order of 1.2
  • the intermediate utilization factor is selected to have a value of on the order of 0.9
  • the minimum utilization factor is selected to have a value of on the order of 0.8.
  • the explicit rate marking system 36 After the explicit rate marking system 36 has determined the vbf utilization factor in step 131, 134 or 135, it proceeds to a series of steps in which it actually generates the value for the virtual bandwidth factor (vbf). Initially, the explicit rate marking system 36 will save the current vbf (step 136).
  • the explicit rate marking system 36 determines whether (i) the ABR utilization rate updated in step 128 is less than predetermined target utilization rate and the vbf utilization factor is greater than one, or (ii) the ABR utilization rate updated in step 128 is greater than predetermined target utilization rate and the vbf utilization factor is less than one (step 137), and, if so multiplies the current vbf by the vbf utilization factor to generate a new current vbf (step 138).
  • the explicit rate marking system 36 generates a new vbf as the sum of the current vbf multiplied by the smoothing factor, and the saved current vbf multiplied by one minus the smoothing factor (step 139).
  • the explicit rate marking system 36 can determine whether the vbf is within a predetermined range and, if not, adjust the vbf to be within the range (step 140).
  • the explicit rate marking system 36 determines whether the cell is associated with a virtual circuit that makes use of the ABR service (step 161). If the explicit rate marking system 36 makes a negative determination in step 161, the control element will perform conventional operations to transmit the cell over the appropriate communication link 13 (j ) (step 162) . On the other hand, if the explicit rate marking system 36 makes a positive determination in step 161, it will initially decrement the buffered ABR cell counter (step 163). Thereafter, the explicit rate marking system 36 will determine whether the cell is a BRM (backward RM) cell (step 164).
  • BRM backward RM
  • the explicit rate marking system 36 If the explicit rate marking system 36 makes a positive determination in step 164, it proceeds to generate a link explicit rate R, j for the virtual circuit associated with the cell (step 165). If the explicit rate marking system 36 makes use of the equal shares methodology it will make use of equation (2), and if it makes use of the proportional share methodology it will make use of equation (3). In both cases, the explicit rate marking system 36 uses the virtual bandwidth value C' j instead of the bandwidth value C j available for the ABR service, and determines the virtual bandwidth value C' j as the ABR capacity multiplied by the most recently determined vbf value.
  • the explicit rate marking system 36 determines whether the link explicit rate Ry determined in step 165 is less than the explicit rate value contained in the BRM cell (step 166) and, if so, substitutes the link explicit rate value determined in step 165 for the explicit rate value in the BRM cell (step 167). Following step 167, step 166 if a negative determination is made in that step, or step 164 if a negative determination is made in that step, the control element 35 will enable the cell to be transmitted over the communication link 13(j) (step 168).
  • the invention provides a number of advantages.
  • the invention provides an explicit rate marking system 36 which can, for each switching node 1 l(n), generate explicit rates for virtual circuits which use the respective switching node, generally only in relation to their respective MCR's, the number of bottlenecked and unbottlenecked virtual circuits, and the amount of bandwidth capacity available for the ABR service, which simplifies assignment of ABR bandwidth capacity to each virtual circuit even if one or more of the virtual circuits is bottlenecked.
  • a system in accordance with the invention can be constructed in whole or in part from special purpose hardware or a general purpose computer system, or any combination thereof, any portion of which may be controlled by a suitable program.
  • Any program may in whole or in part comprise part of or be stored on the system in a conventional manner, or it may in whole or in part be provided in to the system over a network or other mechanism for transferring information in a conventional manner.
  • the system may be operated and/or otherwise controlled by means of information provided by an operator using operator input elements (not shown) which may be connected directly to the system or which may transfer the information to the system over a network or other mechanism for transferring information in a conventional manner.

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

L'invention concerne un système de marquage de débit explicite, comprenant un module virtuel générateur de valeur de largeur de bande, et un module explicite générateur de valeur de débit. Le module virtuel générateur de largeur de bande produit une valeur de largeur de bande virtuelle reflétant une valeur de capacité de largeur de bande disponible, une valeur de débit explicite associée à chaque circuit virtuel à goulot d'étranglement, pour lequel le noeud de commutation (12) forme une partie de chemin (13), et une valeur minimum de débit de cellule associée à chaque circuit virtuel sans goulot d'étranglement pour lequel le noeud de commutation (12) forme une partie de chemin (13). Le module générateur de valeur de débit explicite produit une valeur de débit explicite associé à la valeur de largeur de bande virtuelle et la valeur de débit de cellule minimum associée au circuit virtuel et aux autres circuits virtuels pour lesquels le noeud de commutation (12) forme une partie du chemin (13).
EP99924274A 1998-05-15 1999-05-17 Marquage de debit explicite pour controle de flux dans des reseaux atm Withdrawn EP1110353A4 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US8558998P 1998-05-15 1998-05-15
US85589P 1998-05-15
PCT/US1999/010807 WO1999060758A1 (fr) 1998-05-15 1999-05-17 Marquage de debit explicite pour controle de flux dans des reseaux atm

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EP1110353A1 EP1110353A1 (fr) 2001-06-27
EP1110353A4 true EP1110353A4 (fr) 2005-08-17

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EP (1) EP1110353A4 (fr)
JP (1) JP2002516525A (fr)
AU (1) AU750013B2 (fr)
CA (1) CA2332116A1 (fr)
WO (1) WO1999060758A1 (fr)

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CN100459770C (zh) * 2006-04-12 2009-02-04 华为技术有限公司 提高无线网络控制器与基站之间接口带宽利用效率的方法

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WO1997002685A1 (fr) * 1995-07-03 1997-01-23 Nippon Telegraph And Telephone Corporation Reseau de communications a bande variable
US5898669A (en) * 1996-03-22 1999-04-27 Shimony; Ilan ATM traffic management device
US5864539A (en) * 1996-05-06 1999-01-26 Bay Networks, Inc. Method and apparatus for a rate-based congestion control in a shared memory switch
US5909443A (en) * 1997-01-03 1999-06-01 International Business Machines Corporation ATM network congestion control system using explicit rate cell marking

Non-Patent Citations (3)

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Title
GHANI N ET AL: "Queueing analysis of a distributed explicit rate allocation algorithm for ABR services", INFOCOM '97. SIXTEENTH ANNUAL JOINT CONFERENCE OF THE IEEE COMPUTER AND COMMUNICATIONS SOCIETIES. DRIVING THE INFORMATION REVOLUTION., PROCEEDINGS IEEE KOBE, JAPAN 7-11 APRIL 1997, LOS ALAMITOS, CA, USA,IEEE COMPUT. SOC, US, vol. 3, 7 April 1997 (1997-04-07), pages 1315 - 1323, XP010251980, ISBN: 0-8186-7780-5 *
KALAMPOUKAS L ET AL INTERNATIONAL FEDERATION FOR INFORMATION PROCESSING (IFIP): "AN EFFICIENT RATE ALLOCATION ALGORITHM FOR ATM NETWORKS PROVIDING MAX-MIN FAIRNESS", HIGH PERFORMANCE NETWORKING 6. IFIP 6TH. INTERNATIONAL CONFERENCE ON HIGH PERFORMANCE NETWORKING. (HPN). PALMA DE MALLORCA, SEPT. 13 - 15, 1995, INTERNATIONAL CONFERENCE ON HIGH PERFORMANCE NETWORKING (HPN), LONDON, CHAPMAN & HALL, GB, vol. CONF. 6, 11 September 1995 (1995-09-11), pages 143 - 154, XP000624333, ISBN: 0-412-73290-4 *
See also references of WO9960758A1 *

Also Published As

Publication number Publication date
CA2332116A1 (fr) 1999-11-25
AU750013B2 (en) 2002-07-11
WO1999060758A1 (fr) 1999-11-25
JP2002516525A (ja) 2002-06-04
EP1110353A1 (fr) 2001-06-27
AU4081499A (en) 1999-12-06

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