EP0955724B1

EP0955724B1 - Short-circuit protection circuit, particularly for power transistors

Info

Publication number: EP0955724B1
Application number: EP98830276A
Authority: EP
Inventors: Giorgio Chiozzi; Bruno Marcone
Original assignee: STMicroelectronics SRL
Current assignee: STMicroelectronics SRL
Priority date: 1998-05-08
Filing date: 1998-05-08
Publication date: 2010-10-13
Anticipated expiration: 2018-05-08
Also published as: US6175478B1; EP0955724A1; DE69841936D1; JPH11355060A

Description

The present invention relates to a short-circuit protection circuit, particularly for power transistors.
It is known that many integrated circuits use protections against short-circuits to control the maximum current that flows through the power transistors. In some applications it is important that the power transistor be able to supply a small current also when high voltages are applied to its terminals.
In single power-supply audio applications, during power-on transients the power transistor must charge the decoupling capacitor, which is connected between the loudspeaker and the output of the power stage, while the entire power supply voltage is applied to the terminals of the power transistor.
In such a situation, it is important to ensure that the power transistor is capable of supplying the current required to charge said capacitor, so that the amplifier can power-on correctly.
Figure 1 illustrates a conventional protection circuit, in which the reference numeral 1 designates the power transistor and the reference numeral 2 designates a so-called sense resistor, which is suitable to sense the output current Io and is arranged in series to the power transistor 1, a current mirror Q1, Q2 with corresponding current sources Io and Iref which are series-connected, and finally a circuit branch which is connected between the ground and the bases of the transistors Q1 and Q2 and is constituted by a resistor 3 which is series-connected to a Zener diode 4.
At a point which is intermediate between the transistor Q2 and the current source Iref a pin is provided for acquiring the signal for indicating intervention or lack thereof on the power transistor 1 in order to limit the maximum voltage across it.
The resistor 3 senses the voltage drop on the power transistor 1. When the voltage across the transistor exceeds the value $VDS_MAX = R 3 IREF \frac{A 2}{A 1} + VZ$

the protection circuit disconnects the power transistor 1 and no current can be supplied anymore: this limits the maximum supply voltage.
In the above relation, the terms A2 and A1 are, respectively, the areas of the transistors Q2 and Q1, while vds_Max is the maximum voltage between the drain and the source of the power transistor 1 and VZ is the voltage across the Zener diode 4. R3 is resistor 3.
EP-0 772 273 discloses a protection device as defined in the preamble of claim 1.
The aim of the present invention is therefore to provide a short-circuit protection circuit, particularly for power transistors, in which means are provided for determining the maximum and minimum values of the output current of the power transistor as a function of the voltage applied to its drain and source terminals.
Within this aim, an object of the present invention is to provide a short-circuit protection circuit, particularly for power transistors, which occupies a reduced area.
Another object of the present invention is to provide a short-circuit protection circuit, particularly for power transistors, which is highly reliable, relatively easy to manufacture and at competitive costs.
This aim, these objects and others which will become apparent hereinafter are achieved by a short-circuit protection circuit, particularly for power transistors, as defined in claim 1.
Further characteristics and advantages of the invention will become apparent from the description of a preferred but not exclusive embodiment of the circuit according to the invention, illustrated only by way of non-limitative example in the accompanying drawings, wherein:

Figure 1 is a circuit diagram of a conventional protection circuit;
Figure 2 is a conceptual circuit diagram of the short-circuit protection circuit according to the present invention;
Figure 3 is a chart which plots the protection curve that can be obtained with the circuit according to the present invention; and
Figure 4 is a circuit diagram of a practical implementation of the circuit shown in Figure 2.

With reference to the above figures, the protection circuit according to the present invention, generally designated by the reference numeral 10, comprises first means 11 for mirroring the output current of a power transistor 12.
The mirroring means are conveniently constituted by a MOS transistor which is parallel-connected to the power transistor 12 so that its gate terminals are common-connected.
Second mirroring means, conveniently constituted by bipolar transistors 13 and 14 with common-connected base terminals, are series-connected to the first mirroring means 11. In particular, the collector terminal of the bipolar transistor 13 is connected to the drain terminal of the transistor 11, while its emitter terminal is connected to the drain terminal of the power transistor 12.
In the bipolar transistor 14, instead, the emitter terminal is connected to the drain terminal of the power transistor 12 and the collector terminal is connected to a reference current source 15, which generates a reference current Iref.
The bipolar transistor 13 is diode-connected.
Figure 2 illustrates the case of a protection circuit applied to one of the two power transistors usually used in a final power stage. In particular, the case of Figure 2 is the one in which the protection circuit is applied to the power transistor whose source terminal is connected to the ground and whose drain terminal constitutes the output of the final power stage.
The above-described circuit can likewise be used also in the case of a power transistor whose drain terminal is connected to the supply voltage and whose source terminal constitutes the output of the final power stage.
The circuit according to the invention further comprises means for sensing the voltage drop across the power transistor 12; said means are parallel-connected to the power transistor 12 and to the first mirroring means 11.
The means for sensing the voltage drop across the power transistor 12 comprise a second MOS transistor 16, whose gate terminal is common-connected to the gate terminal of the power transistor 12 and whose source terminal is connected to the source terminal of the power transistor. A resistor 17 is series-connected to the drain terminal of the second MOS transistor 16, and a Zener diode 18 is in turn series-connected to said resistor 17; the anode terminal of said Zener diode 18 is connected to the collector terminal of the bipolar transistor 13.
The area of the first MOS transistor 11 is much smaller than the area of the second MOS transistor 16.
A signal, designated by the reference numeral 20, is acquired in an intermediate point between the collector terminal of the bipolar transistor 14 and the current source 15; said signal provides an indication as to the need to intervene or not on the power transistor 12 to reduce its supplied current.
With reference now to Figure 2, the operation of the circuit according to the invention is as follows.
The output current of the power transistor 12 is sensed by mirroring the power transistor 12 by means of the MOS transistor 11 and then by means of the bipolar transistors 13 and 14 on the output, i.e., in the comparison node wherefrom the signal 20 is output, in order to compare said current with the reference current set by the reference current source 15.
The effect of the resistor 17 is to decrease the current supplied by the power transistor 12 until the voltage across the power transistor 12 is high enough to cause the current flowing through the resistor R to be equal to the current mirrored by the MOS transistor 16.
The transistor 16 behaves like a switch when low voltages are applied across the power transistor 12 and instead acts as a current source when high voltages are applied across the same transistor.
In the second case, the resistor 17 has no effect and the maximum current is set by the area ratios of the transistors and by the reference current Iref.
Explicitly with reference now to the circuit of Figure 2, when a low voltage (Vds) is applied between the drain terminal and the source terminal of the power transistor 12, no current flows through the MOS transistor 16. The protection current can be calculated by making the current supplied by the bipolar transistor 14 equal to the reference current Iref. Therefore: $Iout \frac{A_{11}}{A_{12}} = Iref$

where A₁₁ is the area of the MOS transistor 11 and likewise A₁₂ is the area of the power transistor 12, while I_out is the current in output from the power transistor 12.
Solving the above equation as a function of I_out provides the expression of the protection current at low voltage: $I_{outLV} = Iref \frac{A_{12}}{A_{11}}$

when the voltage between the drain and the source of the power transistor 12 is higher than the voltage across the Zener diode 18, a certain current flows through the resistor 17, lowering the protection current, in a manner which is linear with respect to the increase in voltage across the terminals of the power transistor. Ignoring the voltage drop between the base and the emitter of the bipolar transistor 13, it is possible to obtain: $I_{out} = \frac{A_{11}}{A_{12}} + \frac{V_{DS} - V_{Z}}{R} = I_{ref}$

wherefrom, by solving as a function of the output current I_out, the expression of the protection current is obtained as a function of the voltage drop across the power transistor 12.
Accordingly, the following relation applies: $I_{out} = (I_{ref} - \frac{V_{DS} - V_{Z}}{R}) \frac{A_{12}}{A_{11}}$

where Isoa is the current of the safe operating area of the power transistor 12.
When the voltage across the power transistor 12 increases, the second MOS transistor 16 becomes a current source and no further dependence of the protection current from the voltage across the drain and source terminals of the power transistor 12 is observed. This occurs when the current flowing through the MOS transistor 16 equals the current flowing through the resistor 17: $V_{DS} = {RI}_{ref} \frac{A_{16}}{A_{16} + A_{11}} + V_{Z}$
In this condition, the protection current can be calculated by rendering the sum of the current mirrored by the transistors 16 and 11 equal to the reference current Iref: $I_{out} \frac{A_{16} + A_{11}}{A_{12}} = I_{ref}$
Solving as a function of the output current I_out produces the expression of the high-voltage protection current applied to the drain and source terminals of the power transistor 12: $I_{out HV} = Iref \frac{A_{12}}{A_{16} + A_{11}}$
Figure 3 plots the resulting protection curve, wherein the axis of the ordinates represents the output current I_out of the power transistor and the axis of the abscissae represents the voltage across the drain and source terminals of the power transistor 12.
It is evident that for voltage values Vds below the voltage across the Zener diode 18, Vz, the protection curve is flat and parallel to the axis of the abscissae, while for voltages applied to the power transistor 12 which are higher than the Zener voltage Vz the curve descends in a linear manner as the voltage Vds increases, until it settles again so that it is parallel to the axis of the abscissae for voltage values exceeding a certain value thereof, equal to: $\frac{A_{16}}{A_{16} + A_{11}} = RIref$
Figure 4 shows a particular implementation of the circuit in Fig. 2. The circuit, similar to the one shown in Figure 2, differs only in that the output of the circuit, taken between the collector terminal of the bipolar transistor 14 and the source 15, is connected to the base terminal of a third bipolar transistor 21, whose emitter terminal is common-connected to the gate terminal of the power transistor 12 and whose collector terminal is common-connected to the source terminal of the power transistor 12.
The transistor 21 of the PNP type limits the gate voltage of the power transistor 12, thus limiting the output current of said transistor.
A fourth PNP transistor 22 is connected so that its base terminal is common-connected to the base terminal of the power transistor 12 and its collector terminal is common-connected to the source terminal of the power transistor 12.
The emitter terminal of the transistor 22 is biased by a biasing current source 23, which is connected to the supply voltage V_dd.
The transistor 22 is necessary because in the circuit layout of Figure 4 the second mirroring means 13, 14 are connected to the ground, while the branch with the transistor 16, the resistor 17 and the Zener diode 18 is connected to the output of the final power stage.
In practice it has been observed that the circuit according to the present invention fully achieves the intended aim.
The circuit thus conceived is susceptible of numerous modifications and variations, all of which are within the scope of the inventive concept; all the details may also be replaced with other technically equivalent elements.
In practice, the materials employed, so long as they are compatible with the specific use, as well as the dimensions, may be any according to requirements and to the state of the art.
Where technical features mentioned in any claim are followed by reference signs, those reference signs have been included for the sole purpose of increasing the intelligibility of the claims and accordingly such reference signs do not have any limiting effect on the interpretation of each element identified by way of example by such reference signs.

Claims

A short-circuit protection circuit (10), particularly for power transistors, comprising: first means (11) for mirroring the output current of a power transistor (12) which are parallel-connected to said power transistor; second mirroring means (13, 14) which are series-connected to said first mirroring means (11) and are suitable to emit a current which is correlated to the current mirrored by said first mirroring means, for comparison with a reference current (Iref); the result of said comparison determining the need to intervene or not on said power transistor (12); and further comprising means (16, 17, 18) for sensing the voltage drop between drain and source terminals of said power transistor (12) which are parallel-connected to said power transistor (12) and to said first mirroring means (11), in order to adjust minimum and maximum values of the current in output from said power transistor (12), as a function of the voltage that is present across said power transistor (12), characterized in that said means (16, 17, 18) for sensing the voltage drop across said power transistor (12) comprise a second MOS transistor (16) in which the gate terminal and the source terminal are common-connected to the gate terminal and the source terminal of the power transistor (12) and further comprise a resistor (17) and a Zener diode (18) which are series-connected between the drain terminal of said second MOS transistor (16) and a point which is intermediate between the collector terminal of the first bipolar transistor (13) and the source terminal of said first MOS transistor (11) of said first mirroring means.
The circuit according to claim 1, characterized in that said first mirroring means comprise a first MOS transistor (11) in which the gate terminal and the source terminal are common-connected to the gate terminal and the source terminals of the power transistor (12).
The circuit according to claim 1, characterized in that said second mirroring means (13, 14) comprise a pair of bipolar transistors (13, 14) in which the base terminals are common-connected, a first transistor (13) of said pair of bipolar transistors being diode-connected, the emitter terminals of said pair of bipolar transistors (13, 14) being connected to the drain terminal of said power transistor (12).
The circuit according to claim 3, characterized in that in said first transistor (13) of the pair of bipolar transistors(13, 14) the collector terminal is connected to the drain terminal of said MOS transistor (11) of the first mirroring means.
The circuit according to claim 3, characterized in that in the second bipolar transistor (14) of said pair of bipolar transistors (13, 14) the collector terminal is connected to a current source (15) which is adapted to generate said reference current (Iref).
The circuit according to claim 5, characterized in that the comparison with the reference current is performed at a point between the collector terminal of said second bipolar transistor (14) and said reference current source (15), the signal (20) sensed at said intermediate point giving an indication of the need to intervene or not on said power transistor.
The circuit according to claim 1, characterized in that said Zener diode (18) is connected to said resistor (17) with its anode terminals.
The circuit according to one or more of the preceding claims, characterized in that the area of said first MOS transistor (11) is much smaller than the area of said second MOS transistor(16).