EP0915408B1

EP0915408B1 - High voltage regulator and corresponding voltage regulation method

Info

Publication number: EP0915408B1
Application number: EP19970830575
Authority: EP
Inventors: Andrea Ghilardelli; Francesco Maria Brani; Carla Golla
Original assignee: STMicroelectronics SRL; SGS Thomson Microelectronics SRL
Current assignee: STMicroelectronics SRL
Priority date: 1997-11-05
Filing date: 1997-11-05
Publication date: 2003-02-19
Anticipated expiration: 2017-11-05
Also published as: DE69719188T2; DE69719188D1; EP0915408A1

Description

Field of the Invention

This invention relates to a high voltage regulator.

The invention specifically relates to a high voltage regulator which is partly supplied by a boosted voltage and is adapted to deliver a regulated output voltage on an output terminal, starting from a sampled voltage obtained by dividing the regulated output voltage, which regulator comprises at least a comparator element being supplied by a supply voltage and feedback connected to a divider of said regulated output voltage.

The invention also concerns a method of regulating a voltage obtained from a boosted voltage.

The invention particularly, but not exclusively, relates to a high voltage regulator for a memory of the 'flash' type, and the description which follows is given in connection with this field of application for simplicity of illustration only.

Background Art

As is well known, many applications concerning electronic circuits integrated in a semiconductor require that voltages above the supply voltage Vcc and below the ground voltage reference GND be generated. This requirement is most stringent with devices which are supplied by a low voltage, as in the current trend for many electronic devices among which are electrically programmable and erasable non-volatile memories.

A boosted voltage is usually generated by means of a voltage multiplier or "booster" circuit, which is purposely formed within the integrated circuit itself.

The booster circuit output is not at a regulated value but depends to supply voltage, temperature, output current, and process factors.

In such cases, it becomes necessary to smooth the output voltage Vout by means of a purposely provided regulator circuit. In particular, a regulator for a voltage multiplier circuit of the charge pump type, i.e. a high voltage regulator, must be designed with high accuracy criteria because charge pump circuits can only supply limited value currents.

Basic requirements for a regulator of high voltages generated by a booster circuit of the charge pump type are:

low current consumption by the charge pump booster circuits which supply the high voltage to be regulated;
high precision, especially as regards absence of overshoot and ripples in the regulated voltage, and its independence of the parasitic effects that are typical of high voltages;
sufficiently fast settling during transient phases, such as the regulator triggering phase;
low space requirements, i.e. reduced occupation of silicon area.

A high voltage regulator 1 according to the prior art is shown schematically in Figure 1 appended hereto.

The high voltage regulator 1 is partly supplied by a boosted voltage PUMPOUT generated by a charge pump circuit which supplies a high voltage at a small current capacity.

The output voltage Vout is regulated by resistive division of the boosted voltage PUMPOUT.

In this way, an output voltage Vout can be obtained for the high voltage regulator 1.

The voltage regulator 1 comprises a resistive divider consisting of two resistive elements R1 and R2, connected between an output terminal OUT and a ground voltage reference GND. The central connection node X of the resistive elements R1 and R2 is connected to a non-inverting input terminal of a comparator element 2 having an inverting input terminal connected to an input terminal IN of the high voltage regulator 1 and a supply terminal connected to a supply voltage reference Vdd.

The input terminal IN of the high voltage regulator 1 receives a reference voltage Vref of constant value, usually for utilisation by several circuits in the same device.

The comparator element 2 also has an output terminal connected to the supply terminal of a drive transistor M1.

The drive transistor M1, specifically one of the NMOS type, has its source terminal connected to the ground voltage reference GND and its drain terminal connected to the control gate terminal of an output transistor M2, itself connected between the boosted voltage reference PUMPOUT and the output terminal OUT of the high voltage regulator 1.

The high voltage regulator 1 further includes a load transistor M3, specifically one of the PMOS type, which is connected between the boosted voltage reference PUMPOUT and the control gate terminal of the output transistor M2 and has its control gate terminal connected to the ground voltage reference GND. This load transistor M3 has the n-well terminal connected to its source terminal and, hence, to the boosted voltage reference PUMPOUT.

The regulated output voltage Vout is sampled by the resistive divider of the high voltage regulator 1, which then provides a feedback of the same. Therefore, the value of this regulated output voltage Vout will be dependent on both the value of the reference voltage Vref and the ratio of the resistive divider R1, R2.

While achieving its objective, this solution is less than fully satisfactory and has certain drawbacks.

A major problem originates from the resistive divider R1, R2.

First, to conform with the above requirement for the charge pump booster circuit supplying the boosted voltage PUMPOUT to have a low current consumption, this resistive divider, and particularly the combined resistances of the resistors R1 and R2, should be rather large (in the MΩ range).

However, the use of a resistive divider of this size clashes with the other requirements set forth above for the high voltage regulator 1, namely precision, speed, and low space occupation. In fact, to provide an integrated resistor, there are essentially two methods that can be used:

formation in an n⁺ diffusion;
formation in an n-well.

Actually, in view of the size (in the MΩ range) involved, only the last-mentioned method can be used for forming the resistive divider of the prior art high voltage regulator 1, since the n-well of an integrated circuit has a higher specific resistivity than n⁺ diffusions. An n-well resistor is shown schematically in Figure 2.

Unfortunately, resistors formed in n-wells give rise to two important problems:

1. They exhibit a high parasitic capacitance Cpar toward the substrate layer of the integrated circuit.

2. They exhibit a varying resistance, dependent in particular on the voltages applied across them, due to the depleted reverse-biases area that exists between the n-well and the substrate.

Referring to the high voltage regulator 1 shown in Figure 1, the parasitic capacitance associated with a resistive divider so formed causes delayed following of a divided voltage Vsample at the central connection node X of the resistive elements R1 and R2 with respect to variations occurring in the regulated output voltage Vout.

This delay reflects in a slowed settling of the output voltage Vout, as well as overshooting and rippling thereof, in contrast with the requirements set above for the high voltage regulator 1.

In addition, the varying character of the resistance of the divider formed in the n-well makes it difficult to obtain a desired value for the regulated output voltage Vout. In fact, this varying resistance is difficult to model and reproduce. Thus, the high voltage regulator 1 incorporating such a divider is unsuitable to meet the aforementioned requirements.

The underlying technical problem of this invention is to provide a high voltage regulator, in particular for voltages supplied by booster circuits, which exhibits low current consumption and high precision features, as well as sufficient speed during the transient phases, with no overshoot and ripples, and reduced space requirements. In this way, the requirements for such regulators can be met and the drawbacks besetting the prior art regulators overcome.

Summary of the Invention

The idea of solution behind this invention is one of using a diode type of divider connected to an output voltage reference to be regulated and to a varying reference voltage.

Based on this idea of solution, the technical problem is solved by a high voltage regulator as previously indicated and defined in the characterising portion of Claim 1.

The problem is also solved by a method of regulating a voltage obtained from a boosted voltage as previously indicated and defined in the characterising portion of Claim 11.

The features and advantages of a high voltage regulator according to the invention will be apparent from the following description of embodiments thereof, given by way of non-limitative examples with reference to the accompanying drawings.

Brief Description of the Drawings

In the drawings:

Figure 1 shows in schematic form a high voltage regulator including a resistive divider according to the prior art;

Figure 2 is a detail view of a detail of the regulator in Figure 1;

Figure 3 shows in schematic form a high voltage regulator including a diode divider according to the invention;

Figure 4 shows a modified embodiment of the high voltage regulator according to the invention.

Detailed Description

Referring in particular to Figure 3, generally and schematically shown at 3 is a high voltage regulator according to the invention. Corresponding circuit elements and signals, described in connection with the prior art high voltage regulator 1, will be denoted by the same alphanumerical references.

The high voltage regulator 3 is partly supplied by a boosted voltage PUMPOUT, generated by a charge pump circuit (not shown) which supplies a high voltage at a small current capacity. The high voltage regulator 3 has an input terminal IN receiving a varying reference voltage Vref_v, and an output terminal OUT delivering a regulated output voltage Vout.

The output voltage Vout is regulated by having it divided by a diode divider 4.

The diode divider 4 comprises a plurality of diodes D1, D2,..., Dn, D1', D2',..., Dn' connected between the output terminal OUT and a ground voltage reference GND. The diode divider 4 is functionally split into first 5 and second 6 legs respectively comprising first and second diode pluralities D1, D2,..., Dn and D1', D2',..., Dn' which are connected together at a central connection node Y.

The central connection node Y is connected to a non-inverting input terminal of a comparator element 2 which has an inverting input terminal connected to the input terminal IN of the high voltage regulator 1 and a supply terminal connected to a supply voltage reference Vdd, similar as the prior art high voltage regulator 1.

The comparator element 2 also has an output terminal connected to the control terminal of a drive transistor M1 which has its source terminal connected to the ground voltage reference GND and its drain terminal connected to the control terminal of an output transistor M2, itself connected between the boosted voltage reference PUMPOUT and the output terminal OUT of the high voltage regulator 3.

The high voltage regulator 3 further comprises a load transistor M3, specifically one of the PMOS type, which is connected between the boosted voltage reference PUMPOUT and the control terminal of the output transistor M2 and has its control terminal connected to the ground voltage reference GND. This load transistor M3 has an n-well terminal connected to the source terminal and, hence, to the boosted voltage reference PUMPOUT.

The regulated output voltage Vout is sampled by the resistive divider of the high voltage regulator 3 at the central connection node X. The comparator element 2 in combination with the transistors M1, M2 and M3 then provide a negative feedback of the sampled voltage Vsample.

Advantageously in this invention, the comparator element 2 basically comprises an operational amplifier or a simple differential. In either cases, this operational amplifier or simple differential is supplied by the supply voltage Vdd and, accordingly, can draw large amounts of current from the supply voltage reference Vdd, which makes it specially fast.

On the other hand, the portion which includes the drive transistor M1, output transistor M2, and load transistor M3 is supplied by the boosted voltage PUMPOUT, i.e. a higher voltage than the supply voltage Vdd.

It should be noted that the varying reference voltage Vref_v may lie anywhere between the supply voltage reference Vdd and the ground voltage reference GND.

Advantageously in this invention, the diode divider 4 may comprise a plurality of diode-configured MOS transistors, which would exhibit none of the aforementioned problems affecting the resistive dividers of conventional circuits.

This diode divider 4 may be formed of PMOS transistors, as shown in Figure 3; likewise, it could be formed of NMOS transistors or semiconductor junctions.

In all cases:

1. The diode-connected MOS transistors have a high transresistance, and limited silicon area requirements for their formation.

2. The reduced area requirement eliminates the presence of undesired parasitic capacitances, thereby enabling the divided voltage Vsample at the central connection node Y of the diode divider 4 to most promptly follow the value of the voltage to be regulated (Vout) at the output terminal OUT, thus enhancing both accuracy and speed during transient phases and attenuating overshoot and ripples of the high voltage regulator 3 as a whole.

3. The equivalent resistance of the diode divider 4 is in no way concerned with the voltages applied across it, which means that the diode divider 4 will be unaffected by parasitic effects typical of high voltages.

The value of the regulated output voltage Vout of the high voltage regulator 3 according to the invention is given as: Vout = nu + nd nd Vref_v where:

n_u, n_d are the (obviously natural) numbers of diodes included in the first 5 and second 6 legs of the diode divider 4.

If, from a given value of the varying reference voltage Vref_v, numbers (which obviously must be natural numbers) of diodes n_u, n_d included in the first 5 and second 6 legs of the diode divider 4 can be found which yield the desired value for the regulated output voltage Vout, then the varying reference voltage Vref_v can be used.

It should be noted that for the diode divider 4 to perform as expected, its diodes should be in the on state. For this to occur, a voltage drop at least equal to the diode threshold voltage VT is required across each diode.

On the contrary, if no number pair n_u, n_d of diodes exist in the first and second legs 5 and 6 of the diode divider 4 which can yield the desired value for the regulated output voltage Vout, the reference voltage Vref_v should be changed. This does not represent a problem, since for a value of the reference voltage Vref_v lying, as already stated, between the value of the supply voltage Vdd and the ground GND, a different starting reference voltage Vref' can be derived therefrom, in a known manner by the skilled persons in the art, which lies anywhere between the supply voltage Vdd and the ground GND. A circuit adapted to provide the new starting reference voltage Vref' is simple to design and allows the same supply voltage Vdd to be used from which a large amount of current can be extracted.

Such a circuit, therefore, exhibits low current consumption of the booster circuits, is highly accurate, and shows no overshoot and ripples of the regulated voltage, which will be free of parasitic effects typical of high voltages and settle at a fast rate during the transient phases.

The single drawback of such a circuit is a waste of occupied area, especially where a new starting reference voltage Vref' with a high value is to be generated.

Figure 4 shows a modified embodiment 3' of the high voltage regulator according to the invention. In particular, this regulator 3' has the input terminal IN connected to the ground voltage reference GND and to the inverting input of the comparator element 2, itself having a non-inverting input connected to a central connection node Z of the diode divider 4.

The comparator element 2, comprising in particular an operational amplifier being supplied by the supply voltage Vdd, also has an output terminal OUT'.

In the modified embodiment of Figure 4, the diode divider 4 is connected between the varying reference voltage reference Vref_v and the output terminal OUT of the high voltage regulator. This diode divider 4 comprises first 5 and second 6 diode legs connected together at the central connection node Z.

Thus, the high voltage regulator 3' is a regulator of negative voltages. Its operation is similar to that of the high voltage regulator 3 shown in Figure 3.

In particular, the output voltage Vout to be regulated is sampled through the diode divider 4, in this case with respect to the varying reference voltage Vref_v rather than to the ground GND. The voltage value so sampled is then compared, by means of the operational amplifier 2, with the ground GND through a suitable feedback network (not shown) connected to the output terminal OUT'.

In summary, the high voltage regulator of this invention provides a regulated output voltage from a boosted voltage obtained, in particular, by means of a charge pump booster circuit, through a diode divider. In particular, the output voltage is regulated by comparison of the sampled voltage from the divider with a varying reference voltage or the ground.

Claims

A high voltage regulator partly supplied by a boosted voltage (PUMPOUT) and adapted to deliver a regulated output voltage (Vout) on an output terminal (OUT), starting from a sampled voltage (Vsample) obtained by dividing the regulated output voltage (Vout), which regulator comprises at least a comparator element (2) being supplied by a supply voltage (Vdd) and feedback connected to a divider (4) of said regulated output voltage (Vout), characterised in that said divider (4) is a diode divider connected between the output terminal (OUT) and a first comparison voltage reference (GND, Vref_v) and has a central connection node (Y, Z) connected to a non-inverting terminal of the comparator element (2), and that the high voltage regulator further comprises an input terminal (IN), connected to a second comparison voltage reference (Vref_v, GND) and to an inverting terminal of the comparator element (2) incorporated to the high voltage regulator (3).
A high voltage regulator according to Claim 1, characterised in that said diode divider (4) comprises first and second legs (5, 6) of diodes (D1,D2,...,Du, D1',D2',...,Dd') connected in series with one another at said central connection node (Y, Z), said first leg (5) of diodes being connected between the output terminal (OUT) and the central connection node (Y, Z) of said divider, and said second leg (6) being connected between the central connection node (Y, Z) and the first comparison voltage reference (GND, Vref_v).
A high voltage regulator according to Claim 2, characterised in that the second leg (6) of diodes is connected between the central connection node (Y) and a ground voltage reference (GND), and that the input terminal (IN) of the high voltage regulator (3) is connected to a varying voltage reference (Vref_v).
A high voltage regulator according to Claim 1, characterised in that the comparator element (2) comprises essentially an operational amplifier or a simple differential.
A high voltage regulator according to Claim 4, characterised in that only said operational amplifier or simple differential included in the comparator element (2) is supplied by the supply voltage (Vdd).
A high voltage regulator according to Claim 1, characterised in that said comparator element (2) has an output terminal connected to the output terminal (OUT) of the high voltage regulator (3) through a series of the drive transistor (M1), an output transistor (M2), and a load transistor (M3), said drive transistor (M1) having its control gate terminal connected to the output terminal of the operational amplifier (2), its source terminal connected to the ground voltage reference (GND), and its drain terminal connected to the control gate terminal of the output transistor (M2), said output transistor (M2) being connected between the boosted voltage reference (PUMPOUT) and the output terminal (OUT) of the high voltage regulator (3), and said load transistor (M3) being connected between the boosted voltage reference (PUMPOUT) and the control gate terminal of the output transistor (M2) and having its control gate terminal connected to the ground voltage reference (GND).
A high voltage regulator according to any one of the preceding claims, characterised in that the value of the varying reference voltage (Vref_v) ranges from the value of the supply voltage (Vdd) to the ground value (GND).
A high voltage regulator according to Claim 2, characterised in that the second leg (6) of diodes is connected between the central connection node (Z) and a varying voltage reference (Vref_v), and that the input terminal (IN) of the high voltage regulator (3) is connected to a ground voltage reference (GND).
A high voltage regulator according to Claim 1, characterised in that the diode divider (4) comprises a plurality of MOS transistors in diode configuration.
A high voltage regulator according to Claim 1, characterised in that the diode divider (4) comprises a plurality of semiconductor junctions.
A high voltage regulator according to any one of the preceding claims, characterised in that said boosted voltage (PUMPOUT) is generated by a booster circuit adapted to supply a high voltage at a small current capacity.
A method of regulating a voltage (Vout) derived from a boosted voltage (PUMPOUT) and adapted to be performed in a high voltage regulator according to any one of claims 1-11, characterised in that it comprises the following steps:

obtaining the sampled voltage (Vsample) as the voltage value at the central connection node (Y, Z) of the diode type of divider (4) connected to the reference of the voltage to be regulated (Vout) and to the first comparison voltage reference (GND, Vref_v);

regulating said voltage (Vout) according to the comparison of said sampled voltage (Vsample) with the second comparison voltage reference (Vref_v, GND).
A regulating method according to Claim 12, characterised in that the comparison of said sampled voltage (Vsample) with said second comparison voltage reference (Vref_v, GND) is performed by an operational amplifier (2) being supplied a supply voltage (Vdd) and feedback connected to said divider (4), the central connection node (Y, Z) of the diode divider (4) being connected to a non-inverting terminal of the operational amplifier (2).
A regulating method according to Claim 13, characterised by the step of comparing the sampled voltage (Vsample) with a varying reference voltage (Vref_v) supplied to an inverting input of the operational amplifier (2), said diode divider (4) being connected to said voltage to be regulated (Vout) and to a ground voltage reference (GND).
A regulating method according to Claim 14, characterised in that, with said diode divider (4) comprising first and second legs (5, 6) of diodes (D1,D2,...,Du,D1',D2',...,Dd') connected in series with one another at said central connection node (Y, Z), the value of the voltage to be regulated (Vout) is obtained from the varying reference voltage (Vref_v) by the following relation: Vout = nu + nd nd Vref_v where:

n_u, n_d are the numbers of diodes included in the first and second legs (5, 6) of the diode divider (4).
A regulating method according to Claim 15, characterised in that, if the numbers (n_u, n_d) of diodes included in the first and second legs (5, 6) of the diode divider (4), said numbers being of necessity natural numbers, can be found from a value whichever of the varying reference voltage (Vref_v), then a desired value of the regulated voltage is obtained.
A regulating method according to Claim 15, characterised in that, starting from a given number (n_u, n_d) of diodes included in the first and second legs (5, 6) of the diode divider (4), the varying reference voltage (Vref_v) can be varied to obtain a desired value of the regulated voltage.