EP0860056A1 - Cross talk interference cancellation in twisted pairs - Google Patents

Cross talk interference cancellation in twisted pairs

Info

Publication number
EP0860056A1
EP0860056A1 EP96934284A EP96934284A EP0860056A1 EP 0860056 A1 EP0860056 A1 EP 0860056A1 EP 96934284 A EP96934284 A EP 96934284A EP 96934284 A EP96934284 A EP 96934284A EP 0860056 A1 EP0860056 A1 EP 0860056A1
Authority
EP
European Patent Office
Prior art keywords
signal
common mode
mode signal
differential amplifier
signals
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP96934284A
Other languages
German (de)
French (fr)
Inventor
John Barsellotti
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
West End Systems Corp
Original Assignee
West End Systems Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by West End Systems Corp filed Critical West End Systems Corp
Publication of EP0860056A1 publication Critical patent/EP0860056A1/en
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B3/00—Line transmission systems
    • H04B3/02—Details
    • H04B3/30—Reducing interference caused by unbalance current in a normally balanced line
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B3/00—Line transmission systems
    • H04B3/02—Details
    • H04B3/32—Reducing cross-talk, e.g. by compensating

Definitions

  • This invention relates to a method and apparatus for suppressing noise caused by foreign signals induced in transmission lines, such as twisted pair lines.
  • Cable companies with their higher bandwidth coaxial cables installed direct to the home are rushing to offer telephony and data communications and other services in competition with the telephone companies.
  • the telephone companies in turn wish to compete by offering switched entertainment and higher bandwidth data and video services.
  • the rejection of induced foreign signals (ingress) into unshielded twisted pair transmission lines depends on the pair balance. At frequencies at which twisted pair is normally used (typically ⁇ 20 kHz), this balance may be better than 60 dB. This means that the differential component ofthe common mode ingress will be attenuated by 60 dB. The common mode component is rejected at the receiver input while the differential component is admitted. Twisted pair balance becomes much worse at very high frequencies (up to 100
  • An object ofthe invention is to provide a method and circuit for suppressing noise under these conditions.
  • a method of suppressing noise in a transmission line comprising the steps of receiving incoming signals at the inputs of a differential amplifier, extracting a common mode signal from said input signals, integrating the output of said differential amplifier that is correlated with said common mode signal over a large number of cycles, and adjusting the balance in said line on the basis of said integration.
  • the integrated signal will be minimized over time to keep the line in optimum balance.
  • the differential component should be smaller than the common mode component (as it normally would be).
  • the differential component In the case ofthe wanted signal, the differential component must be greater than the common mode component (as it normally would be).
  • the unwanted signal can be extracted from the composite using correlation techniques.
  • the pair balance may then be adjusted, at the receiver input, until this unwanted signal is cancelled. If the pair balance is different at different frequencies then multiple cancellers may be used, each operating in a different band.
  • This canceller not only compensates for imperfect balance in the twisted pair, it also compensates for imperfect balance within the receiver.
  • the invention also provides a noise cancellation circuit characterized in that it comprises a differential amplifier for receiving incoming signals on a transmission line, means for a extracting a common mode signal from the incoming signals, means for integrating an output of said differential amplifier that is correlated with said common mode signals, and means for adjusting the signal balance in said transmission line on the basis of said integration.
  • FIG. 1 is a block diagram of an echo canceller circuit in accordance with the invention.
  • Figure 2 shows the result of simulating a circuit in accordance with Figure 1 ; and Figure 3 shows the first 15 micro-seconds of simulation where the composite signal can be seen to be dominated by the ingress:
  • Figure 4 shows the last 15 micro-seconds of simulation where only the wanted signal can be seen.
  • one component o a twisted pair line 1 is connected to the non-inverting input of a receiver amplifier 2 and the other component is connected to the inverting input through balance adjustment unit 1 1 for restoring line balance.
  • this can be a variable gain amplifier.
  • the line 1 is also connected to the two non-inverting inputs of common mode amplifier 3, which detects common mode signals (cm), and respective non-inverting and inverting inputs of amplifier 4, which produces a difference signal dif.
  • the common mode output signal from amplifier 3 is applied to the non- inverting inputs of comparators 5. 6.
  • the inverting input of comparator 5 is connected to ground.
  • the differential output of amplifier 4 is connected through full wave rectifier 7 to inverting input of comparator 6.
  • the outputs of comparator 5 and 6 are fed through AND gate 8 to control switch 9.
  • comparator 5 will turn on switch 9 via AND gate 8 when the signal cm is positive, i.e. during positive half-cycles of the waveform.
  • switch 9 connects the output of receiver 2 to the input of an integrator 10. Since the unwanted component ofthe difference signal is correlated with the common mode, this will be positive at the same time, whereas the uncorrelated wanted signal will be randomly positive and negative. Over a long period of time (typically tens of thousands times the signal period), the unwanted signal at the output of receiver 2 will therefore accumulate at the integrator output. The output of integrator 10 restores the twisted pair balance at the input of the receiver 2 through balance adjustment unit 1 1 thereby to suppress the noise.
  • amplifier 4 detects the differential signal dif.
  • Full wave rectifier 7 derives the absolute value of this signal, which is always positve.
  • the comparator 6 serves to stop integration from occurring at the integrator 10 while the absolute value of the signal dif is higher than the signal cm since the AND gate 8 causes switch 9 to open. The net result is that integration will only take place while the dif signal (and its cm component) is passing through zero. As a result these signals are ignored by the integrator.
  • the wanted signal is 4Vpp with a cm component of 0.8Vpp.
  • the cm ingress is 160Vpp with a dif component of 40Vpp.
  • the ingress signal is a composite of 967kHz, 1.57MHz and 1.93MHz. The first 0.015 seconds of convergence is simulated.
  • Figure 3 shows the first 15 micro-seconds of simulation where the composite signal can be seen to be dominated by the ingress.
  • Figure 4 shows the last 15 micro ⁇ seconds of simulation where only the wanted signal can be seen.
  • circuit has been described as an analog circuit, but those skilled in the art will recognize that it can also be implemented in the digital domain using digital signal processors. It may also be used with duplex systems adopting a ping-pong approach, where signals are alternately sent in opposite directions. It can be used with systems employing frequency or time division multiplexing.
  • the above circuit may destroy the wanted signal. For this reason, it may be desirable to include a noise detector and a device for de ⁇ activating the circuit when the noise drops below a certain threshold level.
  • the described circuit shows great promise in suppressing uncorrelated single frequency interference and impulse noise.

Abstract

In a method of cancelling noise in a transmission line (1), a common mode signal is extracted from incoming signals. The output of the differential amplifier (2) that is correlated with the common mode signal is integrated (10), and adjusting the signal balance in the transmission line is adjusted on the basis of the integration.

Description

CROSS TALK INTERFERENCE CANCELLATION IN TWISTED PAIRS This invention relates to a method and apparatus for suppressing noise caused by foreign signals induced in transmission lines, such as twisted pair lines.
Cable companies with their higher bandwidth coaxial cables installed direct to the home are rushing to offer telephony and data communications and other services in competition with the telephone companies. The telephone companies in turn wish to compete by offering switched entertainment and higher bandwidth data and video services.
The telephone companies have a huge investment in existing copper twisted pair wire into homes and offices. Given that it is impracticable to replace this installed base with coaxial cable, there us a need to find a way to dramatically increase the usable bandwidth ofthe existing copper wire if the telephone companies are going to be able to compete effectively with the cable companies.
The rejection of induced foreign signals (ingress) into unshielded twisted pair transmission lines depends on the pair balance. At frequencies at which twisted pair is normally used (typically < 20 kHz), this balance may be better than 60 dB. This means that the differential component ofthe common mode ingress will be attenuated by 60 dB. The common mode component is rejected at the receiver input while the differential component is admitted. Twisted pair balance becomes much worse at very high frequencies (up to 100
MHz) and the attenuation at these frequencies is extreme. The combination of less than perfect balance and high attenuation ofthe wanted signal can result in the unwanted signal admitted at the receiver being many times larger than the wanted signal because ingress may occur near the receiver and thus not experience the same attenuation.
An object ofthe invention is to provide a method and circuit for suppressing noise under these conditions.
According to the present invention there is provided a method of suppressing noise in a transmission line, comprising the steps of receiving incoming signals at the inputs of a differential amplifier, extracting a common mode signal from said input signals, integrating the output of said differential amplifier that is correlated with said common mode signal over a large number of cycles, and adjusting the balance in said line on the basis of said integration.
Typically, the integrated signal will be minimized over time to keep the line in optimum balance.
For the method to be effect, generally the following conditions should hold:
A) In the case ofthe unwanted signal, the differential component should be smaller than the common mode component (as it normally would be).
B) In the case ofthe wanted signal, the differential component must be greater than the common mode component (as it normally would be).
C) The unwanted signal must be uncorrelated with the wanted signal.
If these conditions are not met, cancellation may still be possible by adding a training sequence, but this greatly increases the complexity ofthe system.
When these conditions are met, the unwanted signal can be extracted from the composite using correlation techniques. The pair balance may then be adjusted, at the receiver input, until this unwanted signal is cancelled. If the pair balance is different at different frequencies then multiple cancellers may be used, each operating in a different band.
This canceller not only compensates for imperfect balance in the twisted pair, it also compensates for imperfect balance within the receiver.
The invention also provides a noise cancellation circuit characterized in that it comprises a differential amplifier for receiving incoming signals on a transmission line, means for a extracting a common mode signal from the incoming signals, means for integrating an output of said differential amplifier that is correlated with said common mode signals, and means for adjusting the signal balance in said transmission line on the basis of said integration.
The invention will now be described in more detail, by way of example only, with reference to the accompanying drawings, in which:- - J -
Figure 1 is a block diagram of an echo canceller circuit in accordance with the invention;
Figure 2 shows the result of simulating a circuit in accordance with Figure 1 ; and Figure 3 shows the first 15 micro-seconds of simulation where the composite signal can be seen to be dominated by the ingress: and
Figure 4 shows the last 15 micro-seconds of simulation where only the wanted signal can be seen.
Referring now to Figure 1 , one component o a twisted pair line 1 is connected to the non-inverting input of a receiver amplifier 2 and the other component is connected to the inverting input through balance adjustment unit 1 1 for restoring line balance. Typically, this can be a variable gain amplifier.
The line 1 is also connected to the two non-inverting inputs of common mode amplifier 3, which detects common mode signals (cm), and respective non-inverting and inverting inputs of amplifier 4, which produces a difference signal dif.
The common mode output signal from amplifier 3 is applied to the non- inverting inputs of comparators 5. 6. The inverting input of comparator 5 is connected to ground. The differential output of amplifier 4 is connected through full wave rectifier 7 to inverting input of comparator 6. The outputs of comparator 5 and 6 are fed through AND gate 8 to control switch 9.
Assuming for the moment that the comparator 6 produces a true output, it will be observed that comparator 5 will turn on switch 9 via AND gate 8 when the signal cm is positive, i.e. during positive half-cycles of the waveform. When turned on, switch 9 connects the output of receiver 2 to the input of an integrator 10. Since the unwanted component ofthe difference signal is correlated with the common mode, this will be positive at the same time, whereas the uncorrelated wanted signal will be randomly positive and negative. Over a long period of time (typically tens of thousands times the signal period), the unwanted signal at the output of receiver 2 will therefore accumulate at the integrator output. The output of integrator 10 restores the twisted pair balance at the input of the receiver 2 through balance adjustment unit 1 1 thereby to suppress the noise.
While imperfect balance can generate a differential component from a common mode signal cm, the converse is also true. The resulting unwanted cm component ofthe wanted dif signal will cause the canceller to attempt to cancel the wanted signal. The function of differential amplifier 4, full wave rectifier 7, comparator 6 and AND gate 8 is to prevent this from happening.
As indicated above, amplifier 4 detects the differential signal dif. Full wave rectifier 7 derives the absolute value of this signal, which is always positve. The comparator 6 serves to stop integration from occurring at the integrator 10 while the absolute value of the signal dif is higher than the signal cm since the AND gate 8 causes switch 9 to open. The net result is that integration will only take place while the dif signal (and its cm component) is passing through zero. As a result these signals are ignored by the integrator. The portion enclosed by dashed lines can also be implemented on a general purpose computer based on the following pseudo-code: cm = ini + in2 (common mode) dif = ini - in2 (differential) if (cm > abs(dif) and cm > 0) out = in3 else if (cm < -abs(dif) and cm < 0) out = -in3 else out = 0 Simulation based on the above pseudo code produced the following results.
The wanted signal is 4Vpp with a cm component of 0.8Vpp. The cm ingress is 160Vpp with a dif component of 40Vpp. For simplicity of simulation the ingress signal is a composite of 967kHz, 1.57MHz and 1.93MHz. The first 0.015 seconds of convergence is simulated. Figure 2 shows the overall result. At time = 0, the receiver output is a composite but dominated by the dif component of the ingress (for a total of 44Vpp).
As the canceller converges, the receiver output reduces until, at time = 0.015 seconds, the canceller is almost fully converged. At that time all that remains at the receiver output is the 4Vpp, wanted signal.
Figure 3 shows the first 15 micro-seconds of simulation where the composite signal can be seen to be dominated by the ingress. Figure 4 shows the last 15 micro¬ seconds of simulation where only the wanted signal can be seen.
The circuit has been described as an analog circuit, but those skilled in the art will recognize that it can also be implemented in the digital domain using digital signal processors. It may also be used with duplex systems adopting a ping-pong approach, where signals are alternately sent in opposite directions. It can be used with systems employing frequency or time division multiplexing.
If there is no noise on the line, the above circuit may destroy the wanted signal. For this reason, it may be desirable to include a noise detector and a device for de¬ activating the circuit when the noise drops below a certain threshold level.
The described circuit shows great promise in suppressing uncorrelated single frequency interference and impulse noise.

Claims

Claims:
1. A method of cancelling noise in a transmission line, characterized in that incoming signals are received at the inputs of a differential amplifier, a common mode signal is extracted from said input signals, the output of said differential amplifier that is correlated with said common mode signal is integrated over a large number of cycles, and the signal balance in said transmission line is adjusted on the basis of said integration.
2. A method as claimed in claim 1 , characterized in that the signal balance in said transmission line is adjusted to minimize the integrated signal.
3. A method as claimed in claim 1 or 2, characterized in that said common mode signal is compared with a predetermined reference value to generate a first control signal during portions of each common mode waveform cycle, and said control signal closes a switch connecting the output of said differential amplifier to an integrator.
4. A method as claimed in claim 3, characterized in that said predetermined reference value is zero and said first control signal is generated whenever said common mode signal is positive.
5. A method as claimed in claim 3 or 4, characterized in a difference signal is extracted from said incoming signals, and the absolute value of said difference signal is compared with said common mode signal to produce a second control signal for closing said switch when said difference signal is less than said common mode signal, said first and second signals controlling said switch through an AND gate.
6. A noise cancellation circuit characterized in that it comprises a differential amplifier for receiving incoming signals on a transmission line, means for a extracting a common mode signal from the incoming signals, means for integrating an output of said differential amplifier that is correlated with said common mode signals, and means for adjusting the signal balance in said transmission line on the basis of said integration.
7. A noise cancellation circuit as claimed in claim 6, characterized in that means are provided for switching on said integrating means during portions of the waveform of said common mode signal so as to correlate the common mode signal with the unwanted portion of the output of said differential amplifier.
8. A noise cancellation circuit as claimed in claim 7, characterized in that said portions are half cycles.
9. A noise cancellation circuit as claimed in claim 6, characterized in that said integrating means is connected to the output of said differential amplifier through a switch controlled at least in part by said common mode signal.
10. A noise cancellation circuit as claimed in claim 7, characterized in that it comprises means for comparing said common mode signal with a reference value to generate a first switch control signal, means for extracting a difference signal from said incoming signals, means for generating a signal representing the absolute value of said difference signals, means for comparing said signal representing the absolute value with said common mode signal to generate a second switch control signal, and logic circuitry for controlling said switch in dependence on said first and second switch control signals.
1 1. A noise cancellation circuit as claimed in claim 10, characterized in that said logic circuitry is an AND gate.
12. A noise cancellation circuit as claimed in claim 6, characterized in that said integrating means is controlled by a microprocessor implementing the following psuedo-code: if (cm > abs(dif) and cm > 0) out = in3 else if (cm < -abs(dif) and cm < 0) out = -in3 else out = 0 where cm is the common mode signal, dif is the difference signal, in3 is the output of said differential amplifier receiving said incoming signals, and out is the input to said integrator.
EP96934284A 1995-11-07 1996-11-07 Cross talk interference cancellation in twisted pairs Withdrawn EP0860056A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
GB9522737 1995-11-07
GBGB9522737.7A GB9522737D0 (en) 1995-11-07 1995-11-07 Noise cancellation in twisted pairs
PCT/CA1996/000734 WO1997017767A1 (en) 1995-11-07 1996-11-07 Cross talk interference cancellation in twisted pairs

Publications (1)

Publication Number Publication Date
EP0860056A1 true EP0860056A1 (en) 1998-08-26

Family

ID=10783475

Family Applications (1)

Application Number Title Priority Date Filing Date
EP96934284A Withdrawn EP0860056A1 (en) 1995-11-07 1996-11-07 Cross talk interference cancellation in twisted pairs

Country Status (5)

Country Link
EP (1) EP0860056A1 (en)
AU (1) AU7275196A (en)
CA (1) CA2236852A1 (en)
GB (1) GB9522737D0 (en)
WO (1) WO1997017767A1 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA2239675C (en) * 1998-06-04 2007-11-13 Tet Hin Yeap Suppression of rfi and impulse noise in communications channels
TWI385941B (en) * 2007-10-16 2013-02-11 Realtek Semiconductor Corp Method and apparatus for canceling channel interference
GB2525458A (en) * 2014-03-31 2015-10-28 British Telecomm Communications network

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4527261A (en) * 1981-10-07 1985-07-02 Amf Incorporated Hiline interference eliminator
IL78244A0 (en) * 1986-03-24 1986-07-31 Zvi Kamil Instrumentation amplifier arrangement
US4910768A (en) * 1988-08-02 1990-03-20 The Inteleplex Corporation Automatic balancing circuit for longitudinal transmission system

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO9717767A1 *

Also Published As

Publication number Publication date
GB9522737D0 (en) 1996-01-10
WO1997017767A1 (en) 1997-05-15
AU7275196A (en) 1997-05-29
CA2236852A1 (en) 1997-05-15

Similar Documents

Publication Publication Date Title
Benesty et al. Advances in network and acoustic echo cancellation
EP0746134B1 (en) Acoustic echo canceler
CA2036078C (en) Sub-band acoustic echo canceller
US4845746A (en) Echo canceller with relative feedback control
CA2258618C (en) Echo suppressor and non-linear processor of echo canceller
US3499999A (en) Closed loop adaptive echo canceller using generalized filter networks
CA1169135A (en) Adaptive filter including a far end energy discriminator
US4225754A (en) Loudspeaker telephone
US4918685A (en) Transceiver arrangement for full-duplex data transmission comprising an echo canceller and provisions for testing the arrangement
CN106713570A (en) Echo cancellation method and device
US5790657A (en) Echo suppressor capable of suppressing an echo resulting from acoustic coupling without spoiling a natural sound of conversation
JP4897921B2 (en) Method and system for reducing acoustic echo in a multi-channel audio communication system
WO2001069810A2 (en) A method and system for stereo echo cancellation for voip communication systems
US6798754B1 (en) Acoustic echo cancellation equipped with howling suppressor and double-talk detector
US5008937A (en) Scrambled-communication system using adaptive transversal filters for descrambling received signals
EP0860056A1 (en) Cross talk interference cancellation in twisted pairs
US5495473A (en) Method and apparatus for implementing hardware independent echo cancellation in a full-duplex audio stream in a computer system
CA1213088A (en) Echo canceller dynamic range extension
CN113824458B (en) Three-channel self-adaptive co-location broadband interference suppression method and system
Amano et al. A multirate acoustic echo canceler structure
US5461661A (en) Line disconnection detection circuit for echo-cancelling transceivers
Surin et al. An adaptive noise decorrelation technique for stereophonic acoustic echo cancellation
GB2109209A (en) Improvements in or relating to interference controllers and detectors for use therein
GB2109207A (en) Improvements in or relating to interference cancellers
WO1998028893A1 (en) Method and apparatus for suppressing echo in telephony

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

17P Request for examination filed

Effective date: 19980522

AK Designated contracting states

Kind code of ref document: A1

Designated state(s): DE FR GB

17Q First examination report despatched

Effective date: 19980916

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: THE APPLICATION IS DEEMED TO BE WITHDRAWN

18D Application deemed to be withdrawn

Effective date: 19990327